The devfg driver loads the PL with a bitfile image. The driver can also
support scrubbing.
These drivers are from Patrick Gauvin <pggauvin at gmail.com> and a thread
on the devel list: https://lists.rtems.org/pipermail/devel/2017-May/017705.html
When using QEMU configurations that support SMP for Zynq7000 systems,
the second core is started at the same time as the first core instead of
waiting for an event to trigger a check for the value at 0xfffffff0
before jumping into RTEMS code. This makes the erroneously started core
wait as expected and prevents prefetch and data aborts from occurring
before the MMU has been properly configured. This was recently exposed
by cleanup done to the ARM GICv2 driver that removed some delays which
were allowing this to operate normally.
The RT_TSW_OK field is set to 1 if there was no error. The Message Error
(ME) field indicates an error and must be set to 0 if there was no error
so the result of tsw&RT_TSW_OK must be negated. It is then left-shifted
to the Messsage Error (ME) bit field of the message information word.
Fix issue CID 1399772
This removes the headers imported from the embeddedsw repository in
favor of a much thinner shim. This also removes the complicated build
system configuration necessary to support use of these headers. The
primary reason for removal is that certain external Xilinx libraries
also require use of these headers and this causes version mismatches and
header conflicts that can be avoided.
- Add support for four new ports, UART2-UART5.
- Add build options to allow console device configuration.
- Segregate device-specific definitions from the device family files. X macros
are used to maintain a single source of truth and have the configuration
done at compile-time
- Add raspberrypi_uart_init() to make it convenient for users to install uart
devices
Close#5130
Co-authored-by: Ning Yang <yangn0@qq.com>
* It is not granted that we will always access to natually aligned
access. So, before handling endianess do byte-a-byte load using
the appropriate libfdt function to avoid unaligned access issues
Signed-off-by: Francescodario Cuzzocrea <bosconovic@gmail.com>
On other targets, the rtems_cache_flush_entire_data() also performs a
clean and invalidate.
This is a workaround for "Answer 68874 - Zynq UltraScale+ MPSoC, APU -
An Eviction Might Overtake A Cache Clean Operation".
Let the caller provide the translation table base and the used page
tables to ease testing.
Simplify the error handling by using early returns.
Return RTEMS_TOO_MANY instead of RTEMS_NO_MEMORY if the page tables are
all used.
There is no need to wait on secondary processors for the GIC distributor
enable since the BSPs for real targets start the secondary processors
in _CPU_SMP_Start_processor().
In SMP configurations, check that we run on a configured processor. If not,
then there is not much that can be done since we do not have a stack available
for this processor. Just loop forever in this case. Do this in assemlby to
ensure that no stack memory is used.
Make the support for starting in EL2/EL3 customizable. A boot loader or
the Arm Trusted Firmware should start RTEMS in non-secure EL1 mode.
In start.S, use local labels.
For the aarch64/xilinx-zynqmp the support for starting in EL2/EL3 is
disabled by default. For the Qemu xlnx-zcu102 machine, the default is
to start in non-secure EL1 mode. This can be controlled by options, for
example "-machine xlnx-zcu102,secure=on,virtualization=on".
The information from the README.md have been merged into the
documentation.
The necessary tools for the sdcard.sh are quite tricky to build. All
necessary information to create an SD image are in the documentation
already. So the script isn't necessary any more.
Update #5088
Dynamically mapped blocks must be aligned to the MMU page size just like
startup-configured blocks. This was not being enforced and could cause a
hang with bad input.
Rename xilinx_zynqmp_rpu BSP variant to zynqmp_rpu_lock_step to
emphasize that this BSP is for the lock-step mode RPU configuration.
Add BSP variants zynqmp_rpu_split_0 and zynqmp_rpu_split_1 for the split
mode RPU configuration for core 0 and 1 respectively.
Remove copyright from DornerWorks since the files contain not contributions
from this company. Fix the copyright years of the embedded brains
contributions.
