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dev/irq: Simplify SMP GIC initialization

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There is no need to wait on secondary processors for the GIC distributor
enable since the BSPs for real targets start the secondary processors
in _CPU_SMP_Start_processor().
This commit is contained in:
Sebastian Huber
2024-10-04 03:48:19 +02:00
parent f43042cd06
commit 3fd063159d
2 changed files with 7 additions and 15 deletions
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16
bsps/shared/dev/irq/arm-gicv2.c
View File

@@ -222,16 +222,10 @@ static inline void init_distributor(volatile gic_dist *dist)
}
}
static inline void wait_for_distributor_and_init_sgi_ppi(
volatile gic_dist *dist
)
static inline void init_sgi_ppi(volatile gic_dist *dist)
{
uint32_t id;
while ((dist->icddcr & GIC_DIST_ICDDCR_ENABLE) == 0) {
/* Wait */
}
#ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
dist->icdigr[0] = 0xffffffff;
#endif
@@ -250,7 +244,11 @@ void bsp_interrupt_facility_initialize(void)
arm_interrupt_facility_set_exception_handler();
#ifdef BSP_ARM_GIC_MULTI_PROCESSOR_SECONDARY
wait_for_distributor_and_init_sgi_ppi(dist);
while ((dist->icddcr & GIC_DIST_ICDDCR_ENABLE) == 0) {
/* Wait */
}
init_sgi_ppi(dist);
#else
init_distributor(dist);
#endif
@@ -268,7 +266,7 @@ BSP_START_TEXT_SECTION void arm_gic_irq_initialize_secondary_cpu(void)
volatile gic_cpuif *cpuif = GIC_CPUIF;
volatile gic_dist *dist = ARM_GIC_DIST;
wait_for_distributor_and_init_sgi_ppi(dist);
init_sgi_ppi(dist);
cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);

6
bsps/shared/dev/irq/arm-gicv3.c
View File

@@ -207,12 +207,6 @@ void bsp_interrupt_facility_initialize(void)
#ifdef RTEMS_SMP
BSP_START_TEXT_SECTION void arm_gic_irq_initialize_secondary_cpu(void)
{
volatile gic_dist *dist = ARM_GIC_DIST;
while ((dist->icddcr & GIC_DIST_ICDDCR_ENABLE) == 0) {
/* Wait */
}
gicv3_init_cpu_interface(_SMP_Get_current_processor());
}
#endif