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159 Commits
5.2 ... 4.11.3

Author SHA1 Message Date
Chris Johns
7093cb5e5d libtest/dl01: Add dlerror tests.
Update #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
5812a26eeb Update dlerror usage
Handles possible NULL return value

Updates #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
dc746b50ca libdl: Fix dlerror return type
POSIX specifies char *, not const char *

Updates #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
a346408e4e libdl: dlerror return NULL when no error
Updates #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
a2a9751823 libdl: Clear error between dlerror invocations
Updates #2747
2018-02-08 14:21:13 +11:00
Chris Johns
1a304307a2 testsuites/libtest: Set EXENT to .exe so executable are correctly named.
The configure order effects how it works.

Close #3297
2018-02-08 14:20:26 +11:00
Christian Mauderer
d438427cbe dosfs: Allow creating a file with similar name.
If there is already a file with a long file name it isn't possible to
create a second file which has a name that ends on the first files name
(for example ets.beam and sets.beam). This patch fixes that.

Close #3258.
2017-12-07 08:04:11 +01:00
Christian Mauderer
004a63efef dosfs: Fix files with same name as volume name.
Take care that a file in the root directory with the same name as the
volume name can be found.

Close #3257.
2017-12-05 08:02:42 +01:00
Sebastian Huber
c139a70597 posix: Fix aio_cancel()
Close #3164.
2017-10-04 09:26:40 +02:00
Sebastian Huber
1a21831b3c i2c: Fix EEPROM driver program timeout handling
The RTEMS_MILLISECONDS_TO_TICKS() macro doesn't round up. Do not use it
to calculate the program timeout in ticks. Check program done condition
after the timeout check to account for pre-emptions.

Close #3162.
2017-10-02 13:44:36 +02:00
Sebastian Huber
8ca15e26ba i2c: Send MSB of address first for EEPROMs
Close #3161.
2017-10-02 13:44:32 +02:00
Sebastian Huber
a3199d91f3 dosfs: Fix fat_file_update()
Do not update the non-existant meta-data of the root directory.

Close #2944.
2017-09-06 14:40:38 +02:00
Sebastian Huber
a76c31e13d dosfs: Fix find name next entry preparation
Close #2964.
2017-09-06 14:09:11 +02:00
Sebastian Huber
e1c3dc0909 dosfs: Fix msdos_dir_read()
Set a proper name buffer length for each converter invocation.

Close #2987.
2017-09-06 13:24:34 +02:00
Chris Johns
2ed53cb982 testsuite/dl: Add C++ by default for DL tests which use C++.
- Add AM C++ support to the testsuite configure.ac script.
- Fix the dependences in the  DL tests.

Closes #3024.
2017-08-23 09:48:56 +10:00
Chris Johns
89fd08eae6 libmisc/shell: Make some internal shell functions public.
- Add 'rtems_shell_init_environment()' so a user can create the
  shell environment without needing to run a shell.
- Move 'rtems_shell_lookup_topic', 'rtems_shell_can_see_cmd',
  and 'rtems_shell_execute_cmd' from the internal interface to
  the public interface.

Closes #3104.
2017-08-23 09:48:56 +10:00
Sebastian Huber
492c95eee6 confdefs: Fix POSIX keys configuration
Remove the OBJECTS_UNLIMITED_OBJECTS flag for the memory size
configuration.

Close #3105.
2017-08-22 08:03:10 +02:00
Sebastian Huber
7d097c5c69 arm: Validate IT[7:0] bit field of PSR
Close #3093.
2017-08-10 09:24:26 +02:00
Sebastian Huber
5cc276e7c1 arm: Fix CPU context validation for Cortex-R4
Do not touch the FPSCR[QC] bit since this is DNM/RAZ on Cortex-R4.

Close #3092.
2017-08-10 08:21:04 +02:00
Sebastian Huber
7e91901303 arm: Fix ARMv7-M interrupt processing
Right after a "msr basepri_max, %[basepri]" instruction an interrupt
service may still take place (observed at least on Cortex-M7).  However,
pendable service calls that are activated during this interrupt service
may be delayed until interrupts are enable again.  The
_ARMV7M_Pendable_service_call() did not check that a thread dispatch is
allowed.  Move this test from _ARMV7M_Interrupt_service_leave() to
_ARMV7M_Pendable_service_call().

Close #3060.
2017-07-07 13:27:24 +02:00
Sebastian Huber
09cbe713ff bsps/arm: Fix bit field offset in GIC support
Close #3002.
2017-05-11 09:57:53 +02:00
Chris Johns
d2e31f70c1 libdl: Back port C++ exception throw and catch from 4.12.
Closes #2956.
2017-04-04 13:26:01 +10:00
Sebastian Huber
d51538bdbe dosfs: Fix file name search
Do not use our long file name entry count to optimize the file name
search. The Unicode comparison must be taken into account.

Close #2939.
2017-03-21 16:15:25 +01:00
Sebastian Huber
89164c67bc dosfs: Fix race condition msdos_dir_read()
Obtain file system instance lock before member access.

Close #2937.
2017-03-21 16:15:21 +01:00
Sebastian Huber
4c4869f483 dosfs: Rename fat_entries to lfn_entries
The name "fat_entries" for long file name directory entries is quite
misleading.
2017-03-21 16:15:17 +01:00
Sebastian Huber
7011f26061 dosfs: Fix long file name padding
Close #2934.
2017-03-21 16:15:11 +01:00
Sebastian Huber
49eb6061ec dosfs: msdos_filename_utf8_to_short_name_for_save
Simplify.
2017-03-21 16:15:09 +01:00
Sebastian Huber
5ed41a6d82 dosfs: Fix msdos_add_file()
Make sure that long file names work accross cluster boundaries.

Close #2929.
2017-03-21 16:15:04 +01:00
Sebastian Huber
58e8131184 dosfs: Simplify msdos_add_file()
Update #2929.
2017-03-21 16:15:00 +01:00
Sebastian Huber
565b1a57b7 dosfs: Add and use msdos_lfn_checksum()
Update #2929.
2017-03-21 16:14:59 +01:00
Sebastian Huber
ad3a744ac4 dosfs: Simplify fat_file_open()
Update #2929.
2017-03-21 16:14:57 +01:00
Sebastian Huber
201f3797b3 dosfs: Simplify msdos_creat_node()
Update #2929.
2017-03-21 16:14:53 +01:00
Sebastian Huber
c38f1fcf8f dosfs: Fix fat_file_write()
Remove forced overwrite which leads to file data corruption.  The logic
to determine a forced overwrite was fundamentally broken.  For simplity,
disable this feature.

Close #2622.
2017-03-21 16:14:44 +01:00
Sebastian Huber
21d7154b07 dosfs: Fix msdos_utf8_normalize_and_fold()
It is all right in case the result uses the full destination buffer.
Without this fix the handling of a maximum 8.3 short file name is
broken.

Close #2928.
2017-03-21 16:14:37 +01:00
Sebastian Huber
f08c71339c libio: Fix deadlock in location management
Perform a context-dependent deferred location release to avoid a
deadlock on the file system instance locks, for example during a
chdir().

Close #2936.
2017-03-21 16:13:11 +01:00
Chris Johns
2ea436a167 Config (.cfg) files are only valid if deeper than 5.
Closes #2827.
2017-03-21 14:38:59 +11:00
Sebastian Huber
a27128c5dc termios: Fix infinite loop in receive path
In canonical mode, the raw input buffer or the canonical buffer may
overflow without an end of line.  Avoid an infinite loop in this case.

Update #2915.
2017-02-28 09:55:58 +01:00
Sebastian Huber
0e8d205559 termios: Protect raw input buffer with device lock
Use the device lock to protect the raw input buffer management, e.g.
tail, head and buffer content updates.

Update #2914.
2017-02-28 09:55:55 +01:00
Sebastian Huber
35a3d81581 termios: Simplify rtems_termios_read_tty()
Remove dead code.

Update #2914.
2017-02-28 09:53:21 +01:00
Sebastian Huber
17f81ee3cb dosfs: Fix FAT32 formatter
The second FAT entry contains a bit to indicate if the FAT32 filesystem
is not dirty and a bit to indicate if there was no IO error.  Set both
bits for a fresh filesystem.  This prevents a warning if mounted on
Windows.

Update #2913.
2017-02-28 09:50:58 +01:00
Sebastian Huber
6ec60de37d dosfs: Directories should have a file size of 0
Update #2755.
2017-02-28 09:50:53 +01:00
Nick Withers
7e0a02a70f Remove old CVS keywords
Close #2388.
2017-02-15 14:53:07 +01:00
Sudarshan Rajagopalan
5b5ef4e479 Fix exception handler for supporting FPU
Close #2401.
2017-02-15 14:18:53 +01:00
Sebastian Huber
04684cbc43 dosfs: Fix msdos_find_file_in_directory()
For a filename match the entry must match without anything remaining.

Update #2908.
2017-02-14 08:09:57 +01:00
Sebastian Huber
69ae534cbb Change version to 4.11.1.99
Update #2886.
2017-01-26 08:31:50 +01:00
Christian Spindeldreier
af9143fba5 GRETH: Interrupt Handler Uses Wrong Events
closes #2796.
2017-01-12 09:38:38 -06:00
Joel Sherrill
d46a65d052 Remove texinfo format documentation. Replaced by Sphinx formatted documentation.
updates #2812.
2017-01-11 12:08:15 -06:00
Tim Cussins
a0b116dc35 virtex4, virtex5 bsp.h: Use BSP_INTERRUPT_STACK_SIZE not user space CONFIGURE_INTERRUPT_STACK_SIZE
closes #2801.
2016-11-03 12:51:53 -05:00
Sebastian Huber
59ee4abf24 sptests/spclock_err02: Update screen file 2016-11-02 07:57:07 +01:00
Pavel Pisa
58073284c6 bsps/arm: do not introduce CPU_CACHE_LINE_BYTES in 4.11 and correct CPU_STRUCTURE_ALIGNMENT. 2016-10-03 11:54:41 +02:00
Pavel Pisa
9d423d9c96 libdl/rtl-obj.c: synchronize cache should not depend on CPU_CACHE_LINE_BYTES.
The CPU_CACHE_LINE_BYTES has been introduced after 4.11 branch
fork and is not available for all architectures on RTEMS 4.11.

Use of rtems_cache_get_maximal_line_size() is more descriptive
choice. The min/max data/instruction cache line size is not critical
there, value is used for optimization only to use single operation
for decently following sections.
2016-10-03 11:01:39 +02:00
Pavel Pisa
2b54e73fb0 arm/tms570: document BSP setup with included hardware initialization. 2016-10-02 11:31:19 +02:00
Pavel Pisa
a94d49d3ad arm/tms570: update bootstrap generated preinstall.am 2016-10-02 11:31:19 +02:00
Pavel Pisa
006f86753a arm/tms570: include TMS570_USE_HWINIT_STARTUP option to select bare metal startup and selftest. 2016-10-02 11:31:19 +02:00
Pavel Pisa
8671786934 arm/tms570: include hardware initialization and selftest based on Ti HalCoGen generated files.
The configuration is specific for TMS570LS3137 based HDK.
Pins configuration can be easily changed in

  rtems/c/src/lib/libbsp/arm/tms570/hwinit/init_pinmux.c

file.

The list tms570_selftest_par_list in the file

  rtems/c/src/lib/libbsp/arm/tms570/hwinit/bspstarthooks-hwinit.c

specifies peripherals which health status is examined
by parity self-test at BSP start-up. It can be easily
modified for other TMS570 family members variants same
as the selection of other tests in bspstarthooks-hwinit.c.
2016-10-02 11:31:19 +02:00
Pavel Pisa
22ab88c486 arm/tms570: define base addresses of all TMS570LS3137 SPI interfaces.
Generated header file ti_herc/reg_spi.h contains complete registers
and fields set for Ti MibSPI peripheral.
Care has to be taken that only TMS570_SPI1, TMS570_SPI3 and TMS570_SPI5
are of this complete multibuffer type. TMS570_SPI2 and TMS570_SPI4
have substantial part of registers removed but else they are compatible.
2016-10-02 11:31:19 +02:00
Pavel Pisa
94e3c8384f bsp/tms570: ensure that change of SCI baudrate is not applied in the middle of character Tx.
The rtems_monitor_task() setups/updates termios attributes
of the opened TTY and if there is ongoing some other output
it leads to the stuck.

It would be better to use some termios API function which
would call drainOutput() in rtems/cpukit/libcsupport/src/termios.c.
But functionality is not accessible outside of core termios
implementation.

The loop waiting for last character to be sent has to be there anyway
because hardware does not provide Tx machine/shift register empty
interrupt.

Closes #2794
2016-10-02 11:31:19 +02:00
Pavel Pisa
ea41bccc30 bsp/tms570: regenerate preinstall makefile by bootstrap -p. 2016-10-02 11:31:19 +02:00
Pavel Pisa
d830414e69 bsp/tms570: include complete peripheral initialization to SCI driver.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2016-10-02 11:31:18 +02:00
Pavel Pisa
9d09f4977f bsp/tms570: update pinmux to provide support for initialization lists and clear of alt outputs. 2016-10-02 11:31:18 +02:00
Pavel Pisa
529d0751f5 bsp/tms570: include package balls and PINMMR registers mapping for TMS570LS3135ZWT chip. 2016-10-02 11:31:18 +02:00
Pavel Pisa
528c7d4bc8 bsps/arm: Export bsp_start_hook_0_done symbol from ARM start.S.
The symbol can be used by bsp_start_hook_0 when complete
RAM memory is initialization and overwritten during BSP
self-test. The test overwrites even memory used to store
return address / link register and regular resturn from
bsp_start_hook_0 is not possible then.
2016-10-02 11:30:59 +02:00
Pavel Pisa
fab0dd11cb arm/raspberrypi: minimized mainline patch move MMU in front of application image and correct RPi2 boot on 4.11 branch.
This is minimized version of mainline patch

  arm/raspberrypi: move MMU in front of application image to respect variable memory size.

plus correction which has been part of other mainline patches.

This is end of series which allows 4.11 to boot on Raspberry Pi.

Closes #2782

Closes #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
78627fe282 arm/raspberrypi: change interrupt dispatch and enable to generic vector id based approach.
Using conditional branches to find bits is extremely inefficient
and for asynchronous delivery of different interrupt sources
lead to total confusion of branch prediction unit.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
acb488ff59 arm/raspberrypi: remove duplicate setup of IRQ handler in the main ARM exception table.
Exception table setup is processed by common CPU architecture support.
For ARM architecture, it can be found in the file

rtems/c/src/lib/libbsp/arm/shared/start/start.S

and ends by bsp_vector_table_copy_done label.
The actual tabel content can be found at

  bsp_start_vector_table_begin

For ARMv7-A and even other variant with hypervisor mode support,
it is even not necessary to copy table to address 0 at all
because CP15 register can be used to specify alternative
table start address

  arm_cp15_set_vector_base_address(&)bsp_start_vector_table_begin;

ARMv7-M have register to set exception table base as well.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
b5501ba492 arm/raspberrypi: ensure that correct RPI_PERIPHERAL_BASE is provided by raspberrypi.h
If the raspberrypi.h has been included without preceding inclussion
of bsp.h then BSP_IS_RPI2 has not been set for Raspberry Pi 2
BSP variant and bad things happen later.

The patch includes bspopts.h by raspberrypi.h and even includes
bsp.h in critical peripherals support.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
b11669a956 arm/raspberrypi: reorder and update MMU config table to nor force RW section later to RO.
Enable even the first megabyte of SDRAM to be cache-able after
problems with stale cache content has been resolved by previous commit.
Because major part of application usually fits to the first
megabyte this speedups test dhrystone application by factor 40.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
404f659c83 arm/raspberrypi: Enable HYP to SVC switch for this BSP.
This support is required when newer firmware is used on
Raspberry Pi 2 boards.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
f9c1e1172e bsps/arm: Support recent bootloaders starting kernel in HYP mode
When HYP mode is detected at startup then setup HYP mode
vectors table (for future extensions) clean exceptions
switching to HYP mode and switch CPU to ARM SVC mode.

BSPs which want to use this support need to include next option
in their configure.ac

  RTEMS_BSPOPTS_SET([BSP_START_IN_HYP_SUPPORT],[*],[1])
  RTEMS_BSPOPTS_HELP([BSP_START_IN_HYP_SUPPORT], [Support start of BSP in ARM HYP mode])
  AM_CONDITIONAL(BSP_START_IN_HYP_SUPPORT,test "$BSP_START_IN_HYP_SUPPORT" = "1")

and need to include next lines in corresponding Makefile.am

  if BSP_START_IN_HYP_SUPPORT
  libbsp_a_SOURCES += ../shared/startup/bsp-start-in-hyp-support.S
  endif

Updates #2783
2016-10-02 10:40:34 +02:00
Chris Johns
8add2b6c6f libbsp/arm: Fix ARM BSPs missing the bsp_translation_table_end symbol.
Closes #2775.
2016-10-02 10:40:34 +02:00
Chris Johns
197d0343a2 libbsp/arm: Add the TTB table to the default MMU set up as read/write.
This lets the table be changed at runtime for dynamic loading and
debugger support.

Closes #2775.
2016-10-02 10:40:34 +02:00
Sebastian Huber
be62c0b02c bsps/arm: Fix basic cache support for SMP
Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
28eeb6a86f bsps/arm: reorganize CP15 code to allow clean and invalidate ARMv7 cache by level.
New function arm_cp15_cache_invalidate_level and arm_cp15_cache_clean_level
can be used to maintain single cache level (instruction or data).

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
00dfdd6b08 bsps/arm: remove lock in arm_cp15_set_translation_table_entries().
Protection by rtems_interrupt_disable() is incompatible with SMP build.
Actual page table entries manipulation function does not need locking
and disabling cache and can be run concurrently even on multiple
CPUs as long as changes do not modify same region. If the function
is called from more threads/CPUs to modify same region with different
mapping options concurrently then there is problem at another level
of virtual address space management  and has to be solved by mutex
or other locking at that level.

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
6f4e903cf0 bsps/arm: use defines for cache type register format field.
The change documents meaning of codes and opens
well defined way to use cache type format for cache
examination/debugging outside of arm-cp15.h file.

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
22cc80783b arm/xilinx_zynq: ensure that cache is cleaned and MMU disabled when initialization starts.
The u-boot loader enables the MMU plus the data and instruction caches
in some versions which results in RTEMS boot failure.

Closes #2774.
2016-10-02 10:40:34 +02:00
Pavel Pisa
d3a428cafa arm/raspberrypi: use cache manager operations to flush/invalidate all cache levels.
This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
8c5c8b2700 arm/bsps: CP15 and basic cache support entire cache clean for more architecture variants now.
Next cache operations should work on most of cores now

  rtems_cache_flush_entire_data()
  rtems_cache_invalidate_entire_data()
  rtems_cache_invalidate_entire_instruction()

Instruction cache invalidate works on the first level for now only.
Data cacache operations are extended to ensure flush/invalidate
on all cache levels.

The CP15 arm_cp15_data_cache_clean_all_levels() function extended
to continue through unified levels too (ctype = 4).

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
ae3578a2c9 bsps/arm: do not disable MMU during translation table management operations.
Disabling MMU requires complex cache flushing and invalidation
operations. There is almost no way how to do that right
on SMP system without stopping all other CPUs. On the other hand,
there is documented sequence of operations which should be used
according to ARM manual and it guarantees even distribution
of maintenance operations to other cores for last generation
of Cortex-A cores with multiprocessor extension.

This change could require addition of appropriate entry
to arm_cp15_start_mmu_config_table for some BSPs to ensure
that MMU table stays accessible after MMU is enabled

  {
    .begin = (uint32_t) bsp_translation_table_base,
    .end = (uint32_t) bsp_translation_table_base + 0x4000,
    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
  }

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
0d77c4f281 libdl/rtl-obj.c: synchronize cache after code relocation.
Memory content changes caused by relocation has to be
propagated to memory/cache level which is used/snooped
during instruction cache fill.

Closes #2438
Updates #2782
2016-10-02 10:40:33 +02:00
Pavel Pisa
fd6cd36b09 bsps/arm: basic on core cache support changed to use l1 functions.
The basic data and instruction rage functions should be compatible
for all ARMv4,5,6,7 functions. On the other hand, some functions
are not portable, for example arm_cp15_data_cache_test_and_clean()
and arm_cp15_data_cache_invalidate() for all versions and there
has to be specialized version for newer cores.
arm_cache_l1_properties_for_level uses CCSIDR which is not present
on older chips.

Actual version is only experimental, needs more changes
and problem has been found on RPi1 with dlopen so there seems
to be real problem.

Updates #2783
Updates #2782
2016-10-02 10:40:33 +02:00
Pavel Pisa
a114f99bd2 bsps/arm: Change code to explicit selection of cache implementation for ARM BSPs.
The original ARM architecture wide cache_.h is changed to dummy version
for targets not implementing/enablig cache at all.

The ARM targets equipped by cache should include
appropriate implementation.

Next options are available for now

c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h
  basic ARM cache integrated on the CPU core directly
  which requires only CP15 oparations

c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
  support for case where ARM L2C-310 cache controller
  is used. It is accessible as mmaped peripheral.

c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
  Cortex-M specific cache support

Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
886b962e7b bsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310.
Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
eb3af275ea rtems+bsps/cache: Define cache manager operations for code synchronization and maximal alignment.
There is need for unambiguous named and defined cache function
which should be called when code is updated, loaded
or is self-modifying.

There should be function to obtain maximal cache line length
as well. This function can and should be used for allocations
which can be used for data and or code and ensures that
there are no partial cache lines overlaps on start and
end of allocated region.

Updates #2782
2016-10-02 10:40:33 +02:00
Pavel Pisa
9aaf8f2b0b score/arm: Ensure that copile time alignment is 64 bytes for Cortex-A multilib.
Some/many Cortex-A cores have data cache line length 64 bytes and maximum
value has to be used for system structures alignment.

Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
d5ff46bd52 arm/score and shared: define ARM hypervisor mode and alternate vector table base access.
The main reason for inclusion of minimum hypervisor related defines
is that current ARM boards firmware and loaders (U-boot for example)
start loaded operating system kernel in HYP mode to allow it take
control of virtualization (Linux/KVM for example).

Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
c6e0201443 arm/raspberrypi: ensure that RTEMS application image can be started by U-boot.
The current versions of U-boot start kernel/RTEMS application image
with instruction and data caches enabled and it sets exception
base register to new address after its self-relocation.

        ldr     r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
        mcr     p15, 0, r0, c12, c0, 0  /* Set VBAR */

Included changes in bsp_start_hook_0 restore default state to
allow RTEMS image to run after startup from newer U-boot version
on Raspberry Pi.

Clear interrupt enable registers in interrupt controller
to ensure that RTEMS starts from well defined state.

Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
be5cf032c5 bsps/arm: CP15 support for flush prefetch buffer and table base control.
Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Sebastian Huber
75a6584a43 score: Fix C/C++ compatibility issue
Only use CPU_Per_CPU_control if it contains at least one filed.  In GNU
C empty structures have a size of zero.  In C++ structures have a
non-zero size.  In case CPU_PER_CPU_CONTROL_SIZE is defined to zero,
then this structure is not used anymore.

Close #2789.
2016-09-23 06:59:59 +02:00
Chris Johns
35edf82463 libdl: Fix cache corruption bugs.
This patch fixes a number of bugs in the cache when requests are
made to read close to the end of the file and the data is copied
from the top of the cache buffer to the bottom of the buffer. This
was compounded by attempting to read past the end of the file.

Closes #2754.
2016-08-15 15:46:39 +10:00
Chris Johns
25c5583f92 libdl: Add trace output when reading section headers. 2016-08-15 15:46:31 +10:00
Sebastian Huber
7b24946c2b bsps/powerpc: Fix shared console driver
The Termios modes are now an emum.  Do not use them in #if expressions.

Update #2762.
2016-07-19 09:44:16 +02:00
Sebastian Huber
dc0f537b27 bsps/powerpc: Fix AtliVec context switch
Properly pass the stack aligned context to _CPU_Context_switch_altivec()
since _CPU_altivec_ctxt_off defined via ppc_context.

Update #2761.
2016-07-19 08:15:01 +02:00
Sebastian Huber
c6c4fce942 bsps/powerpc: Fix AltiVec enable
There must be an isync after the mtmsr to ensure that the AltiVec is
enabled for subsequent instructions.

Close #2760.
2016-07-19 07:40:40 +02:00
Sebastian Huber
3f72dda6ee posix: Fix pthread_spin_unlock() error status
Update #2719.
2016-05-25 12:48:00 +02:00
Sebastian Huber
276dfd9f3d fat: Fix for invalid cluster sizes
A cluster size > 32KiB resulted in an infinite loop in
fat_init_volume_info() due to an integer overflow.

Update #2717.
2016-05-20 08:14:34 +02:00
Sebastian Huber
f502882ef5 posix: Fix return states of pthread_kill()
POSIX mandates that an error code is returned and not -1 plus errno.

Update #2715.
2016-05-17 13:43:55 +02:00
Sebastian Huber
94b1ba5aed posix: Fix return status of pthread_cancel()
POSIX recommends ESRCH in case no thread exists for the specified
identifier.

Update #2713.
2016-05-17 08:40:43 +02:00
Daniel Hellstrom
33de2037f6 sparc: Fix window underflow trap handler
The window underflow trap handler used %i5 which destroyed the %o5 of
the calling context.  Bug introduced by
0d3b5d4742.

Go back to the pre 0d3b5d4742 behaviour
and use the two unused instructions in the trap vector to optimize a
bit.

Close #2651.
2016-03-24 07:41:01 +01:00
Sebastian Huber
d85db176e7 Filesystem: Export most generic path eval function
Add path length parameter to
rtems_filesystem_eval_path_start_with_root_and_current() so that users
may pass paths without a '\0' termination.

Update #2558.
2016-02-02 08:00:34 +01:00
Sebastian Huber
2145853b00 score: Fix simple timecounter support
Close #2502.
2016-01-27 08:09:05 +01:00
Sebastian Huber
d4520c1900 bsps/arm: Fix broken switch statement
Close #2530.
2016-01-18 08:14:11 +01:00
Sebastian Huber
1bdf578e52 Clearly mark SMP support as experimental in 4.11 2016-01-11 08:29:08 +01:00
Sebastian Huber
cb7c6f53f7 smptests/README: Delete obsolete information 2016-01-11 07:58:09 +01:00
Sebastian Huber
9c615b7835 score: Fix watchdog insert
Under certain conditions a new watchdog was inserted with a wrong
and very large delta interval due to a wrong iterator update.

Bug was introduced by 1ccbd05291.

Close #2507.
2016-01-05 07:09:56 +01:00
Joel Sherrill
b4350d18e7 LICENSE.WEBSERVER: GoAhead server removed before 4.11 branched. Obsolete.
closes #2508.
2016-01-04 11:46:14 -06:00
Sebastian Huber
2cc001a15a score: Fix watchdog removal
Under certain conditions a new watchdog was inserted with a wrong and
very large delta interval due to an incomplete iterator update.

Bug was introduced by 1ccbd05291.

Close #2501.
2015-12-21 08:40:29 +01:00
Sebastian Huber
93b959581c doc: SMP status of RTEMS 4.11 2015-12-16 08:20:38 +01:00
Sebastian Huber
8839cf674e doc: SMP introduction 2015-12-16 08:16:15 +01:00
Chris Johns
51de51dafe Fix rtems-bsps for GNU find hosts.
Fixed as reported by Pavel:

 https://lists.rtems.org/pipermail/devel/2015-December/013189.html

Closes #2498.
2015-12-16 12:04:47 +11:00
Chris Johns
431140aef3 Display only valid BSPs, ignore other .cfg files.
Show the architecture and BSP count.

Closes #2491.
2015-12-13 23:22:53 +11:00
Pavel Pisa
2a9db262a2 bsp/tms570: ensure that linker symbol comparison to NULL is not optimized out.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-12-01 21:09:25 -05:00
Sebastian Huber
7828f1c3aa Fix _Assert() statement 2015-11-25 08:36:04 +01:00
Pavel Pisa
a6d176f25e untar: do not exit with error when created directory already exists.
The problem exists for both RTEMS untar implementations and their
variants: Untar_FromMemory(), Untar_FromFile() and rtems_tarfs_load().

If filesystem object already exists at extracted directory path
then if it is directory, creation is ignored. Attempt
to delete/unlink object and make directory is tried for other cases.

This simple approach problem reported in ticket fixes #2413.
Behavior follows GNU tar and BSD tar practice for directories
but much more work is required to achieve full semantics
of the full featured tar implementation still.
2015-11-23 10:40:06 -05:00
Premysl Houdek
f8bbbdd531 bsp/tms570: unite code duplication in pinmux and clean SCI close per review remarks.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 13:12:18 -05:00
Pavel Pisa
dec479be26 bsp/tms570: use common tms570ls3137.inc file for all board ling variants.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-11-18 10:19:01 -05:00
Premysl Houdek
85750d169e bsp/tms570: separate Flash variants to one which boots directly and one for boot loader.
The default tms570ls3137_hdk variant is for building RTEMS
application image starting directly from start of Flash.

Variant tms570ls3137_hdk_with_loader skips 256kB at start
of Flash to allow use with application loader.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-11-18 10:19:01 -05:00
Pavel Pisa
416cd88ac0 bsp/tms570: use POM only when application image does not start at address 0.
Parameters overlay module is initialized and cleared first.
It is used later to replace exception target vectors
only if that is required.

The application loader code with CPU and SDRAM setup
code has to provide well defined pattern of instructions
at addresses 0x00000000 and 0x0000001f, because only data
read accesses can be processed reliably by POM. The expected
instruction pattern can be seen in the next example

  https://github.com/hornmich/tms570ls3137-hdk-sdram/blob/master/SDRAM_SCI_configuration/source/sys_intvecs.asm

Comments with detailed description of code, background
and reasons for selected approach have been included
in TMS570 bsp startup code.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 10:19:01 -05:00
Premysl Houdek
572f5df6f9 bsp/tms570: updated reserved space for vector overlay in internal RAM 2015-11-18 10:19:01 -05:00
Premysl Houdek
08a98f757b bsp/tms570: fixed sci driver freeze when closing terminal bug
tms570_sci_interrupt_last_close: do not wait for old data transmit.

Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 10:19:01 -05:00
Premysl Houdek
e73d93247e bsp/tms570: Pinmux support and EMAC pin definition added
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 10:19:00 -05:00
Premysl Houdek
fb5d60dafb bsp/tms570: EMAC control header file corrected and EMAC interrupt vector added
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-11-18 10:19:00 -05:00
Daniel Cederman
2d7aad73ea sparc: Fix context switch on SMP
We must not load registers (e.g. PSR) from the heir context area before
the heir stopped execution.

With this patch the write to PSR is divided into two steps. We first update
the current window pointer and then we restore the status registers and
enable traps. This allows us to move the first write to PSR to be before
the write to WIM, as there is now no risk that we get an interrupt where
the CWP and WIM would be inconsistent. We only need to make sure that we
do not use any of the non-global registers or instructions that affects
CWP for three instructions after the write.

In the earlier code the non-global %o1 register was used right after the
write to PSR, which required the use of three nop:s.

Close #2472.
2015-11-17 08:59:23 +01:00
Sebastian Huber
72857659c1 score: Fix race condition on SMP
We must ensure that the Thread_Control::Wait information update is
visible to the target thread before we update its wait flags, otherwise
we may return out of date events or a wrong status.

Close #2471.
2015-11-17 07:47:48 +01:00
Sebastian Huber
0c9bf40b89 Fix interrupt epilogue for ARMv7-AR and PowerPC
Close #2470.
2015-11-17 07:47:31 +01:00
Sebastian Huber
12b5264318 libblock: Avoid NULL pointer access 2015-11-02 08:23:17 +01:00
Jan Sommer
b2d788b3f2 ada: Add missing include
Include stackimpl.h otherwise PTHREAD_MINIMUM_STACK_SIZE cannot be
evaluated.
2015-10-30 07:45:51 +01:00
Joel Sherrill
cb9bb9d13f CONFIGURE_IMFS_MEMFILE_BYTES_PER_BLOCK was undocumented and not error checked
closes #2431.
2015-10-27 07:32:41 -05:00
Sebastian Huber
ad659ff8f3 RFS: Fix resource leak
Update #2433.
2015-10-26 07:29:11 +01:00
Ben Gras
bad82027eb Fail gracefully if pax is not found
The $(PAX) variable is used unconditionally so it shouldn't be
left empty if not found at configure time. Fixes #2437.
2015-10-23 00:08:53 +02:00
Joel Sherrill
ec6f20fc80 moxiesim/configure.ac: Fix typo 2015-10-20 18:08:48 -05:00
Joel Sherrill
13e705cfcb h8sim-testsuite.tcfg: Add fsdosfsname01
closes #2432.
2015-10-20 16:49:51 -05:00
Sebastian Huber
9c96ea780f bsp/leon3: Fix Termios context usage
Only the context of the console device was used and this is wrong in
case more than one APBUART device is available.
2015-10-20 11:31:02 +02:00
Sebastian Huber
edf77328c1 rbheap: Fix rtems_rbheap_free()
Remove unused descriptor of merged free chunks from the free chain and
add them to the spare descriptors.

Update #2417.
2015-09-11 11:31:27 +02:00
Sebastian Huber
deb3f298d1 libtests/rbheap01: Simplify
Update #2417.
2015-09-11 11:29:06 +02:00
Marcos Diaz
44eb9893b5 Beaglebone: fix missing clobber in inline assembly.
flush_data_cache uses R0 directly but doesn't list it as a clobbered
register. Compiling with -O3 made this code break, since the function
that calls flush_data_cache already uses r0.

closes #2416.
2015-09-10 13:30:43 -05:00
Martin Galvan
ccebc571d4 cpukit/libmisc/dumpbuf/dumpbuf.c: Fix compilation warnings
Compiling dumpbuf.c causes the following warning to be issued:

warning: pointer targets in passing argument 1 of 'snprintf' differ in signedness [-Wpointer-sign]

This happens because line_buffer is declared as unsigned.

Closes #2411.
2015-09-03 16:09:22 -05:00
Martin Galvan
efb798e16e cpukit/libnetworking/rtems/rtems_dhcp.c: Fix compilation error
Apparently 'free' is defined as a macro which takes two arguments and calls
rtems_bsdnet_free. When fixing #2405 I added a missing 'free' but didn't notice
it was non-standard.

Closes #2410.
2015-09-03 15:43:03 -05:00
Martin Galvan
9e2197d5d7 cpukit/libmisc/dumpbuf/dumpbuf.c: Fix undefined behavior for sprintf()
I also used the 'n' versions of the string functions, #define'd magic numbers
and added a few comments.

Updates #2405.
2015-09-03 12:34:06 -05:00
Martin Galvan
631d2548fa tools/cpu/nios2/ptf.c: Fix leak of memory pointed to by new_prefix
Updates #2405.
2015-09-03 12:34:01 -05:00
Martin Galvan
c62129c5bc cpukit/libnetworking/rtems/rtems_dhcp.c: Fix leak on realloc failure for dhcp_hostname.
Closes #2405.
2015-09-03 11:27:48 -05:00
Martin Galvan
1491f6948e tools/cpu/nios2/memory.c: Fix uninitialized use of variable memory
Updates #2405.
2015-09-03 11:27:45 -05:00
Martin Galvan
d781ad5086 various .h files: Add missing C++ extern wrappers
Updates #2405.
2015-09-03 11:27:42 -05:00
Sebastian Huber
6d734bae46 arm: Replace __sync_synchronize() implementation 2015-09-01 10:00:14 +02:00
Sebastian Huber
35e0394165 arm: Use compiler memory barrier by default 2015-09-01 10:00:13 +02:00
Sebastian Huber
9ccdb1dfde rbtree: Delete rtems_rbtree_find_control()
This function is hard to support in alternative implementations.  It has
no internal use case.
2015-09-01 09:06:18 +02:00
Nick Withers
7a0df6b947 Respect 2^32 - 1 B NFSv2 maximum file size
closes #2384
2015-08-06 10:49:30 -04:00
Joel Sherrill
c9318aa8d1 user/c_user.texi: Correct info index entry
closes #2380.
2015-08-03 09:35:47 -07:00
Joel Sherrill
652888c22d ada-tests/support/init.c: Fix compile errors and warnings
closes #2379.
2015-08-02 08:32:45 -07:00
Jan Sommer
1cf91e0b0a Add __synch_synchronize function for arm
Fixes link failure when linking Ada programs on the raspberry pi
2015-08-01 10:20:18 -07:00
Nick Withers
dc475657bf ampolish3: Use env to find perl more reliably
Fixes breakage on at least FreeBSD.

closes #2379.
2015-08-01 10:08:55 -07:00
Michael Davidsaver
8da63adc4b tftpDriver: close() false error
closes #2376.
2015-07-29 11:00:29 -05:00
Sebastian Huber
3984a0e171 m68k: Include proper header file 2015-07-24 10:48:28 +02:00
Sebastian Huber
2f43241a2a arm: Include proper header file 2015-07-23 20:35:16 +02:00
Sebastian Huber
0ad8a33650 i2c: Fix return status of i2c dev read/write 2015-07-23 09:12:42 +02:00
Sebastian Huber
f9a597950b doc: Add SMP section to CPU Arch Supplement 2015-07-23 09:12:35 +02:00
Sebastian Huber
8b14cbd996 bsps/arm: Update due to API changes 2015-07-21 10:01:34 +02:00
Premysl Houdek
49c1d25dc2 bsp/tms570 Use bitfields instead of hard-coded values
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-07-20 21:06:55 +10:00
Premysl Houdek
9a84f98372 bsp/tms570: skipped 32bit field definitions and corrected single bit fields
there is no need to define access macros for field covering
whole registers. In addition, BSP_FLD32 does not work right
for field 32bit length.

Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-07-20 21:06:42 +10:00
13044 changed files with 772797 additions and 721040 deletions

1
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@@ -3,4 +3,3 @@ autom4te.cache
configure
config.h.in
Makefile.in
doc

343
COPYING Normal file
View File

@@ -0,0 +1,343 @@
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8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
Appendix: How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) 19yy <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) 19yy name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Library General
Public License instead of this License.

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https://spdx.org/licenses/BSD-2-Clause.html
This license file serves as a template for the license header in files.
You are the copyright holder. Copy the comment below the top of the file in
which you want to use this license for your contribution. Replace the
<FIRST YEAR> placeholder with the year of your first substantial contribution
to this file. Update the <LAST YEAR> with the year of your last substantial
contribution to this file. If the first and last years are the same, then
remove the <LAST YEAR> placeholder with the comma. Replace the
<COPYRIGHT HOLDER> placeholder with your name. In case you are a real person,
then use the following format for <COPYRIGHT HOLDER>:
<FIRST NAME> <MIDDLE NAMES> <LAST NAME>
The <FIRST NAME> is your first name (also known as given name), the
<MIDDLE NAMES> are your optional middle names, the <LAST NAME> is your last
name (also known as family name).
If more than one copyright holder exists for a file, then sort the copyright
lines by the first year (earlier years are below later years) followed by the
copyright holder in alphabetical order (A is above B).
You must not alter anything else in the license comment.
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) <FIRST YEAR>, <LAST YEAR> <COPYRIGHT HOLDER>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/

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@@ -1,428 +0,0 @@
Attribution-ShareAlike 4.0 International
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In addition to the conditions in Section 3(a), if You Share
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@@ -1,339 +0,0 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
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The licenses for most software are designed to take away your
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a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,
b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,
c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)
The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

View File

@@ -20,13 +20,12 @@ who can be trusted to distinguish between changes which require
others to review, require a problem report, or can be safely committed
with limited review.
Write After Approval is granted to experienced but also trusted
Write After Approval is granted to experienced but also trusted
RTEMS developers. These developers may be less familiar with
the breadth of RTEMS. Developers with write after approval need
to submit their patches for review. Once the patches have been approved by a
developer with Blanket Write Privileges, the patches may be checked in.
A BSP-specific patch may be checked in three work days after sending it to
devel@rtems.org in case nobody explicitly rejected the patch.
to submit their patches for review. Once the patches have been
approved by a developer with Blanket Write Privileges, the patches
may be checked in.
Localized Write Permission is for developers who have primary
responsibility for a port and all associated BSPs, a BSP, or other
@@ -48,18 +47,9 @@ Write After Approval
====================
Daniel Hellstrom daniel@gaisler.com
Ben Gras beng@rtems.org
Pavel Pisa ppisa@pikron.com
Christian Mauderer christian.mauderer@embedded-brains.de
Hesham Almatary heshamelmatary@gmail.com
Amaan Cheval amaan@rtems.org
Vijay Kumar Banerjee vijay@rtems.org
Localized Write Permission
==========================
sparc Daniel Hellstrom (daniel@gaisler.com)
beagle Ben Gras (beng@rtems.org)
tms570 Pavel Pisa (pisa@cmp.felk.cvut.cz)
raspberrypi Pavel Pisa (pisa@cmp.felk.cvut.cz)
x86_64 Amaan Cheval (amaan@rtems.org)
beagle Vijay Kumar Banerjee (vijay@rtems.org)

View File

@@ -9,9 +9,12 @@ DIST_SUBDIRS = $(SUBDIRS)
noinst_SCRIPTS = bootstrap
EXTRA_DIST = README.configure SUPPORT VERSION LICENSE $(noinst_SCRIPTS)
EXTRA_DIST += config-ml.in
EXTRA_DIST += ampolish3
dist-hook:
@files=`(cd $(srcdir); find cpukit c testsuites \
@files=`(cd $(srcdir); find cpukit c testsuites tools \
-name configure.ac -print | sed 's,/configure.ac,,' | sort)`; \
for i in $$files; do \
if test -f $(distdir)/$$i/configure.ac; then : ; \

79
README
View File

@@ -1,57 +1,24 @@
Real-Time Executive for Multiprocessing Systems (RTEMS)
-------------------------------------------------------
RTEMS, Real-Time Executive for Multiprocessor Systems, is a real-time executive
(kernel) which provides a high performance environment for embedded
applications with the following features:
- standards based user interfaces
- multitasking capabilities
- homogeneous and heterogeneous multiprocessor systems
- event-driven, priority-based, preemptive scheduling
- optional rate monotonic scheduling
- intertask communication and synchronization
- priority inheritance
- responsive interrupt management
- dynamic memory allocation
- high level of user configurability
- open source with a friendly user license
Project git repositories are located at https://git.rtems.org/
RTEMS Kernel: : https://git.rtems.org/rtems/
RTEMS Source Builder : https://git.rtems.org/rtems-source-builder/
RTEMS Tools : https://git.rtems.org/rtems-tools/
RTEMS Documentation : https://git.rtems.org/rtems-docs/
RTEMS FreeBSD : https://git.rtems.org/rtems-libbsd/
Online documentation is available at https://docs.rtems.org/
RTEMS User Manual : https://docs.rtems.org/branches/master/user/index.html
RTEMS RSB Manual : https://docs.rtems.org/branches/master/rsb/index.html
RTEMS Classic API : https://docs.rtems.org/branches/master/c-user/index.html
RTEMS POSIX API : https://docs.rtems.org/branches/master/posix-users/index.html
RTEMS Doxygen for CPUKit : https://docs.rtems.org/doxygen/branches/master/
RTEMS POSIX 1003.1 Compliance Guide :
https://docs.rtems.org/branches/master/posix-compliance/index.html
- Details the standards base functionality and profiles RTEMS supportsXo
RTEMS Developers Wiki : http://devel.rtems.org
- Bug reporting, community knowledge and tutorials.
RTEMS Mailing Lists : https://lists.rtems.org/mailman/listinfo
- The RTEMS Project maintains mailing lists which are used for most
discussions:
* For general-purpose questions related to using RTEMS, use the rtems-users
ml: https://lists.rtems.org/mailman/listinfo/users
* For questions and discussion related to development of RTEMS, use the
rtems-devel ml: https://lists.rtems.org/mailman/listinfo/devel
This is the Real-Time Executive for Multiprocessing Systems (RTEMS).
The version number for this software is indicated in the VERSION file.
See the documentation manuals in doc/ with daily builds available online at
http://rtems.org/onlinedocs/doc-current/share/rtems/html/ and released builds
at http://www.rtems.org/onlinedocs/releases/ for information on building,
installing, and using RTEMS. The INSTALL file tells you to come back here.
See the RTEMS Wiki at http://devel.rtems.org for community knowledge and
tutorials.
RTEMS Doxygen available at http://www.rtems.org/onlinedocs/doxygen/cpukit/html
The RTEMS Project maintains mailing lists which are used for most
discussions:
* For general-purpose questions related to using RTEMS, use the
rtems-users ml: https://lists.rtems.org/mailman/listinfo/users
* For questions and discussion related to development of RTEMS, use the
rtems-devel ml: https://lists.rtems.org/mailman/listinfo/devel
See https://devel.rtems.org/ to view existing or file a new issue
report ticket.

View File

@@ -1,13 +1,11 @@
dnl _RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
dnl Internal subroutine to RTEMS_BSP_ALIAS
AC_DEFUN([_RTEMS_BSP_ALIAS],[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])
AC_REQUIRE([RTEMS_SOURCE_TOP])
# account for "aliased" bsps which share source code
for bsp_cfgs in `ls "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}"/*/"config/$1.cfg" 2>/dev/null`; do
AC_DEFUN([_RTEMS_BSP_ALIAS],
[# account for "aliased" bsps which share source code
for bsp_cfgs in `ls "$srcdir"/"$RTEMS_TOPdir"/c/src/lib/libbsp/"$RTEMS_CPU"/*/"make/custom/$1.cfg" 2>/dev/null`; do
$2=`echo "$bsp_cfgs" | sed \
-e "s,^${RTEMS_SOURCE_ROOT}/bsps/$RTEMS_CPU/,," \
-e "s,/config/.*\.cfg$,,"`
-e "s,^$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/,," \
-e "s,/make/custom/.*\.cfg$,,"`
break
done
])

View File

@@ -1,5 +1,5 @@
dnl canonicalize target cpu
dnl NOTE: Most rtems targets do not fulfil autoconf's
dnl NOTE: Most rtems targets do not fullfil autoconf's
dnl target naming conventions "processor-vendor-os"
dnl Therefore autoconf's AC_CANONICAL_TARGET will fail for them
dnl and we have to fix it for rtems ourselves
@@ -12,10 +12,7 @@ case "${target}" in
no_cpu-*rtems*)
RTEMS_CPU=no_cpu
;;
riscv*-*rtems*)
RTEMS_CPU=riscv
;;
*)
*)
RTEMS_CPU=`echo $target | sed 's%^\([[^-]]*\)-\(.*\)$%\1%'`
;;
esac

View File

@@ -4,17 +4,17 @@ dnl RTEMS_CHECK_BSPS(bsp_list)
AC_DEFUN([RTEMS_CHECK_BSPS],
[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])dnl sets RTEMS_CPU, target
AC_REQUIRE([RTEMS_SOURCE_TOP])dnl sets RTEMS_SOURCE_ROOT
AC_REQUIRE([RTEMS_TOP])dnl sets RTEMS_TOPdir
AC_MSG_CHECKING([for available BSPs])
$1=
for bsp_make in `echo "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}"/*/config 2>/dev/null`; do
bsp_family=`echo "$bsp_make" | sed \
-e "s,^${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}/,," \
-e "s,/config$,,"`
for bsp_cfgs in `ls "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}/$bsp_family/config/"*.cfg 2>/dev/null`; do
for bsp_spec in `ls "$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU"/*/bsp_specs 2>/dev/null`; do
bsp_family=`echo "$bsp_spec" | sed \
-e "s,^$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/,," \
-e "s,/bsp_specs$,,"`
for bsp_cfgs in `ls "$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/$bsp_family/make/custom/"*.cfg 2>/dev/null`; do
bsp_cfg=`echo "$bsp_cfgs" | sed \
-e "s,^${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}/$bsp_family/config/,," \
-e "s,^$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/$bsp_family/make/custom/,," \
-e "s,\.cfg$,,"`
$1="[$]$1 $bsp_cfg"
done

View File

@@ -1,9 +1,9 @@
AC_DEFUN([_RTEMS_CHECK_CUSTOM_BSP],[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])dnl sets RTEMS_CPU, target
AC_REQUIRE([RTEMS_SOURCE_TOP])dnl sets RTEMS_SOURCE_ROOT
AC_REQUIRE([RTEMS_TOP])dnl sets RTEMS_TOPdir
$2=
for i in \
`ls "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}"/*/config/$1 2>/dev/null`;
`ls "${srcdir}/${RTEMS_TOPdir}/c/src/lib/libbsp/${RTEMS_CPU}"/*/make/custom/$1 2>/dev/null`;
do
AS_IF([test -r $i],[
$2="$i"
@@ -13,8 +13,5 @@ AC_REQUIRE([RTEMS_SOURCE_TOP])dnl sets RTEMS_SOURCE_ROOT
])
AC_DEFUN([RTEMS_CHECK_CUSTOM_BSP],[
_RTEMS_CHECK_CUSTOM_BSP([[$]$1.cfg],[BSP_FOUND])
AS_IF([test -z "$BSP_FOUND"],[
AC_MSG_ERROR([missing [$]$1.cfg])
])
_RTEMS_CHECK_CUSTOM_BSP([[$]$1],[BSP_FOUND])
])

View File

@@ -1,9 +0,0 @@
## Check for a cross tool, similar to AC_CHECK_TOOL, but do not fall back to
## the un-prefixed version of PROG-TO-CHECK-FOR.
dnl RTEMS_CHECK_TOOL(VARIABLE, PROG-TO-CHECK-FOR[, VALUE-IF-NOT-FOUND [, PATH]])
AC_DEFUN([RTEMS_CHECK_TOOL],
[
AS_IF([test "x$target_alias" != "x$host_alias"],
[rtems_tool_prefix=$target_alias-])
AC_CHECK_PROG($1, ${rtems_tool_prefix}$2, ${rtems_tool_prefix}$2, $3, $4)
])

View File

@@ -2,10 +2,10 @@ AC_DEFUN([RTEMS_ENABLE_CXX],
[
AC_ARG_ENABLE(cxx,
[AS_HELP_STRING([--enable-cxx],
[enable C++ support])],
[enable C++ support and build the rtems++ library])],
[case "${enable_cxx}" in
yes) RTEMS_HAS_CPLUSPLUS=yes ;;
no) RTEMS_HAS_CPLUSPLUS=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-cxx option) ;;
esac], [RTEMS_HAS_CPLUSPLUS=yes])
esac], [RTEMS_HAS_CPLUSPLUS=no])
])

View File

@@ -5,9 +5,8 @@ AC_ARG_ENABLE(multiprocessing,
[enable multiprocessing interface; the multiprocessing interface is a
communication interface between different RTEMS instances and allows
synchronization of objects via message passing])],
[case "${enable_multiprocessing}" in
yes) test -z $enable_rtemsbsp && AC_MSG_ERROR([Multiprocessing requires BSPs to be provided, none have, see --enable-rtemsbsp])
;;
[case "${enable_multiprocessing}" in
yes) ;;
no) ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-multiprocessing option) ;;
esac],[enable_multiprocessing=no])

View File

@@ -6,49 +6,10 @@ AC_DEFUN([RTEMS_ENABLE_RTEMSBSP],
AC_BEFORE([$0], [RTEMS_ENV_RTEMSBSP])
AC_ARG_ENABLE(rtemsbsp,
[AS_HELP_STRING([--enable-rtemsbsp="bsp1 bsp2 .."],
[BSPs to include in build, required for SMP and MP builds])],
[BSPs to include in build])],
[case "${enable_rtemsbsp}" in
yes ) enable_rtemsbsp="" ;;
no ) enable_rtemsbsp="no" ;;
*) enable_rtemsbsp="$enable_rtemsbsp"
srctop=${srcdir}
while test x${srctop} != x/
do
if test -d ${srctop}/cpukit -a -d ${srctop}/c/src/lib/libbsp; then
break
fi
srctop=$(dirname ${srctop})
done
if test x${srctop} = x/; then
AC_MSG_ERROR([Cannot find the top of source tree, please report to devel@rtems.org])
fi
target_arch=$(echo ${target_alias} | sed -e "s/\-.*//g")
libbsp=${srctop}/bsps
libbsp_e=$(echo ${libbsp} | sed -e 's/\//\\\//g')
cfg_list=$(LANG=C LC_COLLATE=C find ${libbsp} -mindepth 1 -name \*.cfg)
for bsp in ${enable_rtemsbsp};
do
found=no
for bsp_path in ${cfg_list};
do
cfg_bsp=$(echo ${bsp_path} | sed -e "s/.*\///" -e 's/\.cfg//')
if test x$bsp = x$cfg_bsp; then
cfg_arch=$(echo ${bsp_path} | sed -e "s/${libbsp_e}*\///" -e 's/\/.*//')
case ${target_arch} in
${cfg_arch}* )
;;
* )
AC_MSG_ERROR([BSP '$bsp' architecture does not match the --target architecture, run 'rtems-bsps' (in the top of the source tree) for a valid BSP list])
;;
esac
found=yes
break
fi
done
if test $found = no; then
AC_MSG_ERROR([BSP '$bsp' not found, run 'rtems-bsps' (in the top of the source tree) for a valid BSP list])
fi
done
;;
*) enable_rtemsbsp="$enable_rtemsbsp" ;;
esac],[enable_rtemsbsp=""])
])

View File

@@ -2,17 +2,20 @@ AC_DEFUN([RTEMS_ENABLE_SMP],
[
## AC_BEFORE([$0], [RTEMS_CHECK_SMP])dnl
AC_ARG_ENABLE(smp,
[AS_HELP_STRING([--enable-smp],[enable support for symmetric multiprocessing
AC_ARG_ENABLE(experimental-smp,
[AS_HELP_STRING([--enable-experimental-smp],[enable experimental support for symmetric multiprocessing
(SMP)])],
[case "${enableval}" in
yes) test -z $enable_rtemsbsp && AC_MSG_ERROR([SMP requires BSPs to be provided, none have, see --enable-rtemsbsp])
case "${RTEMS_CPU}" in
arm|powerpc|riscv*|sparc|i386) RTEMS_HAS_SMP=yes ;;
[case "${enableval}" in
yes) case "${RTEMS_CPU}" in
arm|powerpc|sparc|i386) RTEMS_HAS_SMP=yes ;;
*) RTEMS_HAS_SMP=no ;;
esac
;;
no) RTEMS_HAS_SMP=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-smp option) ;;
esac],[RTEMS_HAS_SMP=no])
AC_ARG_ENABLE(smp,
[],
[AC_MSG_ERROR([SMP support is experimental in RTEMS 4.11, use --enable-experimental-smp])],
[])
])

View File

@@ -5,13 +5,17 @@ dnl installation directory inside the build-tree
dnl RTEMS_TOPdir .. relative path of a subpackage's configure.ac to the
dnl toplevel configure.ac of the source-tree
dnl RTEMS_ROOT .. path to the top of a bsp's build directory
dnl [Applied by custom/*.cfg, deprecated otherwise]
dnl [Applied by custom/*.cfg, depredicated otherwise]
dnl
AC_DEFUN([RTEMS_PROJECT_ROOT],
[dnl
AC_REQUIRE([RTEMS_TOP])
BIN2C=rtems-bin2c
PACKHEX="\$(PROJECT_TOPdir)/tools/build/packhex"
AC_SUBST(PACKHEX)
BIN2C="\$(PROJECT_TOPdir)/tools/build/rtems-bin2c"
AC_SUBST(BIN2C)
])

View File

@@ -1,13 +0,0 @@
dnl
dnl RTEMS Include paths.
dnl
AC_DEFUN([RTEMS_BSP_INCLUDES],
[
AC_REQUIRE([RTEMS_SOURCE_TOP])
AC_REQUIRE([RTEMS_BUILD_TOP])
RTEMS_BSP_CPPFLAGS="-I${RTEMS_BUILD_ROOT}/lib/libbsp/\$(RTEMS_CPU)/\$(RTEMS_BSP_FAMILY)/include \
-I${RTEMS_SOURCE_ROOT}/bsps/include \
-I${RTEMS_SOURCE_ROOT}/bsps/\$(RTEMS_CPU)/include \
-I${RTEMS_SOURCE_ROOT}/bsps/\$(RTEMS_CPU)/\$(RTEMS_BSP_FAMILY)/include"
AC_SUBST([RTEMS_BSP_CPPFLAGS])
])

View File

@@ -1,12 +0,0 @@
dnl
dnl RTEMS_BUILD_TOP($1)
dnl
AC_DEFUN([RTEMS_BUILD_TOP],
[dnl
#
# This is a copy of the horrible hack in rtems-top.m4 and it is simpler to
# copy it than attempt to clean this crap up.
#
RTEMS_BUILD_ROOT="${with_rtems_build_top}"
AC_SUBST([RTEMS_BUILD_ROOT])
])dnl

View File

@@ -1,23 +0,0 @@
dnl
dnl RTEMS Include paths.
dnl
AC_DEFUN([RTEMS_INCLUDES],
[
AC_REQUIRE([RTEMS_SOURCE_TOP])
AC_REQUIRE([RTEMS_BUILD_TOP])
# Was CFLAGS set?
rtems_cv_CFLAGS_set="${CFLAGS+set}"
RTEMS_INCLUDE_CPUKIT="-I${RTEMS_SOURCE_ROOT}/cpukit/include"
RTEMS_INCLUDE_CPUKIT_ARCH="-I${RTEMS_SOURCE_ROOT}/cpukit/score/cpu/\$(RTEMS_CPU)/include"
RTEMS_CPUKIT_INCLUDE="${RTEMS_INCLUDE_CPUKIT} ${RTEMS_INCLUDE_CPUKIT_ARCH}"
RTEMS_BUILD_INCLUDE="-I\$(top_builddir) -I${RTEMS_BUILD_ROOT}/include"
RTEMS_INCLUDE="${RTEMS_BUILD_INCLUDE} ${RTEMS_CPUKIT_INCLUDE}"
RTEMS_CPPFLAGS="${RTEMS_INCLUDE}"
AC_SUBST([RTEMS_CPPFLAGS])
])

View File

@@ -1,8 +0,0 @@
dnl
dnl RTEMS_SOURCE_TOP
dnl
AC_DEFUN([RTEMS_SOURCE_TOP],
[dnl
RTEMS_SOURCE_ROOT="${with_rtems_source_top}"
AC_SUBST([RTEMS_SOURCE_ROOT])
])dnl

View File

@@ -1,4 +1,4 @@
AC_DEFUN([RTEMS_VERSIONING],
m4_define([_RTEMS_VERSION],[5.0.0]))
m4_define([_RTEMS_VERSION],[4.11.1.99]))
m4_define([_RTEMS_API],[5])
m4_define([_RTEMS_API],[4.11])

274
ampolish3 Executable file
View File

@@ -0,0 +1,274 @@
#! /usr/bin/env perl
#
# Copyright (C) 2005, 2006 Ralf Corsépius, Ulm, Germany
#
# Permission to use, copy, modify, and distribute this software
# is freely granted, provided that this notice is preserved.
# Helper script to generate pre/tmpinstall rules for RTEMS Makefile.am.
#
# Usage: ampolish3 Makefile.am > preinstall.am
#
# Reads a Makefile.am from stdin and writes corresponding
# pre/tmpinstall rules to stdout.
sub replace($);
sub print_dirstamp($$$);
# Predefined directory mappings:
#
# final-installation directory => temp installation directory
my %dirmap = (
'$(includedir)' => '$(PROJECT_INCLUDE)',
'$(libdir)' => '$(PROJECT_LIB)',
'$(project_libdir)' => '$(PROJECT_LIB)',
'$(project_includedir)' => '$(PROJECT_INCLUDE)'
);
# Conventions on automake primaries:
#
# *_HEADERS -> preinstall
# noinst*_HEADERS -> noinst
# noinst_*_LIBRARIES -> noinst
# project_*_LIBRARIES -> tmpinstall
# *_LIBRARIES -> ignore (no preinstallation)
# dist_project_*_DATA -> preinstall (bsp_specs,linkcmds)
# project_*_DATA -> tmpinstall (*.o, *.a)
# dist_*_DATA -> ignore (no preinstallation)
# *SCRIPTS -> ignore (no preinstallation)
# noinst_*_PROGRAMS -> noinst
# project_*_PROGRAMS -> tmpinstall
# *_PROGRAMS -> ignore (no preinstallation)
## 1st pass: read in file
my @buffer1 = () ;
my %seen = ();
my %predefs = ();
{
my $mode = 0 ;
my $line = '';
while ( <> )
{
if ( $mode == 0 )
{
if ( /^([a-zA-Z0-9_]+\s*[\+]?[:=].*)\\$/o )
{
$line = "$1" ;
$mode = 1;
} else {
push @buffer1, $_ ;
}
} elsif ( $mode == 1 ) {
if ( /^(.*)\\$/o ) {
$line .= $1;
} else {
$line .= $_ ;
push @buffer1, $line ;
$line = '';
$mode = 0 ;
}
}
}
}
#foreach my $l ( @buffer1 ) { print STDERR "1:<$l>"; }
# Filter out all Makefile code not relevant here
my @buffer2 = ();
foreach my $l ( @buffer1 ) {
if ( $l=~ /^\t.*$/o )
{ #ignore: Production of a make rule.
} elsif ( $l =~ /^\s*([a-zA-Z0-9_]*dir)\s*\=\s*(.*)\s*$/o )
{ # dirs
push @buffer2, "$l";
$dirmap{"\$\($1\)"} = replace($2);
} elsif ( $l =~ /^\s*noinst_(.*)\s*[\+]?\=(.*)$/o )
{
#ignore: noinst_* are not relevant here.
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_|)([a-zA-Z0-9_]+)_(HEADERS|LIBRARIES|DATA|SCRIPTS|PROGRAMS)\s*([\+]?\=)\s*(.*)/o )
{
if ( ( "$5" eq '=' ) ) {
my $v = $dirmap{"\$\($3dir\)"};
if ( $v =~ /\$\(PROJECT_[^\)]+\)$/ )
{
$predefs{"$v"} = 1;
}
}
foreach my $f ( split(' ',$6) ) {
push @buffer2, "$1$2$3_$4 +=$f\n";
}
} elsif ( $l =~ /^\s*(if|else|endif)\s*.*$/o )
{ # conditionals
push @buffer2, "$l";
}
# Check if Makefile.am already contains CLEANFILES or DISTCLEANFILES
if ( $l =~ /^\s*(CLEANFILES|DISTCLEANFILES|SUBDIRS)\s*\=.*$/o )
{
$predefs{"$1"} = 1;
}
}
if ( $predefs{"\$(PROJECT_INCLUDE)"} ){
unshift @buffer2, "includedir = \$(includedir)\n";
}
if ( $predefs{"\$(PROJECT_LIB)"} ){
unshift @buffer2, "libdir = \$(libdir)\n";
}
# foreach my $l ( @buffer2 ) { print STDERR "2:<$l>"; }
my @buffer3 = ();
foreach my $l ( @buffer2 ) {
if ( $l =~ /^\s*([a-zA-Z0-9_]*dir)\s*\=\s*(.*)\s*$/o )
{ # dirs
my $v = $dirmap{"\$\($1\)"};
print_dirstamp(\@buffer3,$v,"PREINSTALL_DIRS");
$seen{"PREINSTALL_DIRS"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_|)([a-zA-Z0-9_]+)_HEADERS\s*\+\=(.*)/o )
{ # preinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"PREINSTALL_FILES += $v/$x\n\n";
$seen{"PREINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_)([a-zA-Z0-9_]+)_LIBRARIES\s*\+\=(.*)/o )
{ # tmpinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"TMPINSTALL_FILES += $v/$x\n\n";
$seen{"TMPINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)([a-zA-Z0-9_]+)_LIBRARIES\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(dist_)(project_)([a-zA-Z0-9_]+)_DATA\s*\+\=(.*)/o )
{ # preinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"PREINSTALL_FILES += $v/$x\n\n";
$seen{"PREINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|)(project_)([a-zA-Z0-9_]+)_DATA\s*\+\=(.*)/o )
{ # tmpinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"TMPINSTALL_FILES += $v/$x\n\n";
$seen{"TMPINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(dist_|)([a-zA-Z0-9_]+)_DATA\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(nodist_|dist_|)([a-zA-Z0-9_]+)_SCRIPTS\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_)([a-zA-Z0-9_]+)_PROGRAMS\s*\+\=(.*)/o )
{ # tmpinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_PROGRAM) \$< $v/$x\n",
"TMPINSTALL_FILES += $v/$x\n\n";
$seen{"TMPINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)([a-zA-Z0-9_]+)_PROGRAMS\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(if|else|endif)\s*.*$/o )
{ # conditionals
push @buffer3, "$l";
}
}
# foreach my $l ( @buffer3 ) { print STDERR "3:<$l>"; }
my $output;
$output .= "## Automatically generated by ampolish3 - Do not edit\n\n";
$output .= "if AMPOLISH3\n";
$output .= "\$(srcdir)/preinstall.am: Makefile.am\n";
$output .= "\t\$(AMPOLISH3) \$(srcdir)/Makefile.am > \$(srcdir)/preinstall.am\n";
$output .= "endif\n\n";
foreach my $k ( sort keys %seen )
{
if ( $k =~ /PREINSTALL_FILES/o ) {
$output .= "all-am: \$(PREINSTALL_FILES)\n\n";
$output .= "$k =\n";
$output .= "CLEANFILES ";
if ( $predefs{"CLEANFILES"} ) { $output .= "+"; }
$output .= "= \$($k)\n";
$predefs{"CLEANFILES"} = 1;
} elsif ( $k =~ /TMPINSTALL_FILES/o ) {
$output .= "all-local: \$(TMPINSTALL_FILES)\n\n";
$output .= "$k =\n";
$output .= "CLEANFILES ";
if ( $predefs{"CLEANFILES"} ) { $output .= "+"; }
$output .= "= \$($k)\n";
$predefs{"CLEANFILES"} = 1;
} elsif ( $k =~ /.*DIRS/o ) {
$output .= "$k =\n";
$output .= "DISTCLEANFILES ";
if ( $predefs{"DISTCLEANFILES"} ) { $output .= "+"; }
$output .= "= \$($k)\n";
$predefs{"DISTCLEANFILES"} = 1;
}
$output .= "\n";
}
# Pretty printing
$output .= join ( '', @buffer3 );
$output =~ s/\nelse\n+endif/\nendif/g;
$output =~ s/\n\n+endif/\nendif/g;
$output =~ s/\nif [a-zA-Z0-9_!]+\n+endif//g;
print STDOUT $output;
exit 0;
sub replace($)
{
my ($v) = @_;
foreach my $i ( sort keys %dirmap )
{
$v =~ s/\Q$i/$dirmap{$i}/g;
}
return $v;
}
sub print_dirstamp($$$)
{
my ($obuf,$file,$inst) = @_ ;
push @{$obuf}, "$file/\$(dirstamp):\n\t\@\$\(MKDIR_P\) $file\n" ;
push @{$obuf}, "\t\@: \> $file/\$(dirstamp)\n" ;
push @{$obuf}, "$inst += $file/\$(dirstamp)\n\n" ;
}

View File

@@ -3,3 +3,6 @@
## Once automake is fully integrated these make targets
## and this file will probably be removed
preinstall-am: $(PREINSTALL_FILES)
preinstall: preinstall-am
.PHONY: preinstall preinstall-am

5
automake/local.am Normal file
View File

@@ -0,0 +1,5 @@
preinstall-am: $(PREINSTALL_FILES)
preinstall: preinstall-am
.PHONY: preinstall preinstall-am
PROJECT_TOOLS = $(PROJECT_RELEASE)/build-tools

View File

@@ -5,3 +5,26 @@
## Once automake is fully integrated these make targets
## and this file will probably be removed
preinstall-recursive:
@set fnord $(MAKEFLAGS); amf=$$2; \
dot_seen=no; \
target=`echo $@ | sed s/-recursive//`; \
list='$(SUBDIRS)'; for subdir in $$list; do \
echo "Making $$target in $$subdir"; \
if test "$$subdir" = "."; then \
dot_seen=yes; \
local_target="$$target-am"; \
else \
local_target="$$target"; \
fi; \
(cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
## This trick allows "-k" to keep its natural meaning when running a
## recursive rule.
|| case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
done; \
if test "$$dot_seen" = "no"; then \
$(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
fi; test -z "$$fail"
preinstall: preinstall-recursive
.PHONY: preinstall-recursive

153
bootstrap
View File

@@ -13,9 +13,6 @@
progname=`basename $0`
top_srcdir=`dirname $0`
LC_ALL=C
export LC_ALL
verbose=""
quiet="false"
mode="autoreconf"
@@ -24,18 +21,48 @@ force=0
usage()
{
echo
echo "usage: ${progname} [-c|-h|-H] [-q][-v]"
echo "usage: ${progname} [-c|-p|-h] [-q][-v]"
echo
echo "options:"
echo " -c .. clean, remove all aclocal/autoconf/automake generated files"
echo " -h .. display this message and exit"
echo " -H .. regenerate headers.am files"
echo " -p .. regenerate preinstall.am files"
echo " -q .. quiet, don't display directories"
echo " -v .. verbose, pass -v to autotools"
echo
exit 1
}
generate_bspdir_acinclude()
{
cat << EOF > acinclude.m4~
# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY)
AC_DEFUN([RTEMS_CHECK_BSPDIR],
[
case "\$1" in
EOF
for i in `LANG=C LC_COLLATE=C ls */bsp_specs | sort`; do
d=`dirname $i`
cat << EOF >> acinclude.m4~
$d )
AC_CONFIG_SUBDIRS([$d]);;
EOF
done
cat << EOF >> acinclude.m4~
*)
AC_MSG_ERROR([Invalid BSP]);;
esac
])
EOF
if cmp -s acinclude.m4 acinclude.m4~ 2>/dev/null; then
echo "acinclude.m4 is unchanged"
else
cp acinclude.m4~ acinclude.m4
fi
rm -f acinclude.m4~
}
if test ! -f $top_srcdir/aclocal/version.m4; then
echo "${progname}:"
echo " Installation problem: Can't find file aclocal/version.m4"
@@ -58,8 +85,8 @@ case $1 in
-f|--fo|--for|--forc|--force)
force=`expr $force + 1`
shift;;
-H|--headers)
mode="headers"
-p|--pr|--pre|--prei|--prein|--preins|--preinst)
mode="preinstall"
shift;;
-r|--re|--rec|--reco|--recon|--reconf)
mode="autoreconf"
@@ -75,107 +102,13 @@ esac
done
case $mode in
headers)
if test "." != "$top_srcdir"; then
echo "To generate the headers.am you must call the script via \"./$progname -H\""
exit 1
fi
base="$PWD"
# Generate cpukit/header-dirs.am
tmp="$base/cpukit/header-dirs.am.new"
hdr_dirs=`for i in cpukit/include cpukit/libnetworking cpukit/score/cpu/*/include ; do
cd "$i"
find -mindepth 1 -type d
cd "$base"
done | sort -u | sed 's%^\./%%'`
echo '## This file was generated by "./boostrap -H".' > "$tmp"
echo 'include_HEADERS =' >> "$tmp"
for dir in $hdr_dirs ; do
am_dir=`echo $dir | sed 's%[/-]%_%g'`
echo "include_${am_dir}dir = \$(includedir)/$dir" >> "$tmp"
echo "include_${am_dir}_HEADERS =" >> "$tmp"
preinstall)
confs=`find . -name Makefile.am -exec grep -l 'include .*/preinstall\.am' {} \;`
for i in $confs; do
dir=$(dirname $i)
test "$quite" = "true" || echo "Generating $dir/preinstall.am"
${top_srcdir}/ampolish3 "$dir/Makefile.am" > "$dir/preinstall.am"
done
diff -q "$tmp" "cpukit/header-dirs.am" || mv "$tmp" "cpukit/header-dirs.am"
rm -f "$tmp"
# Generate cpukit/*/headers.am
tmp="$base/headers.am.new"
cpukit="$base/cpukit"
cd "$cpukit"
for inc in include score/cpu/*/include ; do
echo '## This file was generated by "./boostrap -H".' > "$tmp"
hdr=`dirname $inc`
am_dir=""
cd $inc
for b in `find -type d | sort` ; do
for j in `find $b -mindepth 1 -maxdepth 1 -name '*.h' | sed 's%^\.%%' | sed 's%^/%%' | sort` ; do
dir=`dirname $j`
if test x$dir != x. ; then
am_dir=`echo $dir | sed 's%[/-]%_%g'`
am_dir="_$am_dir"
else
am_dir=""
fi
echo "include${am_dir}_HEADERS += $inc/$j" >> "$tmp"
done
done
cd "$cpukit"
diff -q "$tmp" "${hdr}/headers.am" || mv "$tmp" "${hdr}/headers.am"
done
rm -f "$tmp"
cd "$base"
# Generate bsps/*/headers.am
tmp="$base/headers.am.new"
for i in bsps/include bsps/*/include bsps/*/*/include ; do
dir=""
am_dir=""
echo '## This file was generated by "./boostrap -H".' > "$tmp"
case $i in
bsps/*/*/include)
hdr="../"
inc="../../../../../../$i/"
;;
bsps/*/include)
hdr="../"
inc="../../../../../$i/"
;;
bsps/include)
hdr="../"
inc="../../$i/"
;;
*)
hdr=""
inc=""
;;
esac
cd $i
for b in `find -type d | sort` ; do
for j in `find $b -mindepth 1 -maxdepth 1 -name '*.h' -or -name '*.inc' | sed 's%^\.%%' | sed 's%^/%%' | sort` ; do
d=`dirname $j`
if test x$d != x$dir ; then
dir=$d
if test x$d != x. ; then
am_dir=`echo $dir | sed 's%[/-]%_%g'`
am_dir="_$am_dir"
printf "\ninclude%sdir = \$(includedir)/$dir\n" "$am_dir" >> "$tmp"
else
am_dir=""
echo "" >> "$tmp"
fi
echo "include${am_dir}_HEADERS =" >> "$tmp"
fi
echo "include${am_dir}_HEADERS += $inc$j" >> "$tmp"
if test $j = bsp.h ; then
echo "include_HEADERS += include/bspopts.h" >> "$tmp"
fi
done
done
cd "$base"
diff -q "$tmp" "$i/${hdr}headers.am" || mv "$tmp" "$i/${hdr}headers.am"
done
rm -f "$tmp"
;;
generate)
@@ -216,6 +149,8 @@ generate)
configure=`basename $i`
( test "$quiet" = "true" || echo "$dir"
cd $dir
test -n "`grep RTEMS_CHECK_BSPDIR ${configure}`" && \
generate_bspdir_acinclude
pat="s,\$(RTEMS_TOPdir),${aclocal_dir},g"
aclocal_args=`grep '^[ ]*ACLOCAL_AMFLAGS' Makefile.am | \
sed -e 's%.*ACLOCAL_AMFLAGS.*\=[ ]*%%g' -e $pat `
@@ -246,6 +181,8 @@ autoreconf)
configure=`basename $i`
( test "$quiet" = "true" || echo "$dir"
cd $dir
test -n "`grep RTEMS_CHECK_BSPDIR ${configure}`" && \
generate_bspdir_acinclude
${AUTORECONF} -i --no-recursive $verbose
test -f Makefile.am && test -n "`grep 'stamp-h\.in' Makefile.in`" \
&& echo timestamp > stamp-h.in
@@ -315,7 +252,7 @@ clean)
find . -name 'config.status' -print | xargs rm -f
find . -name 'config.log' -print | xargs rm -f
find . -name 'config.cache' -print | xargs rm -f
find . -name 'Makefile' -and -not -path ./testsuites/ada/sptests/sp19/Makefile -print | xargs rm -f
find . -name 'Makefile' -print | xargs rm -f
find . -name '.deps' -print | xargs rm -rf
find . -name '.libs' -print | xargs rm -rf
find . -name 'stamp-h.in' | xargs rm -rf

View File

@@ -1,12 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9
#CFLAGS_OPTIMIZE_V ?= -O0 -g
CFLAGS_OPTIMIZE_V ?= -O2 -g
# Add CFLAGS and LDFLAGS for compiling and linking with per item sections
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

View File

@@ -1,164 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <libchip/ns16550.h>
#include <rtems/bspIo.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/alt_clock_manager.h>
#include <bsp/console-termios.h>
#include <bsp/socal/alt_rstmgr.h>
#include <bsp/socal/socal.h>
#include <bsp/socal/alt_uart.h>
#include <bsp/socal/hps.h>
#ifdef BSP_USE_UART_INTERRUPTS
#define DEVICE_FNS &ns16550_handler_interrupt
#else
#define DEVICE_FNS &ns16550_handler_polled
#endif
static uint8_t altera_cyclone_v_uart_get_register(uintptr_t addr, uint8_t i)
{
volatile uint32_t *reg = (volatile uint32_t *) addr;
return (uint8_t) reg [i];
}
static void altera_cyclone_v_uart_set_register(uintptr_t addr, uint8_t i, uint8_t val)
{
volatile uint32_t *reg = (volatile uint32_t *) addr;
reg [i] = val;
}
static bool altera_cyclone_v_uart_probe(
rtems_termios_device_context *base,
uint32_t uart_set_mask
)
{
ns16550_context *ctx = (ns16550_context *) base;
bool ret = true;
uint32_t ucr;
ALT_STATUS_CODE sc;
void* location = (void *) ctx->port;
/* The ALT_CLK_L4_SP is required for all SoCFPGA UARTs.
* Check that it's enabled. */
if ( alt_clk_is_enabled(ALT_CLK_L4_SP) != ALT_E_TRUE ) {
ret = false;
}
if ( ret ) {
sc = alt_clk_freq_get(ALT_CLK_L4_SP, &ctx->clock);
if ( sc != ALT_E_SUCCESS ) {
ret = false;
}
}
if ( ret ) {
// Bring UART out of reset.
alt_clrbits_word(ALT_RSTMGR_PERMODRST_ADDR, uart_set_mask);
// Verify the UCR (UART Component Version)
ucr = alt_read_word( ALT_UART_UCV_ADDR( location ) );
if ( ucr != ALT_UART_UCV_UART_COMPONENT_VER_RESET ) {
ret = false;
}
}
if ( ret ) {
// Write SRR::UR (Shadow Reset Register :: UART Reset)
alt_write_word( ALT_UART_SRR_ADDR( location ), ALT_UART_SRR_UR_SET_MSK );
// Read the MSR to work around case:119085.
(void)alt_read_word( ALT_UART_MSR_ADDR( location ) );
ret = ns16550_probe( base );
}
return ret;
}
#ifdef CYCLONE_V_CONFIG_CONSOLE
static bool altera_cyclone_v_uart_probe_0(rtems_termios_device_context *base)
{
return altera_cyclone_v_uart_probe(base, ALT_RSTMGR_PERMODRST_UART0_SET_MSK);
}
static ns16550_context altera_cyclone_v_uart_context_0 = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"),
.get_reg = altera_cyclone_v_uart_get_register,
.set_reg = altera_cyclone_v_uart_set_register,
.port = (uintptr_t) ALT_UART0_ADDR,
.irq = ALT_INT_INTERRUPT_UART0,
.initial_baud = CYCLONE_V_UART_BAUD
};
#endif
#ifdef CYCLONE_V_CONFIG_UART_1
static bool altera_cyclone_v_uart_probe_1(rtems_termios_device_context *base)
{
return altera_cyclone_v_uart_probe(base, ALT_RSTMGR_PERMODRST_UART1_SET_MSK);
}
static ns16550_context altera_cyclone_v_uart_context_1 = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
.get_reg = altera_cyclone_v_uart_get_register,
.set_reg = altera_cyclone_v_uart_set_register,
.port = (uintptr_t) ALT_UART1_ADDR,
.irq = ALT_INT_INTERRUPT_UART1,
.initial_baud = CYCLONE_V_UART_BAUD
};
#endif
const console_device console_device_table[] = {
#ifdef CYCLONE_V_CONFIG_CONSOLE
{
.device_file = "/dev/ttyS0",
.probe = altera_cyclone_v_uart_probe_0,
.handler = DEVICE_FNS,
.context = &altera_cyclone_v_uart_context_0.base
},
#endif
#ifdef CYCLONE_V_CONFIG_UART_1
{
.device_file = "/dev/ttyS1",
.probe = altera_cyclone_v_uart_probe_1,
.handler = DEVICE_FNS,
.context = &altera_cyclone_v_uart_context_1.base
},
#endif
};
const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
static void output_char(char c)
{
rtems_termios_device_context *ctx = console_device_table[0].context;
ns16550_polled_putchar( ctx, c );
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = NULL;

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@@ -1,85 +0,0 @@
/**
* @defgroup RTEMSBSPsARMCycVContrib Contributed Code
*
* @ingroup RTEMSBSPsARMCycV
*
* @brief Contributed code from Altera.
*/
/**
* @defgroup CACHE_MGR Cache Management API
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ALT_DMA DMA Controller API
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ALT_DMA_COMMON DMA Controller Common API Definitions
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ALT_DMA_PRG DMA Controller Programming API
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ALT_I2C I2C Controller API
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup INT_COMMON Interrupt Controller Common Definitions
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ALT_QSPI QSPI Flash Controller Module
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ALT_SOCAL_UTIL SoCAL Utilities
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ADDR_SPACE_MGR The Address Space Manager
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup CLK_MGR The Clock Manager API
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup ALT_GPIO_API The General Purpose Input/Output Manager API
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup RST_MGR The Reset Manager
*
* @ingroup RTEMSBSPsARMCycVContrib
*/
/**
* @defgroup UART UART Driver API
*
* @ingroup RTEMSBSPsARMCycVContrib
*/

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@@ -1,45 +0,0 @@
## This file was generated by "./boostrap -H".
include_HEADERS =
include_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp.h
include_HEADERS += include/bspopts.h
include_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/tm27.h
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS =
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_16550_uart.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_address_space.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_cache.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_clock_group.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_clock_manager.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_dma.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_dma_common.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_dma_program.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_generalpurpose_io.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_hwlibs_ver.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_i2c.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_interrupt_common.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_mpu_registers.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_qspi_private.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/alt_reset_manager.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
include_bsp_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/irq.h
include_bsp_socaldir = $(includedir)/bsp/socal
include_bsp_socal_HEADERS =
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_acpidmap.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_clkmgr.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_dmanonsecure.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_dmasecure.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_gpio.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_i2c.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_l3.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_qspi.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_qspidata.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_rstmgr.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_sdr.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_sysmgr.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/alt_uart.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/hps.h
include_bsp_socal_HEADERS += ../../../../../../bsps/arm/altera-cyclone-v/include/bsp/socal/socal.h

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@@ -1,221 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycVI2C
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/i2cdrv.h>
#include <assert.h>
#include <rtems/libio.h>
#include "i2cdrv-config.h"
typedef struct {
ALT_I2C_DEV_t i2c_dev;
rtems_id mutex;
} i2cdrv_entry;
i2cdrv_entry i2cdrv_table[CYCLONE_V_NO_I2C];
static ALT_I2C_DEV_t *get_device(i2cdrv_entry *e)
{
return &e->i2c_dev;
}
static rtems_status_code init_i2c_module(
i2cdrv_entry *e,
const i2cdrv_configuration *cfg
)
{
ALT_STATUS_CODE asc = ALT_E_SUCCESS;
ALT_I2C_CTLR_t controller = cfg->controller;
ALT_I2C_DEV_t *dev = get_device(e);
ALT_I2C_MASTER_CONFIG_t i2c_cfg = {
.addr_mode = ALT_I2C_ADDR_MODE_7_BIT,
.restart_enable = false,
};
asc = alt_i2c_init(controller, dev);
if ( asc != ALT_E_SUCCESS ) {
return RTEMS_IO_ERROR;
}
asc = alt_i2c_op_mode_set(dev, ALT_I2C_MODE_MASTER);
if ( asc != ALT_E_SUCCESS ) {
return RTEMS_IO_ERROR;
}
asc = alt_i2c_master_config_speed_set(dev, &i2c_cfg, cfg->speed);
if ( asc != ALT_E_SUCCESS ) {
return RTEMS_IO_ERROR;
}
asc = alt_i2c_master_config_set(dev, &i2c_cfg);
if ( asc != ALT_E_SUCCESS ) {
return RTEMS_IO_ERROR;
}
asc = alt_i2c_enable(dev);
if ( asc != ALT_E_SUCCESS ) {
return RTEMS_IO_ERROR;
}
return RTEMS_SUCCESSFUL;
}
rtems_device_driver i2cdrv_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
for ( size_t i = 0; i < CYCLONE_V_NO_I2C; ++i ) {
i2cdrv_entry *e = &i2cdrv_table[i];
const i2cdrv_configuration *cfg = &i2cdrv_config[i];
sc = rtems_io_register_name(cfg->device_name, major, i);
assert(sc == RTEMS_SUCCESSFUL);
sc = rtems_semaphore_create(
rtems_build_name ('I', '2', 'C', '0' + i),
0,
RTEMS_BINARY_SEMAPHORE | RTEMS_PRIORITY | RTEMS_INHERIT_PRIORITY,
0,
&e->mutex
);
assert(sc == RTEMS_SUCCESSFUL);
sc = init_i2c_module(e, cfg);
if ( sc != RTEMS_SUCCESSFUL ) {
/* I2C is not usable at this point. Releasing the mutex would allow the
* usage which could lead to undefined behaviour. */
return sc;
}
sc = rtems_semaphore_release(e->mutex);
assert(sc == RTEMS_SUCCESSFUL);
}
return sc;
}
rtems_device_driver i2cdrv_open(
rtems_device_major_number major,
rtems_device_major_number minor,
void *arg
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
i2cdrv_entry *e = &i2cdrv_table[minor];
sc = rtems_semaphore_obtain(e->mutex, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
return sc;
}
rtems_device_driver i2cdrv_close(
rtems_device_major_number major,
rtems_device_major_number minor,
void *arg
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
i2cdrv_entry *e = &i2cdrv_table[minor];
sc = rtems_semaphore_release(e->mutex);
return sc;
}
rtems_device_driver i2cdrv_read(
rtems_device_major_number major,
rtems_device_major_number minor,
void *arg
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
i2cdrv_entry *e = &i2cdrv_table[minor];
rtems_libio_rw_args_t *rw = arg;
ALT_I2C_DEV_t *dev = get_device(e);
ALT_STATUS_CODE asc = ALT_E_SUCCESS;
asc = alt_i2c_master_receive(dev, rw->buffer, rw->count, true, true);
if ( asc == ALT_E_SUCCESS ) {
rw->bytes_moved = rw->count;
} else {
sc = RTEMS_IO_ERROR;
}
return sc;
}
rtems_device_driver i2cdrv_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
i2cdrv_entry *e = &i2cdrv_table[minor];
rtems_libio_rw_args_t *rw = arg;
ALT_I2C_DEV_t *dev = get_device(e);
ALT_STATUS_CODE asc = ALT_E_SUCCESS;
asc = alt_i2c_master_transmit(dev, rw->buffer, rw->count, true, true);
if ( asc == ALT_E_SUCCESS ) {
rw->bytes_moved = rw->count;
} else {
sc = RTEMS_IO_ERROR;
}
return sc;
}
static rtems_status_code ioctl_set_slave_address(
i2cdrv_entry *e,
rtems_libio_ioctl_args_t *args
)
{
ALT_I2C_DEV_t *dev = get_device(e);
ALT_STATUS_CODE asc = ALT_E_SUCCESS;
uint32_t address = (uint32_t) args->buffer;
asc = alt_i2c_master_target_set(dev, address);
if ( asc != ALT_E_SUCCESS ) {
return RTEMS_IO_ERROR;
}
return RTEMS_SUCCESSFUL;
}
rtems_device_driver i2cdrv_ioctl(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
i2cdrv_entry *e = &i2cdrv_table[minor];
rtems_libio_ioctl_args_t *args = arg;
switch (args->command) {
case I2C_IOC_SET_SLAVE_ADDRESS:
sc = ioctl_set_slave_address(e, args);
break;
default:
sc = RTEMS_INVALID_NUMBER;
break;
}
return sc;
}

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@@ -1,76 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2013, 2018 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
#define LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
/**
* @defgroup RTEMSBSPsARMCycV Intel Cyclone V
*
* @ingroup RTEMSBSPsARM
*
* @brief Intel Cyclone V Board Support Package.
*
* @{
*/
#include <bspopts.h>
#define BSP_FEATURE_IRQ_EXTENSION
#ifndef ASM
#include <rtems.h>
#include <bsp/default-initial-extension.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_A9MPCORE_SCU_BASE 0xFFFEC000
#define BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
#define BSP_ARM_GIC_CPUIF_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000100 )
#define BSP_ARM_A9MPCORE_GT_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000200 )
#define BSP_ARM_GIC_DIST_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00001000 )
#ifndef BSP_ARM_A9MPCORE_PERIPHCLK
extern uint32_t altera_cyclone_v_a9mpcore_periphclk;
#define BSP_ARM_A9MPCORE_PERIPHCLK altera_cyclone_v_a9mpcore_periphclk
#define ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
#endif
#define BSP_ARM_L2C_310_BASE 0xfffef000
#define BSP_ARM_L2C_310_ID 0x410000c9
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/* @} */
#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H */

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@@ -1,61 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycVIRQ
*/
/*
* Copyright (c) 2013 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H
#define LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <bsp/arm-a9mpcore-irq.h>
#include <bsp/arm-gic-irq.h>
#include <bsp/alt_interrupt_common.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup RTEMSBSPsARMCycVIRQ Interrupt Support
*
* @ingroup RTEMSBSPsARMCycV
*
* @ingroup bsp_interrupt
*
* @brief Intel Cyclone V Interrupt Support.
*
* @{
*/
/* Use interrupt IDs as defined in alt_interrupt_common.h */
#define BSP_INTERRUPT_VECTOR_MIN ALT_INT_INTERRUPT_SGI0
#define BSP_INTERRUPT_VECTOR_MAX ALT_INT_INTERRUPT_RAM_ECC_UNCORRECTED_IRQ
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H */

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@@ -1,40 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycTM27
*/
/*
* Copyright (c) 2013 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
/**
* @defgroup RTEMSBSPsARMCycTM27 TM27 Support
*
* @ingroup RTEMSBSPsARMCycV
*
* @brief Intel Cyclone V TM27 Support.
*/
#include <bsp/arm-gic-tm27.h>
/** @} */
#endif /* __tm27_h */

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@@ -1,841 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/*
* Driver for the DS1339 RTC (Maxim Semiconductors) -> RTC1
* and the M41ST87 RTC (ST Microelectronics) -> RTC2
*
* Please note the following points:
* - The day of week is ignored.
* - The century bit is interpreted the following way:
* - century not set: TOD_BASE_YEAR .. 1999
* - century set: 2000 .. 2099
* - century not set: 2100 .. (TOD_BASE_YEAR + 200)
*/
#include <libchip/rtc.h>
#include <assert.h>
#include <rtems/score/todimpl.h>
#include <sys/filio.h>
#include <fcntl.h>
#include <string.h>
#include <unistd.h>
#include <bsp/i2cdrv.h>
#define ALTERA_CYCLONE_V_RTC_NUMBER 2
/* ******************************* DS1339 ********************************** */
#define DS1339_I2C_ADDRESS (0xD0 >> 1) /* 7-bit addressing! */
#define DS1339_I2C_BUS_DEVICE "/dev/i2c0"
#define DS1339_ADDR_TIME 0x00
#define DS1339_ADDR_CTRL 0x0E
#define DS1339_CTRL_EOSC 0x80
#define DS1339_CTRL_BBSQI 0x20
#define DS1339_CTRL_RS2 0x10
#define DS1339_CTRL_RS1 0x08
#define DS1339_CTRL_INTCN 0x04
#define DS1339_CTRL_A2IE 0x02
#define DS1339_CTRL_A1IE 0x01
#define DS1339_CTRL_DEFAULT (0x00)
#define DS1339_ADDR_STATUS 0x0F
#define DS1339_STATUS_OSF 0x80
#define DS1339_STATUS_A2F 0x02
#define DS1339_STATUS_A1F 0x01
#define DS1339_STATUS_CLEAR (0x00)
#define DS1339_ADDR_TRICKLE_CHARGE 0x10
typedef struct
{
uint8_t seconds;
uint8_t minutes;
uint8_t hours;
#define DS1339_HOURS_12_24_FLAG 0x40
#define DS1339_HOURS_AM_PM_FLAG_OR_20_HOURS 0x20
#define DS1339_HOURS_10_HOURS 0x10
uint8_t weekday;
uint8_t date;
uint8_t month;
#define DS1339_MONTH_CENTURY 0x80
uint8_t year;
}
ds1339_time_t;
/* The longest write transmission is writing the time + one address bit */
#define DS1339_MAX_WRITE_SIZE (sizeof(ds1339_time_t) + 1)
/* Functions for converting the fields */
static unsigned int ds1339_get_seconds(ds1339_time_t* time)
{
uint8_t tens = time->seconds >> 4;
uint8_t ones = time->seconds & 0x0F;
return tens * 10 + ones;
}
static unsigned int ds1339_get_minutes(ds1339_time_t* time)
{
uint8_t tens = time->minutes >> 4;
uint8_t ones = time->minutes & 0x0F;
return tens * 10 + ones;
}
static unsigned int ds1339_get_hours(ds1339_time_t* time)
{
uint8_t value = time->hours & 0x0F;
if (time->hours & DS1339_HOURS_10_HOURS)
{
value += 10;
}
if (time->hours & DS1339_HOURS_AM_PM_FLAG_OR_20_HOURS)
{
if (time->hours & DS1339_HOURS_12_24_FLAG)
value += 12;
else
value += 20;
}
return value;
}
static unsigned int ds1339_get_day_of_month(ds1339_time_t* time)
{
uint8_t tens = time->date >> 4;
uint8_t ones = time->date & 0x0F;
return tens * 10 + ones;
}
static unsigned int ds1339_get_month(ds1339_time_t* time)
{
uint8_t tens = (time->month >> 4) & 0x07;
uint8_t ones = time->month & 0x0F;
return tens * 10 + ones;
}
static unsigned int ds1339_get_year(ds1339_time_t* time)
{
unsigned int year = 1900;
year += (time->year >> 4) * 10;
year += time->year & 0x0F;
if (time->month & DS1339_MONTH_CENTURY)
year += 100;
if (year < TOD_BASE_YEAR)
year += 200;
return year;
}
static void ds1339_set_time(ds1339_time_t* time,
unsigned int second,
unsigned int minute,
unsigned int hour,
unsigned int day,
unsigned int month,
unsigned int year)
{
unsigned int tens;
unsigned int ones;
uint8_t century = 0;
tens = second / 10;
ones = second % 10;
time->seconds = tens << 4 | ones;
tens = minute / 10;
ones = minute % 10;
time->minutes = tens << 4 | ones;
tens = hour / 10;
ones = hour % 10;
time->hours = tens << 4 | ones;
/* Weekday is not used. Therefore it can be set to an arbitrary valid value */
time->weekday = 1;
tens = day / 10;
ones = day % 10;
time->date = tens << 4 | ones;
tens = month / 10;
ones = month % 10;
if ((year >= 2000) && (year < 2100))
century = DS1339_MONTH_CENTURY;
time->month = century | tens << 4 | ones;
tens = (year % 100) / 10;
ones = year % 10;
time->year = tens << 4 | ones;
}
static rtems_status_code ds1339_open_file(int* fd)
{
int rv = 0;
rtems_status_code sc = RTEMS_SUCCESSFUL;
*fd = open(DS1339_I2C_BUS_DEVICE, O_RDWR);
if (*fd == -1)
sc = RTEMS_IO_ERROR;
if (sc == RTEMS_SUCCESSFUL)
{
rv = ioctl(*fd, I2C_IOC_SET_SLAVE_ADDRESS, DS1339_I2C_ADDRESS);
if (rv == -1)
sc = RTEMS_IO_ERROR;
}
return sc;
}
/* Read size bytes from ds1339 register address addr to buf. */
static rtems_status_code ds1339_read(uint8_t addr, void* buf, size_t size)
{
int fd = -1;
int rv = 0;
rtems_status_code sc = RTEMS_SUCCESSFUL;
sc = ds1339_open_file(&fd);
if (sc == RTEMS_SUCCESSFUL)
{
rv = write(fd, &addr, sizeof(addr));
if (rv != sizeof(addr))
sc = RTEMS_IO_ERROR;
}
if (sc == RTEMS_SUCCESSFUL)
{
rv = read(fd, buf, size);
if (rv != size)
sc = RTEMS_IO_ERROR;
}
rv = close(fd);
if (rv != 0)
sc = RTEMS_IO_ERROR;
return sc;
}
/* Write size bytes from buf to ds1339 register address addr. */
static rtems_status_code ds1339_write(uint8_t addr, void* buf, size_t size)
{
int fd = -1;
int rv = 0;
rtems_status_code sc = RTEMS_SUCCESSFUL;
/* The driver never writes many bytes. Therefore it should be less expensive
* to reserve the maximum number of bytes that will be written in one go than
* use a malloc. */
uint8_t local_buf[DS1339_MAX_WRITE_SIZE];
int write_size = size + 1;
assert(write_size <= DS1339_MAX_WRITE_SIZE);
local_buf[0] = addr;
memcpy(&local_buf[1], buf, size);
sc = ds1339_open_file(&fd);
if (sc == RTEMS_SUCCESSFUL)
{
rv = write(fd, local_buf, write_size);
if (rv != write_size)
sc = RTEMS_IO_ERROR;
}
rv = close(fd);
if (rv != 0)
sc = RTEMS_IO_ERROR;
return RTEMS_SUCCESSFUL;
}
static void altera_cyclone_v_ds1339_initialize(int minor)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
uint8_t status = 0;
/* Check RTC valid */
sc = ds1339_read(DS1339_ADDR_STATUS, &status, sizeof(status));
assert(sc == RTEMS_SUCCESSFUL);
if (status & DS1339_STATUS_OSF)
{
/* RTC has been stopped. Initialise it. */
ds1339_time_t time;
uint8_t write = DS1339_CTRL_DEFAULT;
sc = ds1339_write(DS1339_ADDR_CTRL, &write, sizeof(write));
assert(sc == RTEMS_SUCCESSFUL);
write = DS1339_STATUS_CLEAR;
sc = ds1339_write(DS1339_ADDR_STATUS, &write, sizeof(write));
assert(sc == RTEMS_SUCCESSFUL);
ds1339_set_time(&time, 0, 0, 0, 1, 1, TOD_BASE_YEAR);
sc = ds1339_write(DS1339_ADDR_TIME, &time, sizeof(time));
assert(sc == RTEMS_SUCCESSFUL);
}
}
static int altera_cyclone_v_ds1339_get_time(int minor, rtems_time_of_day* tod)
{
ds1339_time_t time;
rtems_status_code sc = RTEMS_SUCCESSFUL;
rtems_time_of_day temp_tod;
sc = ds1339_read(DS1339_ADDR_TIME, &time, sizeof(time));
if (sc == RTEMS_SUCCESSFUL)
{
temp_tod.ticks = 0;
temp_tod.second = ds1339_get_seconds(&time);
temp_tod.minute = ds1339_get_minutes(&time);
temp_tod.hour = ds1339_get_hours(&time);
temp_tod.day = ds1339_get_day_of_month(&time);
temp_tod.month = ds1339_get_month(&time);
temp_tod.year = ds1339_get_year(&time);
if (_TOD_Validate(&temp_tod))
memcpy(tod, &temp_tod, sizeof(temp_tod));
else
sc = RTEMS_INVALID_CLOCK;
}
return -sc;
}
static int altera_cyclone_v_ds1339_set_time(int minor, const rtems_time_of_day* tod)
{
ds1339_time_t time;
rtems_status_code sc = RTEMS_SUCCESSFUL;
ds1339_set_time(&time,
tod->second,
tod->minute,
tod->hour,
tod->day,
tod->month,
tod->year
);
sc = ds1339_write(DS1339_ADDR_TIME, &time, sizeof(time));
return -sc;
}
static bool altera_cyclone_v_ds1339_probe(int minor)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
uint8_t buf;
/* try to read from register address 0x00 */
sc = ds1339_read(0x00, &buf, 1);
if (sc != RTEMS_SUCCESSFUL)
/* no RTC implemented */
return false;
/* try to read from register address 0x20 (not implemented in DS1339) */
sc = ds1339_read(0x20, &buf, 1);
if (sc == RTEMS_SUCCESSFUL)
/* RTC is not DS1339 */
return false;
return true;
}
/* ******************************* M41ST87 ********************************** */
#define M41ST87_I2C_ADDRESS (0xD0 >> 1) /* 7-bit addressing! */
#define M41ST87_I2C_BUS_DEVICE "/dev/i2c0"
#define M41ST87_ADDR_TIME 0x00
#define M41ST87_ADDR_CTRL 0x08
#define M41ST87_CTRL_OUT 0x80
#define M41ST87_CTRL_FT 0x40
#define M41ST87_CTRL_S 0x20
#define M41ST87_CTRL_CAL 0x1F
#define M41ST87_ADDR_ALARM_HOUR 0x0C
#define M41ST87_BIT_HT 0x40
#define M41ST87_ADDR_FLAGS 0x0F
#define M41ST87_FLAG_WDF 0x80
#define M41ST87_FLAG_AF 0x40
#define M41ST87_FLAG_BL 0x10
#define M41ST87_FLAG_OF 0x04
#define M41ST87_FLAG_TB1 0x02
#define M41ST87_FLAG_TB2 0x01
#define M41ST87_ADDR_USER_RAM 0x20
typedef struct
{
uint8_t sec100;
uint8_t seconds;
#define M41ST87_BIT_ST 0x80
uint8_t minutes;
#define M41ST87_BIT_OFIE 0x80
uint8_t hours;
#define M41ST87_BIT_CB1 0x80
#define M41ST87_BIT_CB0 0x40
uint8_t weekday;
#define M41ST87_BIT_TR 0x80
#define M41ST87_BIT_THS 0x40
#define M41ST87_BIT_CLRPW1 0x20
#define M41ST87_BIT_CLRPW0 0x10
#define M41ST87_BIT_32KE 0x08
uint8_t day;
#define M41ST87_BIT_PFOD 0x80
uint8_t month;
uint8_t year;
}
m41st87_time_t;
/* The longest write transmission is writing the time + one address bit */
#define M41ST87_MAX_WRITE_SIZE (sizeof(m41st87_time_t) + 1)
/* Functions for converting the fields */
/*
static unsigned int m41st87_get_sec100(m41st87_time_t* time)
{
uint8_t tens = time->sec100 >> 4;
uint8_t ones = time->sec100 & 0x0F;
return tens * 10 + ones;
}
*/
static unsigned int m41st87_get_seconds(m41st87_time_t* time)
{
uint8_t tens = (time->seconds >> 4) & 0x07;
uint8_t ones = time->seconds & 0x0F;
return tens * 10 + ones;
}
static unsigned int m41st87_get_minutes(m41st87_time_t* time)
{
uint8_t tens = (time->minutes >> 4) & 0x07;
uint8_t ones = time->minutes & 0x0F;
return tens * 10 + ones;
}
static unsigned int m41st87_get_hours(m41st87_time_t* time)
{
uint8_t tens = (time->hours >> 4) & 0x03;
uint8_t ones = time->hours & 0x0F;
return tens * 10 + ones;
}
/*
static unsigned int m41st87_get_day_of_week(m41st87_time_t* time)
{
return time->weekday & 0x07;
}
*/
static unsigned int m41st87_get_day_of_month(m41st87_time_t* time)
{
uint8_t tens = (time->day >> 4) & 0x03;
uint8_t ones = time->day & 0x0F;
return tens * 10 + ones;
}
static unsigned int m41st87_get_month(m41st87_time_t* time)
{
uint8_t tens = (time->month >> 4) & 0x01;
uint8_t ones = time->month & 0x0F;
return tens * 10 + ones;
}
static unsigned int m41st87_get_year(m41st87_time_t* time)
{
uint8_t century = time->hours >> 6;
uint8_t tens = time->year >> 4;
uint8_t ones = time->year & 0x0F;
return 1900 + century * 100 + tens * 10 + ones;
}
static void m41st87_set_time(m41st87_time_t* time,
unsigned int second,
unsigned int minute,
unsigned int hour,
unsigned int day,
unsigned int month,
unsigned int year)
{
unsigned int century;
unsigned int tens;
unsigned int ones;
if (year < 1900)
year = 1900;
if (year > 2399)
year = 2399;
century = (year - 1900) / 100;
/* Hundreds of seconds is not used, set to 0 */
time->sec100 = 0;
tens = second / 10;
ones = second % 10;
time->seconds = (time->seconds & 0x80) | (tens << 4) | ones;
tens = minute / 10;
ones = minute % 10;
time->minutes = (time->minutes & 0x80) | (tens << 4) | ones;
tens = hour / 10;
ones = hour % 10;
time->hours = (century << 6) | (tens << 4) | ones;
/* Weekday is not used. Therefore it can be set to an arbitrary valid value */
time->weekday = (time->weekday & 0xF8) | 1;
tens = day / 10;
ones = day % 10;
time->day = (time->day & 0x80) | (tens << 4) | ones;
tens = month / 10;
ones = month % 10;
time->month = (tens << 4) | ones;
tens = (year % 100) / 10;
ones = year % 10;
time->year = (tens << 4) | ones;
}
static rtems_status_code m41st87_open_file(int* fd)
{
int rv = 0;
rtems_status_code sc = RTEMS_SUCCESSFUL;
*fd = open(M41ST87_I2C_BUS_DEVICE, O_RDWR);
if (*fd == -1)
sc = RTEMS_IO_ERROR;
if (sc == RTEMS_SUCCESSFUL)
{
rv = ioctl(*fd, I2C_IOC_SET_SLAVE_ADDRESS, M41ST87_I2C_ADDRESS);
if (rv == -1)
sc = RTEMS_IO_ERROR;
}
return sc;
}
/* Read size bytes from m41st87 register address addr to buf. */
static rtems_status_code m41st87_read(uint8_t addr, void* buf, size_t size)
{
int fd = -1;
int rv = 0;
rtems_status_code sc = RTEMS_SUCCESSFUL;
sc = m41st87_open_file(&fd);
if (sc == RTEMS_SUCCESSFUL)
{
rv = write(fd, &addr, sizeof(addr));
if (rv != sizeof(addr))
sc = RTEMS_IO_ERROR;
}
if (sc == RTEMS_SUCCESSFUL)
{
rv = read(fd, buf, size);
if (rv != size)
sc = RTEMS_IO_ERROR;
}
rv = close(fd);
if (rv != 0)
sc = RTEMS_IO_ERROR;
return sc;
}
/* Write size bytes from buf to m41st87 register address addr. */
static rtems_status_code m41st87_write(uint8_t addr, void* buf, size_t size)
{
int fd = -1;
int rv = 0;
rtems_status_code sc = RTEMS_SUCCESSFUL;
/* The driver never writes many bytes. Therefore it should be less expensive
* to reserve the maximum number of bytes that will be written in one go than
* use a malloc. */
uint8_t local_buf[M41ST87_MAX_WRITE_SIZE];
int write_size = size + 1;
assert(write_size <= M41ST87_MAX_WRITE_SIZE);
local_buf[0] = addr;
memcpy(&local_buf[1], buf, size);
sc = m41st87_open_file(&fd);
if (sc == RTEMS_SUCCESSFUL)
{
rv = write(fd, local_buf, write_size);
if (rv != write_size)
sc = RTEMS_IO_ERROR;
}
rv = close(fd);
if (rv != 0)
sc = RTEMS_IO_ERROR;
return RTEMS_SUCCESSFUL;
}
static void altera_cyclone_v_m41st87_initialize(int minor)
{
m41st87_time_t time;
rtems_status_code sc = RTEMS_SUCCESSFUL;
uint8_t value;
/* Check RTC valid */
sc = m41st87_read(M41ST87_ADDR_TIME, &time, sizeof(time));
assert(sc == RTEMS_SUCCESSFUL);
if (time.seconds & M41ST87_BIT_ST)
{
/* RTC has been stopped. Reset stop flag. */
time.seconds = 0;
/* Initialise RTC. */
m41st87_set_time(&time, 0, 0, 0, 1, 1, TOD_BASE_YEAR);
sc = m41st87_write(M41ST87_ADDR_TIME, &time, sizeof(time));
assert(sc == RTEMS_SUCCESSFUL);
}
/* Reset HT bit */
sc = m41st87_read(M41ST87_ADDR_ALARM_HOUR, &value, 1);
assert(sc == RTEMS_SUCCESSFUL);
value &= ~M41ST87_BIT_HT;
sc = m41st87_write(M41ST87_ADDR_ALARM_HOUR, &value, 1);
assert(sc == RTEMS_SUCCESSFUL);
}
static int altera_cyclone_v_m41st87_get_time(int minor, rtems_time_of_day* tod)
{
m41st87_time_t time;
rtems_status_code sc = RTEMS_SUCCESSFUL;
rtems_time_of_day temp_tod;
sc = m41st87_read(M41ST87_ADDR_TIME, &time, sizeof(time));
if (sc != RTEMS_SUCCESSFUL)
return -sc;
temp_tod.ticks = 0;
temp_tod.second = m41st87_get_seconds(&time);
temp_tod.minute = m41st87_get_minutes(&time);
temp_tod.hour = m41st87_get_hours(&time);
temp_tod.day = m41st87_get_day_of_month(&time);
temp_tod.month = m41st87_get_month(&time);
temp_tod.year = m41st87_get_year(&time);
if (_TOD_Validate(&temp_tod))
memcpy(tod, &temp_tod, sizeof(temp_tod));
else
sc = RTEMS_INVALID_CLOCK;
return -sc;
}
static int altera_cyclone_v_m41st87_set_time(int minor, const rtems_time_of_day* tod)
{
m41st87_time_t time;
rtems_status_code sc = RTEMS_SUCCESSFUL;
/* first read to preserve the additional flags */
sc = m41st87_read(M41ST87_ADDR_TIME, &time, sizeof(time));
if (sc != RTEMS_SUCCESSFUL)
return -sc;
m41st87_set_time(&time,
tod->second,
tod->minute,
tod->hour,
tod->day,
tod->month,
tod->year
);
sc = m41st87_write(M41ST87_ADDR_TIME, &time, sizeof(time));
return -sc;
}
static bool altera_cyclone_v_m41st87_probe(int minor)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
uint8_t buf;
/* try to read from register address 0x00 */
sc = m41st87_read(0x00, &buf, 1);
if (sc != RTEMS_SUCCESSFUL)
/* no RTC implemented */
return false;
/* try to read from register address 0x20 (implemented in M41ST87) */
sc = m41st87_read(0x20, &buf, 1);
if (sc != RTEMS_SUCCESSFUL)
/* RTC is not M41ST87 */
return false;
return true;
}
/* **************************************** General ********************************** */
const rtc_fns altera_cyclone_v_ds1339_ops =
{
.deviceInitialize = altera_cyclone_v_ds1339_initialize,
.deviceGetTime = altera_cyclone_v_ds1339_get_time,
.deviceSetTime = altera_cyclone_v_ds1339_set_time
};
const rtc_fns altera_cyclone_v_m41st87_ops =
{
.deviceInitialize = altera_cyclone_v_m41st87_initialize,
.deviceGetTime = altera_cyclone_v_m41st87_get_time,
.deviceSetTime = altera_cyclone_v_m41st87_set_time
};
size_t RTC_Count = ALTERA_CYCLONE_V_RTC_NUMBER;
rtc_tbl RTC_Table[ALTERA_CYCLONE_V_RTC_NUMBER] =
{
{
.sDeviceName = "/dev/rtc",
.deviceType = RTC_CUSTOM,
.pDeviceFns = &altera_cyclone_v_ds1339_ops,
.deviceProbe = altera_cyclone_v_ds1339_probe,
.pDeviceParams = NULL,
.ulCtrlPort1 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL
},
{
.sDeviceName = "/dev/rtc",
.deviceType = RTC_CUSTOM,
.pDeviceFns = &altera_cyclone_v_m41st87_ops,
.deviceProbe = altera_cyclone_v_m41st87_probe,
.pDeviceParams = NULL,
.ulCtrlPort1 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL
}
};

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@@ -1,9 +0,0 @@
%rename endfile old_endfile
%rename startfile old_startfile
*startfile:
%{!qrtems: %(old_startfile)} \
%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}}
*endfile:
%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s}

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@@ -1,49 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2015 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <rtems/bspIo.h>
#include <rtems/score/smpimpl.h>
void bsp_fatal_extension(
rtems_fatal_source src,
bool always_set_to_false,
rtems_fatal_code code
)
{
#ifdef RTEMS_SMP
if (src == RTEMS_FATAL_SOURCE_SMP && code == SMP_FATAL_SHUTDOWN_RESPONSE) {
while (true) {
_ARM_Wait_for_event();
}
}
#endif
#if BSP_PRINT_EXCEPTION_CONTEXT
if (src == RTEMS_FATAL_SOURCE_EXCEPTION) {
rtems_exception_frame_print((const rtems_exception_frame *) code);
}
#endif
#if BSP_RESET_BOARD_AT_EXIT
bsp_reset();
#endif
}

View File

@@ -1,206 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2017, 2019 embedded brains GmbH
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp/bootcard.h>
#include <bsp/fdt.h>
#include <bsp/linker-symbols.h>
#ifdef BSP_FDT_IS_SUPPORTED
#include <bsp/arm-cp15-start.h>
#include <libcpu/arm-cp15.h>
#include <libfdt.h>
#include <rtems/sysinit.h>
#define AREA_COUNT_MAX 16
static const char memory_path[] = "/memory";
static const char reserved_memory_path[] = "/reserved-memory";
static void adjust_memory_size(const void *fdt, Memory_Area *area)
{
int node;
node = fdt_path_offset_namelen(
fdt,
memory_path,
(int) sizeof(memory_path) - 1
);
if (node >= 0) {
int len;
const void *val;
uintptr_t begin;
uintptr_t size;
uintptr_t a_bit;
val = fdt_getprop(fdt, node, "reg", &len);
if (len == 8) {
begin = fdt32_to_cpu(((fdt32_t *) val)[0]);
size = fdt32_to_cpu(((fdt32_t *) val)[1]);
} else {
begin = 0;
size = 0;
}
/*
* Remove a bit to avoid problems with speculative memory accesses beyond
* the valid memory area.
*/
a_bit = 0x100000;
if (size >= a_bit) {
size -= a_bit;
}
if (
begin == 0
&& size > (uintptr_t) bsp_section_work_end
&& (uintptr_t) bsp_section_nocache_end
< (uintptr_t) bsp_section_work_end
) {
_Memory_Set_end(area, (void *) (begin + size));
}
}
}
static Memory_Area *find_area(
Memory_Area *areas,
size_t area_count,
uint32_t begin
)
{
size_t i;
for (i = 0; i < area_count; ++i) {
uintptr_t b;
uintptr_t e;
b = (uintptr_t) _Memory_Get_begin(&areas[i]);
e = (uintptr_t) _Memory_Get_end(&areas[i]);
if (b <= begin && begin < e) {
return &areas[i];
}
}
return NULL;
}
static size_t remove_reserved_memory(
const void *fdt,
Memory_Area *areas,
size_t area_count
)
{
int node;
node = fdt_path_offset_namelen(
fdt,
reserved_memory_path,
(int) sizeof(reserved_memory_path) - 1
);
if (node >= 0) {
node = fdt_first_subnode(fdt, node);
while (node >= 0) {
int len;
const void *val;
uintptr_t area_end;
uintptr_t hole_begin;
uintptr_t hole_end;
Memory_Area *area;
val = fdt_getprop(fdt, node, "reg", &len);
if (len == 8) {
hole_begin = fdt32_to_cpu(((fdt32_t *) val)[0]);
hole_end = hole_begin + fdt32_to_cpu(((fdt32_t *) val)[1]);
} else {
rtems_panic("unexpected reserved memory area");
}
area = find_area(areas, area_count, hole_begin);
area_end = (uintptr_t) _Memory_Get_end(area);
_Memory_Set_end(area, (void *) hole_end);
if (hole_end <= area_end) {
if (area_count >= AREA_COUNT_MAX) {
rtems_panic("too many reserved memory areas");
}
area = &areas[area_count];
++area_count;
_Memory_Initialize(area, (void *) hole_end, (void *) area_end);
}
node = fdt_next_subnode(fdt, node);
}
}
return area_count;
}
static Memory_Area _Memory_Areas[AREA_COUNT_MAX];
static void bsp_memory_initialize(void)
{
size_t area_count;
const void *fdt;
size_t i;
_Memory_Initialize(
&_Memory_Areas[0],
bsp_section_work_begin,
bsp_section_work_end
);
area_count = 1;
fdt = bsp_fdt_get();
adjust_memory_size(fdt, &_Memory_Areas[0]);
area_count = remove_reserved_memory(fdt, &_Memory_Areas[0], area_count);
for (i = 0; i < area_count; ++i) {
arm_cp15_set_translation_table_entries(
_Memory_Get_begin(&_Memory_Areas[i]),
_Memory_Get_end(&_Memory_Areas[i]),
ARMV7_MMU_READ_WRITE_CACHED
);
}
}
RTEMS_SYSINIT_ITEM(
bsp_memory_initialize,
RTEMS_SYSINIT_MEMORY,
RTEMS_SYSINIT_ORDER_MIDDLE
);
#else /* !BSP_FDT_IS_SUPPORTED */
static Memory_Area _Memory_Areas[] = {
MEMORY_INITIALIZER(bsp_section_work_begin, bsp_section_work_end)
};
#endif /* BSP_FDT_IS_SUPPORTED */
static const Memory_Information _Memory_Information =
MEMORY_INFORMATION_INITIALIZER( _Memory_Areas );
const Memory_Information *_Memory_Get( void )
{
return &_Memory_Information;
}

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@@ -1,27 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2013 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp/bootcard.h>
#include <bsp/alt_reset_manager.h>
void bsp_reset(void)
{
alt_reset_cold_reset();
}

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@@ -1,55 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <rtems/score/smpimpl.h>
#include <bsp/start.h>
#include <bsp/socal/alt_rstmgr.h>
#include <bsp/socal/alt_sysmgr.h>
#include <bsp/socal/hps.h>
#include <bsp/socal/socal.h>
bool _CPU_SMP_Start_processor(uint32_t cpu_index)
{
bool started;
if (cpu_index == 1) {
alt_write_word(
ALT_SYSMGR_ROMCODE_ADDR + ALT_SYSMGR_ROMCODE_CPU1STARTADDR_OFST,
ALT_SYSMGR_ROMCODE_CPU1STARTADDR_VALUE_SET((uint32_t) _start)
);
alt_clrbits_word(
ALT_RSTMGR_MPUMODRST_ADDR,
ALT_RSTMGR_MPUMODRST_CPU1_SET_MSK
);
/*
* Wait for secondary processor to complete its basic initialization so
* that we can enable the unified L2 cache.
*/
started = _Per_CPU_State_wait_for_non_initial_state(cpu_index, 0);
} else {
started = false;
}
return started;
}

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@@ -1,119 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2013, 2018 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp/bootcard.h>
#include <bsp/fdt.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
#include <bsp/alt_clock_manager.h>
#include <libfdt.h>
#ifdef BSP_FDT_IS_SUPPORTED
uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells)
{
return intr[1] + 32;
}
static void set_clock(
const void *fdt,
int parent,
ALT_CLK_t clk,
const char *name
)
{
int node;
int len;
const uint32_t *val;
node = fdt_subnode_offset(fdt, parent, name);
val = fdt_getprop(fdt, node, "clock-frequency", &len);
if (val != NULL && len >= 4) {
alt_clk_ext_clk_freq_set(clk, fdt32_to_cpu(val[0]));
}
}
static void set_clock_by_output_name(
const void *fdt,
ALT_CLK_t clk,
const char *clock_output_name
)
{
int node;
int len;
const uint32_t *val;
node = fdt_node_offset_by_prop_value(
fdt,
-1,
"clock-output-names",
clock_output_name,
strlen(clock_output_name) + 1
);
val = fdt_getprop(fdt, node, "clock-frequency", &len);
if (val != NULL && len >= 4) {
alt_clk_ext_clk_freq_set(clk, fdt32_to_cpu(val[0]));
}
}
static void update_clocks(void)
{
const void *fdt;
int parent;
fdt = bsp_fdt_get();
/* Try to set by node name */
parent = fdt_node_offset_by_compatible(fdt, -1, "altr,clk-mgr");
parent = fdt_subnode_offset(fdt, parent, "clocks");
set_clock(fdt, parent, ALT_CLK_OSC1, "osc1");
set_clock(fdt, parent, ALT_CLK_IN_PIN_OSC2, "osc2");
set_clock(fdt, parent, ALT_CLK_F2H_PERIPH_REF, "f2s_periph_ref_clk");
set_clock(fdt, parent, ALT_CLK_F2H_SDRAM_REF, "f2s_sdram_ref_clk");
/* Try to set by "clock-output-names" property value */
set_clock_by_output_name(fdt, ALT_CLK_OSC1, "hps_0_eosc1-clk");
set_clock_by_output_name(fdt, ALT_CLK_IN_PIN_OSC2, "hps_0_eosc2-clk");
set_clock_by_output_name(fdt, ALT_CLK_F2H_PERIPH_REF, "hps_0_f2s_periph_ref_clk-clk");
set_clock_by_output_name(fdt, ALT_CLK_F2H_SDRAM_REF, "hps_0_f2s_sdram_ref_clk-clk");
}
#endif
#ifdef ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
uint32_t altera_cyclone_v_a9mpcore_periphclk;
#endif
void bsp_start(void)
{
#ifdef BSP_FDT_IS_SUPPORTED
update_clocks();
#endif
#ifdef ALTERA_CYCLONE_V_NEED_A9MPCORE_PERIPHCLK
alt_clk_freq_get(ALT_CLK_MPU_PERIPH, &altera_cyclone_v_a9mpcore_periphclk);
#endif
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

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@@ -1,100 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/arm-cp15-start.h>
#include <bsp/arm-a9mpcore-start.h>
#include <bsp/linker-symbols.h>
#include <bsp/alt_address_space.h>
#include <bsp/socal/socal.h>
#include <bsp/socal/alt_sdr.h>
#include <bsp/socal/hps.h>
/* 1 MB reset default value for address filtering start */
#define BSPSTART_L2_CACHE_ADDR_FILTERING_START_RESET 0x100000
BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
{
arm_cp15_instruction_cache_invalidate();
arm_cp15_data_cache_invalidate_all_levels();
arm_a9mpcore_start_hook_0();
}
BSP_START_TEXT_SECTION static void setup_mmu_and_cache(void)
{
uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
ARM_CP15_CTRL_A | ARM_CP15_CTRL_M,
ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
);
arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
ctrl,
(uint32_t *) bsp_translation_table_base,
ARM_MMU_DEFAULT_CLIENT_DOMAIN,
&arm_cp15_start_mmu_config_table[0],
arm_cp15_start_mmu_config_table_size
);
}
BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
{
uint32_t addr_filt_start;
uint32_t addr_filt_end;
/* Disable ECC. Preloader respectively UBoot enable ECC.
But they do run without interrupts. Our BSP will enable interrupts
and get spurious ECC error interrupts. Thus we disasable ECC
until we either know about a better handling or Altera has modified
it's SDRAM settings to not create possibly false ECC errors */
uint32_t ctlcfg = alt_read_word( ALT_SDR_CTL_CTLCFG_ADDR );
ctlcfg &= ALT_SDR_CTL_CTLCFG_ECCEN_CLR_MSK;
alt_write_word( ALT_SDR_CTL_CTLCFG_ADDR, ctlcfg );
/* Perform L3 remap register programming first by setting the desired new MPU
address space 0 mapping. Assume BOOTROM in order to be able to boot the
second core. */
alt_addr_space_remap(
ALT_ADDR_SPACE_MPU_ZERO_AT_BOOTROM,
ALT_ADDR_SPACE_NONMPU_ZERO_AT_SDRAM,
ALT_ADDR_SPACE_H2F_ACCESSIBLE,
ALT_ADDR_SPACE_LWH2F_ACCESSIBLE );
/* Next, adjust the L2 cache address filtering range. Set the start address
* to the default reset value and retain the existing end address
* configuration. */
alt_l2_addr_filter_cfg_get( &addr_filt_start, &addr_filt_end );
if ( addr_filt_start != BSPSTART_L2_CACHE_ADDR_FILTERING_START_RESET ) {
alt_l2_addr_filter_cfg_set( BSPSTART_L2_CACHE_ADDR_FILTERING_START_RESET,
addr_filt_end );
}
arm_a9mpcore_start_hook_1();
bsp_start_copy_sections();
setup_mmu_and_cache();
#ifndef RTEMS_SMP
/* Enable unified L2 cache */
rtems_cache_enable_data();
#endif
bsp_start_clear_bss();
}

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@@ -1,7 +0,0 @@
MEMORY {
RAM_MMU : ORIGIN = 0x00100000, LENGTH = 16k
NOCACHE : ORIGIN = 0x00200000, LENGTH = 1M
RAM : ORIGIN = 0x00300000, LENGTH = 256M - 1M - 1M - 1M
}
INCLUDE linkcmds.altcycv

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@@ -1,33 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMCycV
*/
/*
* Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <info@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp/arm-cp15-start.h>
const arm_cp15_start_section_config arm_cp15_start_mmu_config_table[] = {
ARMV7_CP15_START_DEFAULT_SECTIONS,
{ /* Periphery area */
.begin = 0xFC000000U,
.end = 0x00000000U,
.flags = ARMV7_MMU_DEVICE
}
};
const size_t arm_cp15_start_mmu_config_table_size =
RTEMS_ARRAY_SIZE(arm_cp15_start_mmu_config_table);

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@@ -1,92 +0,0 @@
Board support package for the Atmel SAM V71/V70/E70/S70 chip platform.
The BSP is customized to a particular board/chip variant by means of configure
command line options.
Use --enable-chip=XYZ to select the chip variant where XYZ is one of same70j19,
same70j20, same70j21, same70n19, same70n20, same70n21, same70q19, same70q20,
same70q21, sams70j19, sams70j20, sams70j21, sams70n19, sams70n20, sams70n21,
sams70q19, sams70q20, sams70q21, samv71j19, samv71j20, samv71j21, samv71n19,
samv71n20, samv71n21, samv71q19, samv71q20 and samv71q21. By default the BSP
uses the ATSAMV71Q21 chip. Not all variants are tested.
Use --enable-sdram=XYZ to select the SDRAM variant where XYZ is one of
is42s16100e-7bli and is42s16320f-7bl. Not all variants are tested with all
controller and speed combinations.
Use BOARD_MAINOSC=XYZ to set the main oscillator frequency in Hz (default
12MHz).
Use ATSAM_MCK=XYZ to set the MCK frequency that should be used. The default case
(123000000) enables operation of an external SDRAM on the SAMv71 Explained
evaluation kit. Some other configurations (e.g. 150MHz) would be too fast on
that board.
Your application can also overwrite the clock settings. If you have a
bootloader with one setting in your internal flash and an application with
another setting in your external SDRAM, you should also use the
ATSAM_CHANGE_CLOCK_FROM_SRAM=1 option. To overwrite the clock settings, define
the following structures in your application:
--------
const struct atsam_clock_config atsam_clock_config = {
.pllar_init = my_custom_pllar_value,
.mckr_init = my_custom_mckr_value,
.mck_freq = my_resulting_mck_frequency
};
const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
.sdramc_tr = my_custom_sdramc_tr_value,
.sdramc_cr = my_custom_sdramc_cr_value,
.sdramc_mdr = my_custom_sdramc_mdr_value,
.sdramc_cfr1 = my_custom_sdramc_cfr1_value
};
--------
Use ATSAM_SLOWCLOCK_USE_XTAL=0 to disable the usage of the external 32kHz
oscillator for the slow clock. This is useful for example for the SAM E70
Xplained kit.
Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default
115200).
Use ATSAM_CONSOLE_DEVICE_TYPE=XYZ to set the device type for /dev/console, use
0 for USART and 1 for UART (default USART).
Use ATSAM_CONSOLE_DEVICE_INDEX=XYZ to set the device index for /dev/console
(default 1, e.g. USART1).
Use ATSAM_CONSOLE_USE_INTERRUPTS=XYZ to set the use interrupt driven mode for
console devices (used by default).
Use ATSAM_MEMORY_TCM_SIZE=XYZ to set the size of tightly coupled memories (TCM)
in bytes (default 0x00000000).
Use ATSAM_MEMORY_INTFLASH_SIZE=XYZ to set the size of internal flash in bytes
(default is derived from chip variant).
Use ATSAM_MEMORY_INTSRAM_SIZE=XYZ to set the size of internal SRAM in bytes
(default is derived from chip variant).
Use ATSAM_MEMORY_SDRAM_SIZE=XYZ to set the size of external SDRAM in bytes
(default 0x00200000).
Use ATSAM_MEMORY_QSPIFLASH_SIZE=XYZ to set the size of QSPI flash in bytes
(default 0x00200000).
The pins may be configured by the application at link-time. See
<bsp/pin-config.h>.
The clock driver uses the ARMv7-M Systick.
The console driver supports the USART and UART devices.
The default linker command file places the code into the internal flash. Use
"LDFLAGS += -qnolinkcmds -T linkcmds.sdram" to place the code into the external
SDRAM. Use "LDFLAGS += -qnolinkcmds -T linkcmds.intsram" to place the code
into the internal SRAM.
The fast text section uses the ITCM. The fast data section uses the DTCM.
Data and instruction cache are enabled during system start. The RTEMS cache
manager is supported with exception of the freeze functions.

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@@ -1,31 +0,0 @@
/*
* Copyright (c) 2016 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp.h>
#include <chip.h>
uint32_t atsam_systick_frequency(void)
{
uint32_t mdiv = (PMC->PMC_MCKR & PMC_MCKR_MDIV_Msk) >> PMC_MCKR_MDIV_Pos;
uint32_t fclk;
if (mdiv == 3) {
fclk = BOARD_MCK * mdiv;
} else {
fclk = BOARD_MCK * (1 << mdiv);
}
return fclk;
}

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@@ -1,27 +0,0 @@
#
# The ATSAMV BSP has too little memory for some tests.
#
exclude: fileio
exclude: flashdisk01
exclude: fsdosfsname01
exclude: ftp01
exclude: jffs2_fserror
exclude: jffs2_fslink
exclude: jffs2_fspatheval
exclude: jffs2_fspermission
exclude: jffs2_fsrdwr
exclude: jffs2_fsscandir01
exclude: jffs2_fssymlink
exclude: jffs2_fstime
exclude: linpack
exclude: mghttpd01
exclude: pppd
exclude: psxconfig01
exclude: record02
exclude: sp16
exclude: sp25
exclude: sp48
exclude: spregion_err01
exclude: spstkalloc02
exclude: tmfine01

View File

@@ -1,9 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -mthumb -mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard
CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,534 +0,0 @@
/*
* Copyright (c) 2016 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/fatal.h>
#include <rtems/console.h>
#include <rtems/seterr.h>
#include <rtems/termiostypes.h>
#include <chip.h>
#include <unistd.h>
#define UART_RX_DMA_BUF_SIZE 32l
typedef struct {
char buf[UART_RX_DMA_BUF_SIZE];
LinkedListDescriporView3 desc;
} atsam_uart_rx_dma;
typedef struct {
rtems_termios_device_context base;
Uart *regs;
rtems_vector_number irq;
uint32_t id;
bool console;
bool is_usart;
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
bool transmitting;
bool rx_dma_enabled;
uint32_t rx_dma_channel;
atsam_uart_rx_dma *rx_dma;
char *volatile*rx_dma_da;
char *rx_next_read_pos;
#endif
} atsam_uart_context;
static atsam_uart_context atsam_usart_instances[] = {
{
.regs = (Uart *)USART0,
.irq = USART0_IRQn,
.id = ID_USART0,
.is_usart = true,
}
#ifdef USART1
, {
.regs = (Uart *)USART1,
.irq = USART1_IRQn,
.id = ID_USART1,
.is_usart = true,
}
#endif
#ifdef USART2
, {
.regs = (Uart *)USART2,
.irq = USART2_IRQn,
.id = ID_USART2,
.is_usart = true,
}
#endif
};
static atsam_uart_context atsam_uart_instances[] = {
{
.regs = UART0,
.irq = UART0_IRQn,
.id = ID_UART0,
.is_usart = false,
}
#ifdef UART1
, {
.regs = UART1,
.irq = UART1_IRQn,
.id = ID_UART1,
.is_usart = false,
}
#endif
#ifdef UART2
, {
.regs = UART2,
.irq = UART2_IRQn,
.id = ID_UART2,
.is_usart = false,
}
#endif
#ifdef UART3
, {
.regs = UART3,
.irq = UART3_IRQn,
.id = ID_UART3,
.is_usart = false,
}
#endif
#ifdef UART4
, {
.regs = UART4,
.irq = UART4_IRQn,
.id = ID_UART4,
.is_usart = false,
}
#endif
};
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
static void atsam_uart_interrupt(void *arg)
{
rtems_termios_tty *tty = arg;
atsam_uart_context *ctx = rtems_termios_get_device_context(tty);
Uart *regs = ctx->regs;
uint32_t sr = regs->UART_SR;
if (!ctx->rx_dma_enabled) {
while ((sr & UART_SR_RXRDY) != 0) {
char c = (char) regs->UART_RHR;
rtems_termios_enqueue_raw_characters(tty, &c, 1);
sr = regs->UART_SR;
}
} else {
while (*ctx->rx_dma_da != ctx->rx_next_read_pos) {
char c;
c = *ctx->rx_next_read_pos;
++ctx->rx_next_read_pos;
if (ctx->rx_next_read_pos >= &ctx->rx_dma->buf[UART_RX_DMA_BUF_SIZE]) {
ctx->rx_next_read_pos = &ctx->rx_dma->buf[0];
}
rtems_termios_enqueue_raw_characters(tty, &c, 1);
}
}
while (ctx->transmitting && (sr & UART_SR_TXRDY) != 0) {
rtems_termios_dequeue_characters(tty, 1);
sr = regs->UART_SR;
}
}
#endif
static bool atsam_uart_set_attributes(
rtems_termios_device_context *base,
const struct termios *term
)
{
atsam_uart_context *ctx = (atsam_uart_context *) base;
Uart *regs = ctx->regs;
rtems_termios_baud_t baud;
uint32_t mr;
baud = rtems_termios_baud_to_number(term->c_ospeed);
regs->UART_BRGR = (BOARD_MCK / baud) / 16;
if ((term->c_cflag & CREAD) != 0) {
regs->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
} else {
regs->UART_CR = UART_CR_TXEN;
}
if (ctx->is_usart) {
mr = US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK;
} else {
mr = UART_MR_FILTER_DISABLED | UART_MR_BRSRCCK_PERIPH_CLK;
}
if (ctx->is_usart) {
switch (term->c_cflag & CSIZE) {
case CS5:
mr |= US_MR_CHRL_5_BIT;
break;
case CS6:
mr |= US_MR_CHRL_6_BIT;
break;
case CS7:
mr |= US_MR_CHRL_7_BIT;
break;
default:
mr |= US_MR_CHRL_8_BIT;
break;
}
} else {
if ((term->c_cflag & CSIZE) != CS8) {
return false;
}
}
if ((term->c_cflag & PARENB) != 0) {
if ((term->c_cflag & PARODD) != 0) {
mr |= UART_MR_PAR_ODD;
} else {
mr |= UART_MR_PAR_EVEN;
}
} else {
mr |= UART_MR_PAR_NO;
}
if (ctx->is_usart) {
if ((term->c_cflag & CSTOPB) != 0) {
mr |= US_MR_NBSTOP_2_BIT;
} else {
mr |= US_MR_NBSTOP_1_BIT;
}
} else {
if ((term->c_cflag & CSTOPB) != 0) {
return false;
}
}
regs->UART_MR = mr;
return true;
}
static void atsam_uart_disable_rx_dma(atsam_uart_context *ctx)
{
if (ctx->rx_dma) {
rtems_cache_coherent_free(ctx->rx_dma);
ctx->rx_dma = NULL;
}
if (ctx->rx_dma_channel != XDMAD_ALLOC_FAILED) {
XDMAD_FreeChannel(&XDMAD_Instance, ctx->rx_dma_channel);
}
ctx->rx_dma_enabled = false;
}
static rtems_status_code atsam_uart_enable_rx_dma(atsam_uart_context *ctx)
{
eXdmadRC rc;
int channel_id;
if (ctx->rx_dma_enabled) {
return RTEMS_SUCCESSFUL;
}
/*
* Make sure everything is in a clean default state so that the cleanup works
* in an error case.
*/
ctx->rx_dma = NULL;
ctx->rx_dma_channel = XDMAD_ALLOC_FAILED;
ctx->rx_dma = rtems_cache_coherent_allocate(sizeof(*ctx->rx_dma), 0, 0);
if (ctx->rx_dma == NULL) {
atsam_uart_disable_rx_dma(ctx);
return RTEMS_NO_MEMORY;
}
ctx->rx_next_read_pos = &ctx->rx_dma->buf[0];
ctx->rx_dma_channel = XDMAD_AllocateChannel(
&XDMAD_Instance,
XDMAD_TRANSFER_MEMORY,
ctx->id
);
if (ctx->rx_dma_channel == XDMAD_ALLOC_FAILED) {
atsam_uart_disable_rx_dma(ctx);
return RTEMS_IO_ERROR;
}
rc = XDMAD_PrepareChannel(&XDMAD_Instance, ctx->rx_dma_channel);
if (rc != XDMAD_OK) {
atsam_uart_disable_rx_dma(ctx);
return RTEMS_IO_ERROR;
}
channel_id = ctx->rx_dma_channel & 0xff;
ctx->rx_dma_da =
(char *volatile*) &XDMAD_Instance.pXdmacs->XDMAC_CHID[channel_id].XDMAC_CDA;
ctx->rx_dma->desc.mbr_nda = (uint32_t)&ctx->rx_dma->desc;
ctx->rx_dma->desc.mbr_ubc =
1 |
XDMA_UBC_NVIEW_NDV3 |
XDMA_UBC_NDE_FETCH_EN |
XDMA_UBC_NDEN_UPDATED |
XDMA_UBC_NSEN_UPDATED;
ctx->rx_dma->desc.mbr_sa = (uint32_t) &ctx->regs->UART_RHR;
ctx->rx_dma->desc.mbr_da = (uint32_t) &ctx->rx_dma->buf[0];
ctx->rx_dma->desc.mbr_cfg =
XDMAC_CC_TYPE_PER_TRAN |
XDMAC_CC_MBSIZE_SINGLE |
XDMAC_CC_DSYNC_PER2MEM |
XDMAC_CC_SWREQ_HWR_CONNECTED |
XDMAC_CC_MEMSET_NORMAL_MODE |
XDMAC_CC_CSIZE_CHK_1 |
XDMAC_CC_DWIDTH_BYTE |
XDMAC_CC_SIF_AHB_IF1 |
XDMAC_CC_DIF_AHB_IF1 |
XDMAC_CC_SAM_FIXED_AM |
XDMAC_CC_DAM_UBS_AM |
XDMAC_CC_PERID(XDMAIF_Get_ChannelNumber(ctx->id, XDMAD_TRANSFER_RX));
ctx->rx_dma->desc.mbr_bc = UART_RX_DMA_BUF_SIZE - 1;
ctx->rx_dma->desc.mbr_ds = 0;
ctx->rx_dma->desc.mbr_sus = 0;
ctx->rx_dma->desc.mbr_dus = 0;
rc = XDMAD_ConfigureTransfer(
&XDMAD_Instance,
ctx->rx_dma_channel,
NULL,
XDMAC_CNDC_NDE_DSCR_FETCH_EN |
XDMAC_CNDC_NDVIEW_NDV3 |
XDMAC_CNDC_NDDUP_DST_PARAMS_UPDATED |
XDMAC_CNDC_NDSUP_SRC_PARAMS_UPDATED,
(uint32_t)&ctx->rx_dma->desc,
0);
if (rc != XDMAD_OK) {
atsam_uart_disable_rx_dma(ctx);
return RTEMS_IO_ERROR;
}
rc = XDMAD_StartTransfer(&XDMAD_Instance, ctx->rx_dma_channel);
if (rc != XDMAD_OK) {
atsam_uart_disable_rx_dma(ctx);
return RTEMS_IO_ERROR;
}
ctx->rx_dma_enabled = true;
return RTEMS_SUCCESSFUL;
}
static bool atsam_uart_first_open(
rtems_termios_tty *tty,
rtems_termios_device_context *base,
struct termios *term,
rtems_libio_open_close_args_t *args
)
{
atsam_uart_context *ctx = (atsam_uart_context *) base;
Uart *regs = ctx->regs;
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
rtems_status_code sc;
#endif
regs->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RSTSTA;
regs->UART_IDR = 0xffffffff;
PMC_EnablePeripheral(ctx->id);
rtems_termios_set_initial_baud(tty, ATSAM_CONSOLE_BAUD);
atsam_uart_set_attributes(base, term);
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
regs->UART_IER = UART_IDR_RXRDY;
sc = rtems_interrupt_handler_install(
ctx->irq,
ctx->is_usart ? "USART" : "UART",
RTEMS_INTERRUPT_SHARED,
atsam_uart_interrupt,
tty
);
if (sc != RTEMS_SUCCESSFUL) {
return false;
}
#endif
return true;
}
static void atsam_uart_last_close(
rtems_termios_tty *tty,
rtems_termios_device_context *base,
rtems_libio_open_close_args_t *args
)
{
atsam_uart_context *ctx = (atsam_uart_context *) base;
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
rtems_interrupt_handler_remove(ctx->irq, atsam_uart_interrupt, tty);
#endif
if (ctx->rx_dma_enabled) {
atsam_uart_disable_rx_dma(ctx);
}
if (!ctx->console) {
PMC_DisablePeripheral(ctx->id);
}
}
static void atsam_uart_write(
rtems_termios_device_context *base,
const char *buf,
size_t len
)
{
atsam_uart_context *ctx = (atsam_uart_context *) base;
Uart *regs = ctx->regs;
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
if (len > 0) {
ctx->transmitting = true;
regs->UART_THR = buf[0];
regs->UART_IER = UART_IDR_TXRDY;
} else {
ctx->transmitting = false;
regs->UART_IDR = UART_IDR_TXRDY;
}
#else
size_t i;
for (i = 0; i < len; ++i) {
while ((regs->UART_SR & UART_SR_TXRDY) == 0) {
/* Wait */
}
regs->UART_THR = buf[i];
}
#endif
}
#ifndef ATSAM_CONSOLE_USE_INTERRUPTS
static int atsam_uart_read(rtems_termios_device_context *base)
{
atsam_uart_context *ctx = (atsam_uart_context *) base;
Uart *regs = ctx->regs;
if ((regs->UART_SR & UART_SR_RXRDY) != 0) {
return (char) regs->UART_RHR;
} else {
return -1;
}
}
#endif
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
static int atsam_uart_ioctl(
rtems_termios_device_context *base,
ioctl_command_t request,
void *buffer
)
{
atsam_uart_context *ctx = (atsam_uart_context *) base;
rtems_status_code sc;
switch (request) {
case ATSAM_UART_ENABLE_RX_DMA:
sc = atsam_uart_enable_rx_dma(ctx);
if (sc != RTEMS_SUCCESSFUL) {
rtems_set_errno_and_return_minus_one(EIO);
} else {
ctx->rx_dma_enabled = true;
}
break;
default:
rtems_set_errno_and_return_minus_one(EINVAL);
}
return 0;
}
#endif
static const rtems_termios_device_handler atsam_uart_handler = {
.first_open = atsam_uart_first_open,
.last_close = atsam_uart_last_close,
.write = atsam_uart_write,
.set_attributes = atsam_uart_set_attributes,
#ifdef ATSAM_CONSOLE_USE_INTERRUPTS
.mode = TERMIOS_IRQ_DRIVEN,
.ioctl = atsam_uart_ioctl,
#else
.poll_read = atsam_uart_read,
.mode = TERMIOS_POLLED
#endif
};
rtems_status_code console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
size_t i;
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(atsam_usart_instances); ++i) {
char usart[] = "/dev/ttyUSARTX";
usart[sizeof(usart) - 2] = (char) ('0' + i);
rtems_termios_device_install(
&usart[0],
&atsam_uart_handler,
NULL,
&atsam_usart_instances[i].base
);
#if ATSAM_CONSOLE_DEVICE_TYPE == 0
if (i == ATSAM_CONSOLE_DEVICE_INDEX) {
atsam_usart_instances[i].console = true;
link(&usart[0], CONSOLE_DEVICE_NAME);
}
#endif
}
for (i = 0; i < RTEMS_ARRAY_SIZE(atsam_uart_instances); ++i) {
char uart[] = "/dev/ttyUARTX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
rtems_termios_device_install(
&uart[0],
&atsam_uart_handler,
NULL,
&atsam_uart_instances[i].base
);
#if ATSAM_CONSOLE_DEVICE_TYPE == 1
if (i == ATSAM_CONSOLE_DEVICE_INDEX) {
atsam_uart_instances[i].console = true;
link(&uart[0], CONSOLE_DEVICE_NAME);
}
#endif
}
return RTEMS_SUCCESSFUL;
}

View File

@@ -1,52 +0,0 @@
/*
* Copyright (c) 2016 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
#include <bsp/atsam-clock-config.h>
#include <chip.h>
#include <include/dbg_console.h>
static void atsam_debug_console_out(char c)
{
DBG_PutChar((uint8_t) c);
}
static void atsam_debug_console_init(void)
{
DBG_Configure(115200, BOARD_MCK);
BSP_output_char = atsam_debug_console_out;
}
static void atsam_debug_console_early_init(char c)
{
atsam_debug_console_init();
atsam_debug_console_out(c);
}
static int atsam_debug_console_in(void)
{
return (int) DBG_GetChar();
}
BSP_output_char_function_type BSP_output_char = atsam_debug_console_early_init;
BSP_polling_getchar_function_type BSP_poll_char = atsam_debug_console_in;
RTEMS_SYSINIT_ITEM(
atsam_debug_console_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);

File diff suppressed because it is too large Load Diff

View File

@@ -1,45 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#ifndef _BOARD_H_
#define _BOARD_H_
#ifdef __rtems__
#include <bspopts.h>
#endif /* __rtems__ */
#if defined(BOARD_SAMV71_XULT)
#include "board_v71_xult.h"
#elif defined(BOARD_SAME70_XPLD)
#include "board_e70_xpld.h"
#else
#error "board definition not correct!"
#endif
#endif /* #ifndef _BOARD_H_ */

View File

@@ -1,780 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \page samv7_Xplained_ultra_board_desc SAM V71 Xplained Ultra - Board
* Description
*
* @ingroup RTEMSBSPsARM
*
* \section Purpose
*
* This file is dedicated to describe the SAM V71 Xplained Ultra board.
*
* \section Contents
*
* - For SAM V71 Xplained Ultra board information, see
* \subpage samv7_Xplained_ultra_board_info.
* - For operating frequency information, see \subpage samv7_Xplained_ultra_opfreq.
* - For using portable PIO definitions, see \subpage samv7_Xplained_ultra_piodef.
* - For using GMAC PIO definitions, see \subpage samv7_Xplained_ultra_gmac.
* - For using ISI definitions, see \subpage samv7_Xplained_ultra_isi.
* - For on-board memories, see \subpage samv7_Xplained_ultra_mem.
* - Several USB definitions are included here,
* see \subpage samv7_Xplained_ultra_usb.
* - For External components, see \subpage samv7_Xplained_ultra_extcomp.
* - For Individual chip definition, see \subpage samv7_Xplained_ultra_chipdef.
*
* To get more software details and the full list of parameters related to the
* SAM V71 Xplained Ultra board configuration, please have a look at the source
* file:
* \ref board.h, \ref board_v71_xult.h\n
*
* \section Usage
*
* - The code for booting the board is provided by startup_samv71.c and
* board_lowlevel.c.
* - For using board PIOs, board characteristics (clock, etc.) and external
* components, see board.h, board_v71_xult.h.
* - For manipulating memories, see board_memories.h.
*
* This file can be used as a template and modified to fit a custom board, with
* specific PIOs usage or memory connections.
*/
/**
* \file board.h
*
* Definition of SAM V71 Xplained Ultra board characteristics, PIOs and
* external components interface.
*/
#ifndef _BOARD_V71_XULT_H_
#define _BOARD_V71_XULT_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "include/board_lowlevel.h"
#include "include/board_memories.h"
#include "include/led.h"
#include "include/gmii.h"
#include "include/gmacb_phy.h"
#include "include/dbg_console.h"
#include "include/bmp.h"
#include "include/lcdd.h"
#include "include/ili9488.h"
#include "include/ili9488_reg.h"
#include "include/ili9488_spi.h"
#include "include/ili9488_ebi.h"
#include "include/ili9488_dma.h"
#include "include/ili9488_spi_dma.h"
#include "include/ili9488_ebi_dma.h"
#include "include/frame_buffer.h"
#include "include/lcd_color.h"
#include "include/lcd_draw.h"
#include "include/lcd_font10x14.h"
#include "include/lcd_font.h"
#include "include/lcd_gimp_image.h"
#include "include/rtc_calib.h"
#include "include/wm8904.h"
#include "include/cs2100.h"
#include "include/s25fl1.h"
#include "include/image_sensor_inf.h"
#include "include/iso7816_4.h"
#ifndef __rtems__
#if defined (__GNUC__)
#include "include/syscalls.h"
#endif
#endif /* __rtems__ */
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_board_info "SAM V71 Xplained Ultra - Board informations"
* This page lists several definition related to the board description.
*
* \section Definitions
* - \ref BOARD_NAME
*/
/** Name of the board */
#define BOARD_NAME "SAM V71 Xplained Ultra"
#define NO_PUSHBUTTON
#ifndef __rtems__
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_opfreq "SAM V71 Xplained Ultra - Operating frequencies"
* This page lists several definition related to the board operating frequency
* (when using the initialization done by board_lowlevel.c).
*
* \section Definitions
* - \ref BOARD_MAINOSC
* - \ref BOARD_MCK
*/
/** Frequency of the board main oscillator */
#define BOARD_MAINOSC 12000000
/** Master clock frequency (when using board_lowlevel.c) */
#ifdef MCK_123MHZ
#define BOARD_MCK 123000000
#else
#define BOARD_MCK 150000000
#endif
#if (BOARD_MCK==123000000)
#define PLL_MUL 0x16
#define PLL_DIV 0x01
#else // 300MHz(PCK) and 150MHz(MCK) by default
#define PLL_MUL 0x19
#define PLL_DIV 0x01
#endif
#else /* __rtems__ */
#include <bsp/atsam-clock-config.h>
#endif /* __rtems__ */
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_piodef "SAM V71 Xplained Ultra - PIO definitions"
* This pages lists all the PIOs definitions contained in board.h. The constants
* are named using the following convention: PIN_* for a constant which defines
* a single Pin instance (but may include several PIOs sharing the same
* controller), and PINS_* for a list of Pin instances.
*
* UART0
* - \ref PINS_UART0
*
* UART4
* - \ref PINS_UART4
*
* LEDs
* - \ref PIN_LED_0
* - \ref PIN_LED_1
* - \ref PINS_LEDS
*
* Push buttons
* - \ref PIN_PUSHBUTTON_0
* - \ref PIN_PUSHBUTTON_1
* - \ref PINS_PUSHBUTTONS
* - \ref PUSHBUTTON_BP0
* - \ref PUSHBUTTON_BP1
*
* PWMC
* - \ref PIN_PWMC_PWMH0
* - \ref PIN_PWMC_PWMH1
* - \ref PIN_PWM_LED0
* - \ref PIN_PWM_LED1
* - \ref CHANNEL_PWM_LED0
* - \ref CHANNEL_PWM_LED1
*
* SPI
* - \ref PIN_SPI_MISO
* - \ref PIN_SPI_MOSI
* - \ref PIN_SPI_SPCK
* - \ref PINS_SPI
*
* PCK0
* - \ref PIN_PCK0
* - \ref PIN_PCK1
* - \ref PIN_PCK2
*
* PIO PARALLEL CAPTURE
* - \ref PIN_PIODCEN1
* - \ref PIN_PIODCEN2
*
* TWI
* - \ref TWI_V3XX
* - \ref PIN_TWI_TWD0
* - \ref PIN_TWI_TWCK0
* - \ref PINS_TWI0
* - \ref PIN_TWI_TWD1
* - \ref PIN_TWI_TWCK1
* - \ref PINS_TWI1
*
* USART0
* - \ref PIN_USART0_RXD
* - \ref PIN_USART0_TXD
* - \ref PIN_USART0_CTS
* - \ref PIN_USART0_RTS
* - \ref PIN_USART0_SCK
*
* USART1
* - \ref PIN_USART1_RXD
* - \ref PIN_USART1_TXD
* - \ref PIN_USART1_CTS
* - \ref PIN_USART1_RTS
* - \ref PIN_USART1_SCK
*
* USART2
* - \ref PIN_USART2_RXD
* - \ref PIN_USART2_TXD
* - \ref PIN_USART2_CTS
* - \ref PIN_USART2_RTS
* - \ref PIN_USART2_SCK
*
* SSC
* - \ref PIN_SSC_TD
* - \ref PIN_SSC_TK
* - \ref PIN_SSC_TF
* - \ref PIN_SSC_RD
* - \ref PIN_SSC_RK
* - \ref PIN_SSC_RF
* - \ref PIN_SSC_TD
* - \ref PINS_SSC_CODEC
*
* MCAN
* - \ref PIN_MCAN0_TXD
* - \ref PIN_MCAN0_RXD
* - \ref PIN_MCAN1_TXD
* - \ref PIN_MCAN1_RXD
*/
/** SSC pin Transmitter Data (TD) */
#define PIN_SSC_TD {PIO_PD26B_TD, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SSC pin Transmitter Clock (TK) */
#define PIN_SSC_TK {PIO_PB1D_TK, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
/** SSC pin Transmitter FrameSync (TF) */
#define PIN_SSC_TF {PIO_PB0D_TF, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
/** SSC pin RD */
#define PIN_SSC_RD {PIO_PA10C_RD, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
/** SSC pin RK */
#define PIN_SSC_RK {PIO_PA22A_RK, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** SSC pin RF */
#define PIN_SSC_RF {PIO_PD24B_RF, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SSC pins definition for codec. */
#define PINS_SSC_CODEC \
{PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF, PIN_SSC_RD, PIN_SSC_RK, PIN_SSC_RF}
/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */
#define PINS_UART0 \
{PIO_PA9A_URXD0 | PIO_PA10A_UTXD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** UART pins (UTXD4 and URXD4) definitions, PD19,18. */
#define PINS_UART4 \
{PIO_PD18C_URXD4 | PIO_PD19C_UTXD4, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
/* LED pins definitions */
#define LED_YELLOW0 0
#define LED_YELLOW1 1
/** LED #0 pin definition (YELLOW). */
#define PIN_LED_0 {PIO_PC9, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/** LED #1 pin definition (YELLOW). */
#define PIN_LED_1 {PIO_PA23, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
/** List of all LEDs definitions. */
#define PINS_LEDS {PIN_LED_0, PIN_LED_1}
/** Number of LEDs */
#define LED_NUM 2
/**
* Push button #0 definition.
* Attributes = pull-up + debounce + interrupt on rising edge.
*/
#define PIN_PUSHBUTTON_0 \
{PIO_PA9, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_FALL_EDGE}
/**
* Push button #1 definition.
* Attributes = pull-up + debounce + interrupt on rising edge.
*/
#define PIN_PUSHBUTTON_1 \
{PIO_PB12, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_FALL_EDGE}
/** List of all push button definitions. */
#define PINS_PUSHBUTTONS {PIN_PUSHBUTTON_0, PIN_PUSHBUTTON_1}
/** Push button #0 index. */
#define PUSHBUTTON_BP0 0
/** Push button #1 index. */
#define PUSHBUTTON_BP1 1
/** Number of Buttons */
#define BUTTON_NUM 2
/** Index of wakeup source */
#define WKUP_IDX 6
/** PWMC PWM0 pin definition: Output High. */
#define PIN_PWMC_PWMH0 {PIO_PD20A_PWMH0, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}
/** PWMC PWM1 pin definition: Output High. */
#define PIN_PWMC_PWMH1 {PIO_PD21A_PWMH1, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}
/** PWM pins definition for LED0 */
#define PIN_PWM_LED0 PIN_PWMC_PWMH0
/** PWM pins definition for LED1 */
#define PIN_PWM_LED1 PIN_PWMC_PWMH1
/** PWM channel for LED0 */
#define CHANNEL_PWM_LED0 0
/** PWM channel for LED1 */
#define CHANNEL_PWM_LED1 1
/** SPI MISO pin definition. */
#define PIN_SPI_MISO {PIO_PD20B_SPI0_MISO, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI MOSI pin definition. */
#define PIN_SPI_MOSI {PIO_PD21B_SPI0_MOSI, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI SPCK pin definition. */
#define PIN_SPI_SPCK {PIO_PD22B_SPI0_SPCK, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI chip select pin definition. */
#define PIN_SPI_NPCS0 {PIO_PB2D_SPI0_NPCS0, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
#define PIN_SPI_NPCS1 {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
#define PIN_SPI_NPCS3 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** List of SPI pin definitions (MISO, MOSI & SPCK). */
#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK
/** PCK0 */
#define PIN_PCK0 {PIO_PB13B_PCK0, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT}
/** PCK1 */
#define PIN_PCK1 {PIO_PA17B_PCK1, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT}
/** PCK2 */
#define PIN_PCK2 {PIO_PA18B_PCK2, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
/** PIO PARALLEL CAPTURE */
/** Parallel Capture Mode Data Enable1 */
#define PIN_PIODCEN1 PIO_PA15
/** Parallel Capture Mode Data Enable2 */
#define PIN_PIODCEN2 PIO_PA16
/** TWI version 3.xx */
#define TWI_V3XX
/** TWI0 data pin */
#define PIN_TWI_TWD0 {PIO_PA3A_TWD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** TWI0 clock pin */
#define PIN_TWI_TWCK0 {PIO_PA4A_TWCK0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** TWI0 pins */
#define PINS_TWI0 {PIN_TWI_TWD0, PIN_TWI_TWCK0}
/** TWI1 data pin */
#define PIN_TWI_TWD1 {PIO_PB4A_TWD1, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
/** TWI1 clock pin */
#define PIN_TWI_TWCK1 {PIO_PB5A_TWCK1, PIOB, ID_PIOB, PIO_PERIPH_A,PIO_DEFAULT}
/** TWI1 pins */
#define PINS_TWI1 {PIN_TWI_TWD1, PIN_TWI_TWCK1}
/** USART0 pin RX */
#define PIN_USART0_RXD {PIO_PB0C_RXD0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin TX */
#define PIN_USART0_TXD {PIO_PB1C_TXD0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin CTS */
#define PIN_USART0_CTS {PIO_PB2C_CTS0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin RTS */
#define PIN_USART0_RTS {PIO_PB3C_RTS0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin SCK */
#define PIN_USART0_SCK {PIO_PB13C_SCK0, PIOB, ID_PIOB, PIO_PERIPH_C,PIO_DEFAULT}
/** USART1 pin RX */
#define PIN_USART1_RXD {PIO_PA21A_RXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin TX */
#define PIN_USART1_TXD {PIO_PB4D_TXD1, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
/** USART1 pin CTS */
#define PIN_USART1_CTS {PIO_PA25A_CTS1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin RTS */
#define PIN_USART1_RTS {PIO_PA24A_RTS1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin ENABLE */
#define PIN_USART1_EN {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
/** USART1 pin SCK */
#define PIN_USART1_SCK {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART2 pin RX */
#define PIN_USART2_RXD {PIO_PD15B_RXD2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin TX */
#define PIN_USART2_TXD {PIO_PD16B_TXD2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin CTS */
#define PIN_USART2_CTS {PIO_PD19B_CTS2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin RTS */
#define PIN_USART2_RTS {PIO_PD18B_RTS2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin SCK */
#define PIN_USART2_SCK {PIO_PD17B_SCK2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/*Pins for USART0 as 7816 mode*/
/** PIN used for reset the smartcard */
#define PIN_ISO7816_RSTMC {PIO_PB2C_CTS0, PIOB, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT}
/** Pins used for connect the smartcard */
#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK,PIN_ISO7816_RSTMC
/** MCAN0 pin Transmit Data (TXD) */
#define PIN_MCAN0_TXD {PIO_PB2A_CANTX0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** MCAN0 pin Receive Data (RXD) */
#define PIN_MCAN0_RXD {PIO_PB3A_CANRX0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** MCAN1 pin Transmit Data (TXD) */
#define PIN_MCAN1_TXD {PIO_PC14C_CANTX1, PIOC, ID_PIOC, PIO_PERIPH_C, PIO_DEFAULT}
/** MCAN1 pin Receive Data (RXD) */
#define PIN_MCAN1_RXD {PIO_PC12C_CANRX1, PIOC, ID_PIOC, PIO_PERIPH_C, PIO_DEFAULT}
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_gmac "SAM V71 Xplained Ultra - GMAC"
* \section GMAC
* - \ref BOARD_GMAC_PHY_ADDR
* - \ref BOARD_GMAC_PHY_COMP_KSZ8061RNB
* - \ref BOARD_GMAC_MODE_RMII
* - \ref BOARD_GMAC_PINS
* - \ref BOARD_GMAC_RESET_PIN
*
*/
/** PHY address */
#define BOARD_GMAC_PHY_ADDR 1
/** PHY Component */
#define BOARD_GMAC_PHY_COMP_KSZ8061RNB 1
/** Board GMAC power control - ALWAYS ON */
#define BOARD_GMAC_POWER_ALWAYS_ON
/** Board GMAC work mode - RMII/MII (1 / 0) */
#define BOARD_GMAC_MODE_RMII 1
/** The PIN list of PIO for GMAC */
#define BOARD_GMAC_PINS \
{ (PIO_PD0A_GTXCK | PIO_PD1A_GTXEN | PIO_PD2A_GTX0 | PIO_PD3A_GTX1 \
| PIO_PD4A_GRXDV | PIO_PD5A_GRX0 | PIO_PD6A_GRX1 | PIO_PD7A_GRXER \
| PIO_PD8A_GMDC | PIO_PD9A_GMDIO),PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}, \
{PIO_PC30, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP},\
{PIO_PA29, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
/** The PIN list of PIO for GMAC */
#define BOARD_GMAC_RESET_PIN {PIO_PC10, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_PULLUP}
/** The runtime pin configure list for GMAC */
#define BOARD_GMAC_RUN_PINS BOARD_GMAC_PINS
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_isi "SAM V71 Xplained Ultra - ISI"
* This page lists all the IO definitions connected to ISI module.
* ISI
* - \ref PIN_ISI_D0
* - \ref PIN_ISI_D1
* - \ref PIN_ISI_D2
* - \ref PIN_ISI_D3
* - \ref PIN_ISI_D4
* - \ref PIN_ISI_D5
* - \ref PIN_ISI_D6
* - \ref PIN_ISI_D7
* - \ref PIN_ISI_D8
* - \ref PIN_ISI_D9
* - \ref BOARD_ISI_VSYNC
* - \ref BOARD_ISI_HSYNC
* - \ref BOARD_ISI_PCK
* - \ref BOARD_ISI_PINS
*
*/
#define PIN_ISI_D0 {PIO_PD22D_ISI_D0, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D1 {PIO_PD21D_ISI_D1, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D2 {PIO_PB3D_ISI_D2, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D3 {PIO_PA9B_ISI_D3, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_PULLUP}
#define PIN_ISI_D4 {PIO_PA5B_ISI_D4, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_PULLUP}
#define PIN_ISI_D5 {PIO_PD11D_ISI_D5, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D6 {PIO_PD12D_ISI_D6, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D7 {PIO_PA27D_ISI_D7, PIOA, ID_PIOA, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D8 {PIO_PD27D_ISI_D8, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D9 {PIO_PD28D_ISI_D9, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define BOARD_ISI_VSYNC {PIO_PD25D_ISI_VSYNC, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_DEFAULT}
#define BOARD_ISI_HSYNC {PIO_PD24D_ISI_HSYNC, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_DEFAULT}
#define BOARD_ISI_PCK {PIO_PA24D_ISI_PCK, PIOA, ID_PIOA, PIO_PERIPH_D, PIO_DEFAULT}
#define BOARD_ISI_PCK0 { PIO_PA6B_PCK0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT }
#define BOARD_ISI_RST { 1 << 13, PIOB, ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT }
#define BOARD_ISI_PWD { 1 << 19, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT }
#define BOARD_ISI_PINS \
PIN_ISI_D0, PIN_ISI_D1, PIN_ISI_D2,PIN_ISI_D3,PIN_ISI_D4, PIN_ISI_D5,\
PIN_ISI_D6,PIN_ISI_D7,PIN_ISI_D8, PIN_ISI_D9,BOARD_ISI_VSYNC ,\
BOARD_ISI_HSYNC ,BOARD_ISI_PCK, BOARD_ISI_RST, BOARD_ISI_PWD,BOARD_ISI_PCK0
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_usb "SAM V71 Xplained Ultra - USB device"
*
* \section Definitions
* - \ref BOARD_USB_BMATTRIBUTES
*
* \section vBus
* - \ref PIN_USB_VBUS
*
*/
/**
* USB attributes configuration descriptor (bus or self powered,
* remote wakeup)
*/
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
/** USB VBus monitoring pin definition. */
#define PIN_USB_VBUS {PIO_PC16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_extcomp "SAM V71 Xplained Ultra - External components"
* This page lists the definitions related to external on-board components
* located in the board.h file for the SAM V71 Xplained Ultra board.
*
* LCD
*/
/** Indicates board has an ILI9325 external component to manage LCD. */
#define BOARD_LCD_ILI9488
//#define BOARD_LCD_SPI_EXT1
#define BOARD_LCD_SPI_EXT2
/** SPI pin definition for LCD */
#if defined (BOARD_LCD_SPI_EXT1)
/** SPI MISO pin definition. */
#define LCD_SPI_MISO {PIO_PD20B_SPI0_MISO, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI MOSI pin definition. */
#define LCD_SPI_MOSI {PIO_PD21B_SPI0_MOSI, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI SPCK pin definition. */
#define LCD_SPI_SPCK {PIO_PD22B_SPI0_SPCK, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI chip select pin definition. */
#define LCD_SPI_NPCS {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, PIO_PERIPH_B,PIO_DEFAULT}
/** SPI chip select pin definition. */
#define LCD_SPI_NPCS {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, PIO_PERIPH_B,PIO_DEFAULT}
/** LCD pins definition. */
#define BOARD_SPI_LCD_PINS {LCD_SPI_MISO, LCD_SPI_MOSI, LCD_SPI_SPCK, LCD_SPI_NPCS}
/** Back-light pin definition. */
#define BOARD_SPI_LCD_BACKLIGHT_PIN \
{PIO_PA0A_PWMC0_PWMH0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** PWMC PWM0 pin definition: Output Low. */
#define LCD_SPI_PIN_RESET {PIO_PD28, PIOD, ID_PIOD, PIO_OUTPUT_1, PIO_DEFAULT}
/** PWM channel for LED0 */
#define CHANNEL_PWM_LCD 0
#endif
/*ENDIF BOARD_LCD_SPI_EXT1 */
#if defined (BOARD_LCD_SPI_EXT2)
/** SPI MISO pin definition. */
#define LCD_SPI_MISO {PIO_PD20B_SPI0_MISO, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI MOSI pin definition. */
#define LCD_SPI_MOSI {PIO_PD21B_SPI0_MOSI, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI SPCK pin definition. */
#define LCD_SPI_SPCK {PIO_PD22B_SPI0_SPCK, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI chip select pin definition. */
#define LCD_SPI_NPCS {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, PIO_PERIPH_B,PIO_DEFAULT}
/** LCD pins definition. */
#define BOARD_SPI_LCD_PINS {LCD_SPI_MISO, LCD_SPI_MOSI, LCD_SPI_SPCK, LCD_SPI_NPCS}
/** Back-light pin definition. */
#define BOARD_SPI_LCD_PIN_BACKLIGHT \
{PIO_PC19B_PWMC0_PWMH2, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/** PWMC PWM0 pin definition: Output Low. */
#define LCD_SPI_PIN_RESET {PIO_PA24, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
/** LCD command/data select pin */
#define BOARD_SPI_LCD_PIN_CDS {PIO_PA6, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
/** PWM channel for LED0 */
#define CHANNEL_PWM_LCD 2
#endif
/*ENDIF BOARD_LCD_SPI_EXT2 */
/** SMC pin definition for LCD */
/** LCD data pin */
#define PIN_EBI_LCD_DATAL {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_LCD_DATAH_0 {0x3F, PIOE, ID_PIOE, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_LCD_DATAH_1 {PIO_PA15A_D14|PIO_PA16A_D15, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}
/** LCD WE pin */
#define PIN_EBI_LCD_NWE {PIO_PC8A_NWE, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** LCD RD pin */
#define PIN_EBI_LCD_NRD {PIO_PC11A_NRD, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/* LCD CS pin (NCS3) */
#define PIN_EBI_LCD_CS {PIO_PD19A_NCS3, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_PULLUP}
/** LCD command/data select pin */
#define BOARD_EBI_LCD_PIN_CDS {PIO_PC30, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/** Back-light pin definition. */
#define BOARD_EBI_LCD_PIN_BACKLIGHT {PIO_PC9B_TIOB7, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
/** LCD reset pin */
#define LCD_EBI_PIN_RESET {PIO_PC13, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/** LCD pins definition. */
#define BOARD_EBI_LCD_PINS \
{PIN_EBI_LCD_DATAL, PIN_EBI_LCD_DATAH_0, PIN_EBI_LCD_DATAH_1, \
PIN_EBI_LCD_NWE,PIN_EBI_LCD_NRD,PIN_EBI_LCD_CS}
/** Display width in pixels. */
#define BOARD_LCD_WIDTH 320
/** Display height in pixels. */
#define BOARD_LCD_HEIGHT 480
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_mem "SAM V71 Xplained Ultra - Memories"
* This page lists definitions related to internal & external on-board memories.
* \section SDRAM
* - \ref PIN_SDRAM_D0_7
* - \ref PIN_SDRAM_D8_13
* - \ref PIN_SDRAM_D14_15
* - \ref PIN_SDRAM_A0_9
* - \ref PIN_SDRAM_SDA10
* - \ref PIN_SDRAM_CAS
* - \ref PIN_SDRAM_RAS
* - \ref PIN_SDRAM_SDCKE
* - \ref PIN_SDRAM_SDCK
* - \ref PIN_SDRAM_SDSC
* - \ref PIN_SDRAM_NBS0
* - \ref PIN_SDRAM_NBS1
* - \ref PIN_SDRAM_SDWE
* - \ref PIN_SDRAM_BA0
*
* \section SDMMC
* - \ref BOARD_MCI_PIN_CD
* - \ref BOARD_MCI_PIN_CK
* - \ref BOARD_MCI_PINS_SLOTA
* - \ref BOARD_SD_PINS
*
* \section QSPI
* - \ref PINS_QSPI_IO
* - \ref PINS_QSPI_IO3
* - \ref PINS_QSPI
*/
/** List of all SDRAM pin definitions. */
#define BOARD_SDRAM_SIZE (2*1024*1024)
#define PIN_SDRAM_D0_7 {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_D8_13 {0x0000003F, PIOE, ID_PIOE, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_D14_15 {0x00018000, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_A0_9 {0x3FF00000, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_SDA10 {0x00002000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_CAS {0x00020000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_RAS {0x00010000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDCKE {0x00004000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDCK {0x00800000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDSC {0x00008000, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_NBS0 {0x00040000, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_NBS1 {0x00008000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDWE {0x20000000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_BA0 {0x00100000, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
#define BOARD_SDRAM_PINS PIN_SDRAM_D0_7, PIN_SDRAM_D8_13 , PIN_SDRAM_D14_15,\
PIN_SDRAM_A0_9, PIN_SDRAM_SDA10, PIN_SDRAM_BA0, \
PIN_SDRAM_CAS, PIN_SDRAM_RAS, PIN_SDRAM_SDCKE,PIN_SDRAM_SDCK,\
PIN_SDRAM_SDSC,PIN_SDRAM_NBS0 ,PIN_SDRAM_NBS1,PIN_SDRAM_SDWE
/** List of all MCI pin definitions. */
/** MCI0 Card detect pin definition. (PE5) */
#define BOARD_MCI_PIN_CD {PIO_PD18, PIOD, ID_PIOD, PIO_INPUT, PIO_PULLUP}
/** MCI0 Clock . */
#define BOARD_MCI_PIN_CK {PIO_PA25D_MCCK, PIOA, ID_PIOA, PIO_PERIPH_D, PIO_DEFAULT}
/** MCI0 Solt A IO pins definition. (PC4-PC13) */
#define BOARD_MCI_PINS_SLOTA \
{(PIO_PA30C_MCDA0 | PIO_PA31C_MCDA1 | PIO_PA26C_MCDA2 | PIO_PA27C_MCDA3 | PIO_PA28C_MCCDA),\
PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
/** MCI pins that shall be configured to access the SD card. */
#define BOARD_SD_PINS {BOARD_MCI_PINS_SLOTA, BOARD_MCI_PIN_CK}
/** MCI Card Detect pin. */
#define BOARD_SD_PIN_CD BOARD_MCI_PIN_CD
/** Total number of MCI interface */
#define BOARD_NUM_MCI 1
/** List of all SQPI pin definitions. */
#define PINS_QSPI_IO \
{(PIO_PA11A_QCS | PIO_PA13A_QIO0 | PIO_PA12A_QIO1 | PIO_PA17A_QIO2 | PIO_PA14A_QSCK),\
PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PINS_QSPI_IO3 {PIO_PD31A_QIO3, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}
#define PINS_QSPI {PINS_QSPI_IO, PINS_QSPI_IO3}
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_chipdef "SAM V71 Xplained Ultra - Individual chip definition"
* This page lists the definitions related to different chip's definition
*
* \section USART
* - \ref BOARD_PIN_USART_RXD
* - \ref BOARD_PIN_USART_TXD
* - \ref BOARD_PIN_USART_CTS
* - \ref BOARD_PIN_USART_RTS
* - \ref BOARD_PIN_USART_EN
* - \ref BOARD_USART_BASE
* - \ref BOARD_ID_USART
*/
/** Rtc */
#define BOARD_RTC_ID ID_RTC
/** TWI ID for QTouch application to use */
#define BOARD_ID_TWI_AT42 ID_TWI0
/** TWI Base for QTouch application to use */
#define BOARD_BASE_TWI_AT42 TWI0
/** TWI pins for QTouch application to use */
#define BOARD_PINS_TWI_AT42 PINS_TWI0
/** USART RX pin for application */
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
/** USART TX pin for application */
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
/** USART CTS pin for application */
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
/** USART RTS pin for application */
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
/** USART ENABLE pin for application */
#define BOARD_PIN_USART_EN PIN_USART1_EN
/** USART Base for application */
#define BOARD_USART_BASE USART1
/** USART ID for application */
#define BOARD_ID_USART ID_USART1
/*----------------------------------------------------------------------------*/
/*
* USB pins
*/
#define PINS_VBUS_EN {PIO_PC16, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
#endif /* #ifndef _BOARD_V71_XULT_H_ */

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@@ -1,119 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
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/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
* \section Purpose
*
* Utility for BMP
*
*/
#ifndef BMP_H
#define BMP_H
/** BMP magic number ('BM'). */
#define BMP_TYPE 0x4D42
/** headerSize must be set to 40 */
#define BITMAPINFOHEADER 40
/*------------------------------------------------------------------------------
* Exported types
*------------------------------------------------------------------------------*/
#pragma pack(1)
/** BMP (Windows) Header Format */
typedef struct _BMPHeader {
/* signature, must be 4D42 hex */
uint16_t type;
/* size of BMP file in bytes (unreliable) */
uint32_t fileSize;
/* reserved, must be zero */
uint16_t reserved1;
/* reserved, must be zero */
uint16_t reserved2;
/* offset to start of image data in bytes */
uint32_t offset;
/* size of BITMAPINFOHEADER structure, must be 40 */
uint32_t headerSize;
/* image width in pixels */
uint32_t width;
/* image height in pixels */
uint32_t height;
/* number of planes in the image, must be 1 */
uint16_t planes;
/* number of bits per pixel (1, 4, 8, 16, 24, 32) */
uint16_t bits;
/* compression type (0=none, 1=RLE-8, 2=RLE-4) */
uint32_t compression;
/* size of image data in bytes (including padding) */
uint32_t imageSize;
/* horizontal resolution in pixels per meter (unreliable) */
uint32_t xresolution;
/* vertical resolution in pixels per meter (unreliable) */
uint32_t yresolution;
/* number of colors in image, or zero */
uint32_t ncolours;
/* number of important colors, or zero */
uint32_t importantcolours;
} BMPHeader;
#pragma pack()
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern uint8_t BMP_IsValid(void *file);
extern uint32_t BMP_GetFileSize(void *file);
extern uint8_t BMP_Decode(
void *file,
uint8_t *buffer,
uint32_t width,
uint32_t height,
uint8_t bpp);
extern void WriteBMPheader(
uint32_t *pAddressHeader,
uint32_t bmpHSize,
uint32_t bmpVSize,
uint8_t nbByte_Pixels);
extern void BMP_displayHeader(uint32_t *pAddressHeader);
extern void RGB565toBGR555(
uint8_t *fileSource,
uint8_t *fileDestination,
uint32_t width,
uint32_t height,
uint8_t bpp);
#endif //#ifndef BMP_H

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@@ -1,47 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface for the low-level initialization function.
*
*/
#ifndef BOARD_LOWLEVEL_H
#define BOARD_LOWLEVEL_H
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LowLevelInit(void);
extern void _SetupMemoryRegion(void);
#endif /* BOARD_LOWLEVEL_H */

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@@ -1,52 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface for memories configuration on board.
*
*/
#ifndef BOARD_MEMORIES_H
#define BOARD_MEMORIES_H
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#ifndef __rtems__
extern void BOARD_ConfigureSdram(void);
#else /* __rtems__ */
extern void BOARD_ConfigureSdram(void) ATSAM_START_SRAM_SECTION;
#endif /* __rtems__ */
extern uint32_t BOARD_SdramValidation(uint32_t baseAddr, uint32_t size);
#endif /* #ifndef BOARD_MEMORIES_H */

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@@ -1,93 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Implementation WM8904 driver.
*
*/
#ifndef CS2100_H
#define CS2100_H
#include "board.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define CS2100_SLAVE_ADDRESS 0x4E
/** ID and Rev register*/
#define CS2100_REG_ID 0x01
/** VMID control 0 register*/
#define CS2100_REG_CTRL 0x02
/** MIC Bias control 0 register*/
#define CS2100_REG_DEV_CFG1 0x03
/** Bias control 1 register*/
#define CS2100_REG_CFG 0x05
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_1 0x06
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_2 0x07
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_3 0x08
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_4 0x09
/** Power management control 2 register*/
#define CS2100_REG_FUNC_CFG1 0x16
/** Power management control 3 register*/
#define CS2100_REG_FUNC_CFG2 0x17
/** Power management control 3 register*/
#define CS2100_REG_FUNC_CFG3 0x1E
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint16_t CS2100_Read(
Twid *pTwid,
uint32_t device,
uint32_t regAddr);
extern void CS2100_Write(
Twid *pTwid,
uint32_t device,
uint32_t regAddr,
uint16_t data);
extern uint8_t CS2100_Init(Twid *pTwid, uint32_t device, uint32_t PCK);
#endif // CS2100_H

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@@ -1,55 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Include function prototype for the UART console.
*/
#ifndef _DBG_CONSOLE_
#define _DBG_CONSOLE_
#include <stdint.h>
extern void DBG_Configure(uint32_t dwBaudrate, uint32_t dwMasterClock);
extern void DBG_PutChar(uint8_t uc);
extern uint32_t DBG_GetChar(void);
extern uint32_t DBG_IsRxReady(void);
extern void DBG_DumpFrame(uint8_t *pucFrame, uint32_t dwSize);
extern void DBG_DumpMemory(uint8_t *pucBuffer, uint32_t dwSize,
uint32_t dwAddress);
extern uint32_t DBG_GetInteger(int32_t *pdwValue);
extern uint32_t DBG_GetIntegerMinMax(int32_t *pdwValue, int32_t dwMin,
int32_t dwMax);
extern uint32_t DBG_GetHexa32(uint32_t *pdwValue);
#endif /* _DBG_CONSOLE_ */

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@@ -1,83 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface of frame buffer driver.
*
*/
#ifndef _FRAME_BUFFER_
#define _FRAME_BUFFER_
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void FB_SetFrameBuffer(
LcdColor_t *pBuffer,
uint8_t ucWidth,
uint8_t ucHeight);
extern void FB_SetColor(uint32_t color);
extern uint32_t FB_DrawLine (
uint32_t dwX1,
uint32_t dwY1,
uint32_t dwX2,
uint32_t dwY2);
extern uint32_t FB_DrawPixel(uint32_t x, uint32_t y);
extern uint32_t FB_DrawCircle(uint32_t x, uint32_t y, uint32_t r);
extern uint32_t FB_DrawFilledCircle(
uint32_t dwX,
uint32_t dwY,
uint32_t dwRadius);
extern uint32_t FB_DrawRectangle(
uint32_t dwX1,
uint32_t dwY1,
uint32_t dwX2,
uint32_t dwY2);
extern uint32_t FB_DrawFilledRectangle(
uint32_t dwX1,
uint32_t dwY1,
uint32_t dwX2,
uint32_t dwY2);
extern uint32_t FB_DrawPicture(
uint32_t dwX1,
uint32_t dwY1,
uint32_t dwX2,
uint32_t dwY2,
const void *pBuffer);
#endif /* #ifndef _FRAME_BUFFER_ */

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@@ -1,114 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \file */
/** \addtogroup gmacb_module Ethernet GMACB Driver
*@{
* Implement GEMAC PHY driver, that initialize the PHY to prepare for
* Ethernet transfer.
*
* \section Usage
* -# EMAC related pins and Driver should be initialized at first.
* -# Initialize GMACB Driver instance by invoking GMACB_Init().
* -# Initialize PHY connected via GMACB_InitPhy(), PHY address is
* automatically adjusted by attempt to read.
* -# Perform PHY auto negotiate through GMACB_AutoNegotiate(), so
* connection established.
*
*
* Related files:\n
* \ref gmacb.h\n
* \ref gmacb.c\n
* \ref gmii.h.\n
*
*/
/**@}*/
#ifndef _GMACB_PHY_H
#define _GMACB_PHY_H
/*---------------------------------------------------------------------------
* Headers
*---------------------------------------------------------------------------*/
#include "board.h"
/*---------------------------------------------------------------------------
* Definitions
*---------------------------------------------------------------------------*/
/** The reset length setting for external reset configuration */
#define GMACB_RESET_LENGTH 0xD
/*---------------------------------------------------------------------------
* Types
*---------------------------------------------------------------------------*/
/** The DM9161 instance */
typedef struct _GMacb {
/**< Driver */
sGmacd *pGmacd;
/** The retry & timeout settings */
uint32_t retryMax;
/** PHY address (pre-defined by pins on reset) */
uint8_t phyAddress;
} GMacb;
/*---------------------------------------------------------------------------
* Exported functions
*---------------------------------------------------------------------------*/
extern void GMACB_SetupTimeout(GMacb *pMacb, uint32_t toMax);
extern void GMACB_Init(GMacb *pMacb, sGmacd *pGmacd, uint8_t phyAddress);
extern uint8_t GMACB_InitPhy(
GMacb *pMacb,
uint32_t mck,
const Pin *pResetPins,
uint32_t nbResetPins,
const Pin *pEmacPins,
uint32_t nbEmacPins);
extern uint8_t GMACB_AutoNegotiate(GMacb *pMacb);
extern uint8_t GMACB_GetLinkSpeed(GMacb *pMacb, uint8_t applySettings);
extern uint8_t GMACB_Send(GMacb *pMacb, void *pBuffer, uint32_t size);
extern uint32_t GMACB_Poll(GMacb *pMacb, uint8_t *pBuffer, uint32_t size);
extern void GMACB_DumpRegisters(GMacb *pMacb);
extern uint8_t GMACB_ResetPhy(GMacb *pMacb);
#endif // #ifndef _GMACB_H

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@@ -1,116 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#ifndef _GMII_DEFINE_H
#define _GMII_DEFINE_H
/*---------------------------------------------------------------------------
* Definitions
*---------------------------------------------------------------------------*/
//IEEE defined Registers
#define GMII_BMCR 0x0 // Basic Mode Control Register
#define GMII_BMSR 0x1 // Basic Mode Status Register
#define GMII_PHYID1R 0x2 // PHY Identifier Register 1
#define GMII_PHYID2R 0x3 // PHY Identifier Register 2
#define GMII_ANAR 0x4 // Auto_Negotiation Advertisement Register
#define GMII_ANLPAR 0x5 // Auto_negotiation Link Partner Ability Register
#define GMII_ANER 0x6 // Auto-negotiation Expansion Register
#define GMII_ANNPR 0x7 // Auto-negotiation Next Page Register
#define GMII_ANLPNPAR 0x8 // Auto_negotiation Link Partner Next Page Ability Register
#define GMII_AFEC0R 0x11 // AFE Control 0 Register
#define GMII_AFEC3R 0x14 // AFE Control 3 Register
#define GMII_RXERCR 0x15 // RXER Counter Register
#define GMII_OMSSR 0x17 // Operation Mode Strap Status Register
#define GMII_ECR 0x18 // Expanded Control Register
#define GMII_ICSR 0x1B // Interrupt Control/Status Register
#define GMII_FC 0x1C // Function Control
#define GMII_LCSR 0x1D // LinkMD<4D> Control/Status Register
#define GMII_PC1R 0x1E // PHY Control 1 Register
#define GMII_PC2R 0x1F // PHY Control 2 Register
// PHY ID Identifier Register
#define GMII_LSB_MASK 0x0U
// definitions: MII_PHYID1
#define GMII_OUI_MSB 0x0022
// definitions: MII_PHYID2
#define GMII_OUI_LSB 0x1572 // KSZ8061 PHY Id2
// Basic Mode Control Register (BMCR)
// Bit definitions: MII_BMCR
#define GMII_RESET (1 << 15) // 1= Software Reset; 0=Normal Operation
#define GMII_LOOPBACK (1 << 14) // 1=loopback Enabled; 0=Normal Operation
#define GMII_SPEED_SELECT_LSB (1 << 13) // 1,0=1000Mbps 0,1=100Mbps; 0,0=10Mbps
#define GMII_AUTONEG (1 << 12) // Auto-negotiation Enable
#define GMII_POWER_DOWN (1 << 11) // 1=Power down 0=Normal operation
#define GMII_ISOLATE (1 << 10) // 1 = Isolates 0 = Normal operation
#define GMII_RESTART_AUTONEG (1 << 9) // 1 = Restart auto-negotiation 0 = Normal operation
#define GMII_DUPLEX_MODE (1 << 8) // 1 = Full duplex operation 0 = Normal operation
// Reserved 7 // Read as 0, ignore on write
#define GMII_SPEED_SELECT_MSB (1 << 6) //
// Reserved 5 to 0 // Read as 0, ignore on write
// Basic Mode Status Register (BMSR)
// Bit definitions: MII_BMSR
#define GMII_100BASE_T4 (1 << 15) // 100BASE-T4 Capable
#define GMII_100BASE_TX_FD (1 << 14) // 100BASE-TX Full Duplex Capable
#define GMII_100BASE_T4_HD (1 << 13) // 100BASE-TX Half Duplex Capable
#define GMII_10BASE_T_FD (1 << 12) // 10BASE-T Full Duplex Capable
#define GMII_10BASE_T_HD (1 << 11) // 10BASE-T Half Duplex Capable
// Reserved 10 to 9 // Read as 0, ignore on write
#define GMII_EXTEND_STATUS (1 << 8) // 1 = Extend Status Information In Reg 15
// Reserved 7
#define GMII_MF_PREAMB_SUPPR (1 << 6) // MII Frame Preamble Suppression
#define GMII_AUTONEG_COMP (1 << 5) // Auto-negotiation Complete
#define GMII_REMOTE_FAULT (1 << 4) // Remote Fault
#define GMII_AUTONEG_ABILITY (1 << 3) // Auto Configuration Ability
#define GMII_LINK_STATUS (1 << 2) // Link Status
#define GMII_JABBER_DETECT (1 << 1) // Jabber Detect
#define GMII_EXTEND_CAPAB (1 << 0) // Extended Capability
// Auto-negotiation Advertisement Register (ANAR)
// Auto-negotiation Link Partner Ability Register (ANLPAR)
// Bit definitions: MII_ANAR, MII_ANLPAR
#define GMII_NP (1 << 15) // Next page Indication
// Reserved 7
#define GMII_RF (1 << 13) // Remote Fault
// Reserved 12 // Write as 0, ignore on read
#define GMII_PAUSE_MASK (3 << 11) // 0,0 = No Pause 1,0 = Asymmetric Pause(link partner)
// 0,1 = Symmetric Pause 1,1 = Symmetric&Asymmetric Pause(local device)
#define GMII_T4 (1 << 9) // 100BASE-T4 Support
#define GMII_TX_FDX (1 << 8) // 100BASE-TX Full Duplex Support
#define GMII_TX_HDX (1 << 7) // 100BASE-TX Support
#define GMII_10_FDX (1 << 6) // 10BASE-T Full Duplex Support
#define GMII_10_HDX (1 << 5) // 10BASE-T Support
// Selector 4 to 0 // Protocol Selection Bits
#define GMII_AN_IEEE_802_3 0x00001
#endif // #ifndef _MII_DEFINE_H

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@@ -1,106 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface of ILI9488 driver.
*
*/
#ifndef _ILI9488_H_
#define _ILI9488_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define ILI9488_SPIMODE 0
#define ILI9488_EBIMODE 1
/* ILI9325 ID code */
#define ILI9488_DEVICE_CODE 0x9488
#define ILI9488_LCD_WIDTH 320
#define ILI9488_LCD_HEIGHT 480
#define ILI9488_SELF_TEST_OK 0xC0
/* EBI chip select for LCD */
#define SMC_EBI_LCD_CS 3
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
typedef enum {
AccessInst = 0,
AccessRead,
AccessWrite
} AccessIli_t;
typedef union _union_type {
uint32_t value;
struct {
uint8_t byte_8;
uint8_t byte_l6;
uint8_t byte_24;
uint8_t byte_32;
} byte;
struct {
uint16_t half_word_l;
uint16_t half_word_h;
} half_word;
} union_type;
typedef volatile uint8_t REG8;
typedef uint32_t LcdColor_t;
/*----------------------------------------------------------------------------
* Marcos
*----------------------------------------------------------------------------*/
/* Pixel cache used to speed up communication */
#define LCD_DATA_CACHE_SIZE BOARD_LCD_WIDTH
/*----------------------------------------------------------------------------
* Function Marcos
*----------------------------------------------------------------------------*/
#define get_0b_to_8b(x) (((union_type*)&(x))->byte.byte_8)
#define get_8b_to_16b(x) (((union_type*)&(x))->byte.byte_l6)
#define get_16b_to_24b(x) (((union_type*)&(x))->byte.byte_24)
#define get_24b_to_32b(x) (((union_type*)&(x))->byte.byte_32)
#endif /* #ifndef ILI9488 */

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@@ -1,92 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface of ILI9488 driver.
*
*/
#ifndef _ILI9488_DMA_H_
#define _ILI9488_DMA_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
/*------------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/** An unspecified error has occurred.*/
#define ILI9488_ERROR_DMA_ALLOCATE_CHANNEL 1
#define ILI9488_ERROR_DMA_CONFIGURE 2
#define ILI9488_ERROR_DMA_TRANSFER 3
#define ILI9488_ERROR_DMA_SIZE 4
#define ILI9488_SPI SPI0
#define ILI9488_SPI_ID ID_SPI0
/* EBI BASE ADDRESS for SMC LCD */
#define ILI9488_BASE_ADDRESS 0x63000000
/*------------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
typedef struct _ILI9488_dma {
/** Pointer to DMA driver */
sXdmad *xdmaD;
/** ili9488 Tx channel */
uint32_t ili9488DmaTxChannel;
/** ili9488 Rx channel */
uint32_t ili9488DmaRxChannel;
/** ili9488 Tx/Rx configure descriptor */
sXdmadCfg xdmadRxCfg, xdmadTxCfg;
/** ili9488 dma interrupt */
uint32_t xdmaInt;
/** Pointer to SPI Hardware registers */
Spi *pSpiHw;
/** SPI Id as defined in the product datasheet */
uint8_t spiId;
} sIli9488Dma;
typedef struct _ILI9488_ctl {
/** ili9488 Command/Data mode */
volatile uint32_t cmdOrDataFlag;
/** ili9488 Rx done */
volatile uint32_t rxDoneFlag;
/** ili9488 Tx done */
volatile uint32_t txDoneFlag;
} sIli9488DmaCtl;
#endif /* #ifndef ILI9488_DMA */

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@@ -1,63 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface of ILI9488 driver.
*
*/
#ifndef _ILI9488_EBI_H_
#define _ILI9488_EBI_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint32_t ILI9488_EbiReadChipId (void);
extern uint32_t ILI9488_EbiInitialize(sXdmad *dmad);
extern void ILI9488_EbiSetPixelFormat(uint16_t format);
extern void ILI9488_EbiSetCursor(uint16_t x, uint16_t y);
extern void ILI9488_EbiSetWindow(uint16_t dwX, uint16_t dwY,
uint16_t dwWidth, uint16_t dwHeight);
extern void ILI9488_EbiSetFullWindow(void);
extern void ILI9488_EbiOn(void);
extern void ILI9488_EbiOff(void);
extern void ILI9488_EbiSetDisplayLandscape(uint8_t dwRGB,
uint8_t LandscaprMode);
#endif /* #ifndef ILI9488_EBI */

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@@ -1,55 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface of ILI9488 driver.
*
*/
#ifndef _ILI9488_EBI_DMA_H_
#define _ILI9488_EBI_DMA_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint8_t ILI9488_EbiInitializeWithDma(sXdmad *dmad);
extern uint8_t ILI9488_EbiDmaTxTransfer(uint16_t *pTxBuffer, uint32_t wTxSize);
extern uint8_t ILI9488_EbiDmaRxTransfer(uint32_t *pRxBuffer, uint32_t wRxSize);
extern uint8_t ILI9488_EbiSendCommand(uint16_t Instr, uint16_t *pTxData,
uint32_t *pRxData, AccessIli_t ReadWrite, uint32_t size);
#endif /* #ifndef ILI9488_EBI_DMA */

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@@ -1,131 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#ifndef ILI9488_REG_H_INCLUDED
#define ILI9488_REG_H_INCLUDED
/* Level 1 Commands (from the display Datasheet) */
#define ILI9488_CMD_NOP 0x00
#define ILI9488_CMD_SOFTWARE_RESET 0x01
#define ILI9488_CMD_READ_DISP_ID 0x04
#define ILI9488_CMD_READ_ERROR_DSI 0x05
#define ILI9488_CMD_READ_DISP_STATUS 0x09
#define ILI9488_CMD_READ_DISP_POWER_MODE 0x0A
#define ILI9488_CMD_READ_DISP_MADCTRL 0x0B
#define ILI9488_CMD_READ_DISP_PIXEL_FORMAT 0x0C
#define ILI9488_CMD_READ_DISP_IMAGE_MODE 0x0D
#define ILI9488_CMD_READ_DISP_SIGNAL_MODE 0x0E
#define ILI9488_CMD_READ_DISP_SELF_DIAGNOSTIC 0x0F
#define ILI9488_CMD_ENTER_SLEEP_MODE 0x10
#define ILI9488_CMD_SLEEP_OUT 0x11
#define ILI9488_CMD_PARTIAL_MODE_ON 0x12
#define ILI9488_CMD_NORMAL_DISP_MODE_ON 0x13
#define ILI9488_CMD_DISP_INVERSION_OFF 0x20
#define ILI9488_CMD_DISP_INVERSION_ON 0x21
#define ILI9488_CMD_PIXEL_OFF 0x22
#define ILI9488_CMD_PIXEL_ON 0x23
#define ILI9488_CMD_DISPLAY_OFF 0x28
#define ILI9488_CMD_DISPLAY_ON 0x29
#define ILI9488_CMD_COLUMN_ADDRESS_SET 0x2A
#define ILI9488_CMD_PAGE_ADDRESS_SET 0x2B
#define ILI9488_CMD_MEMORY_WRITE 0x2C
#define ILI9488_CMD_MEMORY_READ 0x2E
#define ILI9488_CMD_PARTIAL_AREA 0x30
#define ILI9488_CMD_VERT_SCROLL_DEFINITION 0x33
#define ILI9488_CMD_TEARING_EFFECT_LINE_OFF 0x34
#define ILI9488_CMD_TEARING_EFFECT_LINE_ON 0x35
#define ILI9488_CMD_MEMORY_ACCESS_CONTROL 0x36
#define ILI9488_CMD_VERT_SCROLL_START_ADDRESS 0x37
#define ILI9488_CMD_IDLE_MODE_OFF 0x38
#define ILI9488_CMD_IDLE_MODE_ON 0x39
#define ILI9488_CMD_COLMOD_PIXEL_FORMAT_SET 0x3A
#define ILI9488_CMD_WRITE_MEMORY_CONTINUE 0x3C
#define ILI9488_CMD_READ_MEMORY_CONTINUE 0x3E
#define ILI9488_CMD_SET_TEAR_SCANLINE 0x44
#define ILI9488_CMD_GET_SCANLINE 0x45
#define ILI9488_CMD_WRITE_DISPLAY_BRIGHTNESS 0x51
#define ILI9488_CMD_READ_DISPLAY_BRIGHTNESS 0x52
#define ILI9488_CMD_WRITE_CTRL_DISPLAY 0x53
#define ILI9488_CMD_READ_CTRL_DISPLAY 0x54
#define ILI9488_CMD_WRITE_CONTENT_ADAPT_BRIGHTNESS 0x55
#define ILI9488_CMD_READ_CONTENT_ADAPT_BRIGHTNESS 0x56
#define ILI9488_CMD_WRITE_MIN_CAB_LEVEL 0x5E
#define ILI9488_CMD_READ_MIN_CAB_LEVEL 0x5F
#define ILI9488_CMD_READ_ABC_SELF_DIAG_RES 0x68
#define ILI9488_CMD_READ_ID1 0xDA
#define ILI9488_CMD_READ_ID2 0xDB
#define ILI9488_CMD_READ_ID3 0xDC
/* Level 2 Commands (from the display Datasheet) */
#define ILI9488_CMD_INTERFACE_MODE_CONTROL 0xB0
#define ILI9488_CMD_FRAME_RATE_CONTROL_NORMAL 0xB1
#define ILI9488_CMD_FRAME_RATE_CONTROL_IDLE_8COLOR 0xB2
#define ILI9488_CMD_FRAME_RATE_CONTROL_PARTIAL 0xB3
#define ILI9488_CMD_DISPLAY_INVERSION_CONTROL 0xB4
#define ILI9488_CMD_BLANKING_PORCH_CONTROL 0xB5
#define ILI9488_CMD_DISPLAY_FUNCTION_CONTROL 0xB6
#define ILI9488_CMD_ENTRY_MODE_SET 0xB7
#define ILI9488_CMD_BACKLIGHT_CONTROL_1 0xB9
#define ILI9488_CMD_BACKLIGHT_CONTROL_2 0xBA
#define ILI9488_CMD_HS_LANES_CONTROL 0xBE
#define ILI9488_CMD_POWER_CONTROL_1 0xC0
#define ILI9488_CMD_POWER_CONTROL_2 0xC1
#define ILI9488_CMD_POWER_CONTROL_NORMAL_3 0xC2
#define ILI9488_CMD_POWER_CONTROL_IDEL_4 0xC3
#define ILI9488_CMD_POWER_CONTROL_PARTIAL_5 0xC4
#define ILI9488_CMD_VCOM_CONTROL_1 0xC5
#define ILI9488_CMD_CABC_CONTROL_1 0xC6
#define ILI9488_CMD_CABC_CONTROL_2 0xC8
#define ILI9488_CMD_CABC_CONTROL_3 0xC9
#define ILI9488_CMD_CABC_CONTROL_4 0xCA
#define ILI9488_CMD_CABC_CONTROL_5 0xCB
#define ILI9488_CMD_CABC_CONTROL_6 0xCC
#define ILI9488_CMD_CABC_CONTROL_7 0xCD
#define ILI9488_CMD_CABC_CONTROL_8 0xCE
#define ILI9488_CMD_CABC_CONTROL_9 0xCF
#define ILI9488_CMD_NVMEM_WRITE 0xD0
#define ILI9488_CMD_NVMEM_PROTECTION_KEY 0xD1
#define ILI9488_CMD_NVMEM_STATUS_READ 0xD2
#define ILI9488_CMD_READ_ID4 0xD3
#define ILI9488_CMD_ADJUST_CONTROL_1 0xD7
#define ILI9488_CMD_READ_ID_VERSION 0xD8
#define ILI9488_CMD_POSITIVE_GAMMA_CORRECTION 0xE0
#define ILI9488_CMD_NEGATIVE_GAMMA_CORRECTION 0xE1
#define ILI9488_CMD_DIGITAL_GAMMA_CONTROL_1 0xE2
#define ILI9488_CMD_DIGITAL_GAMMA_CONTROL_2 0xE3
#define ILI9488_CMD_SET_IMAGE_FUNCTION 0xE9
#define ILI9488_CMD_ADJUST_CONTROL_2 0xF2
#define ILI9488_CMD_ADJUST_CONTROL_3 0xF7
#define ILI9488_CMD_ADJUST_CONTROL_4 0xF8
#define ILI9488_CMD_ADJUST_CONTROL_5 0xF9
#define ILI9488_CMD_SPI_READ_SETTINGS 0xFB
#define ILI9488_CMD_ADJUST_CONTROL_6 0xFC
#define ILI9488_CMD_ADJUST_CONTROL_7 0xFF
#endif /* ILI9488_REGS_H_INCLUDED */

View File

@@ -1,69 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface of ILI9488 driver.
*
*/
#ifndef _ILI9488_SPI_H_
#define _ILI9488_SPI_H_
/*------------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
/*------------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint32_t ILI9488_SpiReadChipId (void);
extern uint32_t ILI9488_SpiInitialize(sXdmad *dmad);
extern void ILI9488_SpiSetPixelFormat(uint8_t format);
extern void ILI9488_SpiNop(void);
extern void ILI9488_SpiWriteMemory(const uint8_t *pBuf, uint32_t size);
extern void ILI9488_SpiReadMemory(const uint8_t *pBuf, uint32_t size);
extern void ILI9488_SpiSetCursor(uint16_t x, uint16_t y);
extern void ILI9488_SpiSetWindow(
uint16_t dwX,
uint16_t dwY,
uint16_t dwWidth,
uint16_t dwHeight);
extern void ILI9488_SpiSetFullWindow(void);
extern void ILI9488_SpiOn(void);
extern void ILI9488_SpiOff(void);
extern void ILI9488_SpiSetDisplayLandscape(
uint8_t dwRGB, uint8_t LandscaprMode);
extern void ILI9488_SetPixelColor(uint32_t x, uint32_t y, uint32_t color);
#endif /* #ifndef ILI9488_SPI */

View File

@@ -1,56 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface of ILI9488 DMA driver.
*
*/
#ifndef _ILI9488_SPI_DMA_H_
#define _ILI9488_SPI_DMA_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint8_t ILI9488_SpiInitializeWithDma(sXdmad *dmad);
extern uint8_t ILI9488_SpiDmaTxTransfer(uint8_t *pTxBuffer, uint32_t wTxSize);
extern uint8_t ILI9488_SpiDmaRxTransfer(uint32_t *pRxBuffer, uint32_t wRxSize);
extern uint8_t ILI9488_SpiSendCommand(uint8_t Instr, uint8_t *pTxData,
uint32_t *pRxData, AccessIli_t ReadWrite, uint32_t size);
#endif /* #ifndef ILI9488_SPI_DMA */

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@@ -1,136 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
/*---------------------------------------------------------------------------
* Definition
*---------------------------------------------------------------------------*/
#define SENDOR_SUPPORTED_OUTPUTS 7
/** terminating list entry for register in configuration file */
#define SENSOR_REG_TERM 0xFF
/** terminating list entry for value in configuration file */
#define SENSOR_VAL_TERM 0xFF
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** Sensor type */
typedef enum _sensorType {
SENSOR_COMS = 0,
SENSOR_CCD
} sensorType_t;
/** Sensor status or return code */
typedef enum _sensorStatus {
SENSOR_OK = 0, /**< Operation is successful */
SENSOR_TWI_ERROR,
SENSOR_ID_ERROR,
SENSOR_RESOLUTION_NOT_SUPPORTED
} sendorStatus_t;
/** Sensor TWI mode */
typedef enum _sensorTwiMode {
SENSOR_TWI_REG_BYTE_DATA_BYTE = 0,
SENSOR_TWI_REG_2BYTE_DATA_BYTE,
SENSOR_TWI_REG_BYTE_DATA_2BYTE
} sensorTwiMode_t;
/** Sensor resolution */
typedef enum _sensorResolution {
QVGA = 0,
VGA,
SVGA,
XGA,
WXGA,
UVGA
} sensorOutputResolution_t;
/** Sensor output format */
typedef enum _sensorOutputFormat {
RAW_BAYER_12_BIT = 0,
RAW_BAYER_10_BIT,
YUV_422_8_BIT,
YUV_422_10_BIT,
MONO_12_BIT
} sensorOutputFormat_t;
/** define a structure for sensor register initialization values */
typedef struct _sensor_reg {
uint16_t reg; /* Register to be written */
uint16_t val; /* value to be written */
} sensorReg_t;
typedef struct _sensor_output {
uint8_t type; /** Index 0: normal, 1: AF setting*/
sensorOutputResolution_t output_resolution; /** sensor output resolution */
sensorOutputFormat_t output_format; /** sensor output format */
uint8_t supported; /** supported for current output_resolution*/
uint32_t output_width; /** output width */
uint32_t output_height; /** output height */
const sensorReg_t *output_setting; /** sensor registers setting */
} sensorOutput_t;
/** define a structure for sensor profile */
typedef struct _sensor_profile {
sensorType_t cmos_ccd; /** Sensor type for CMOS sensor or CCD */
sensorTwiMode_t twi_inf_mode; /** TWI interface mode */
uint32_t twi_slave_addr; /** TWI slave address */
uint16_t pid_high_reg; /** Register address for product ID high byte */
uint16_t pid_low_reg; /** Register address for product ID low byte*/
uint16_t pid_high; /** product ID high byte */
uint16_t pid_low; /** product ID low byte */
uint16_t version_mask; /** version mask */
const sensorOutput_t
*outputConf[SENDOR_SUPPORTED_OUTPUTS]; /** sensor settings */
} sensorProfile_t;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern sendorStatus_t sensor_twi_write_regs(Twid *pTwid,
const sensorReg_t *pReglist);
extern sendorStatus_t sensor_twi_read_regs(Twid *pTwid,
const sensorReg_t *pReglist);
extern sendorStatus_t sensor_setup(Twid *pTwid,
const sensorProfile_t *sensor_profile,
sensorOutputResolution_t resolution);
extern sendorStatus_t sensor_get_output(sensorOutputFormat_t *format,
uint32_t *width,
uint32_t *height,
sensorOutputResolution_t resolution);

View File

@@ -1,109 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#ifndef COLOR_H
#define COLOR_H
/**
* \file
*
* RGB 24-bits color table definition.
*
*/
/*
* RGB 24 Bpp
* RGB 888
* R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0
*/
#define COLOR_BLACK 0x000000
#define COLOR_WHITE 0xFFFFFF
#define COLOR_BLUE 0x0000FF
#define COLOR_GREEN 0x00FF00
#define COLOR_RED 0xFF0000
#define COLOR_NAVY 0x000080
#define COLOR_DARKBLUE 0x00008B
#define COLOR_DARKGREEN 0x006400
#define COLOR_DARKCYAN 0x008B8B
#define COLOR_CYAN 0x00FFFF
#define COLOR_TURQUOISE 0x40E0D0
#define COLOR_INDIGO 0x4B0082
#define COLOR_DARKRED 0x800000
#define COLOR_OLIVE 0x808000
#define COLOR_GRAY 0x808080
#define COLOR_SKYBLUE 0x87CEEB
#define COLOR_BLUEVIOLET 0x8A2BE2
#define COLOR_LIGHTGREEN 0x90EE90
#define COLOR_DARKVIOLET 0x9400D3
#define COLOR_YELLOWGREEN 0x9ACD32
#define COLOR_BROWN 0xA52A2A
#define COLOR_DARKGRAY 0xA9A9A9
#define COLOR_SIENNA 0xA0522D
#define COLOR_LIGHTBLUE 0xADD8E6
#define COLOR_GREENYELLOW 0xADFF2F
#define COLOR_SILVER 0xC0C0C0
#define COLOR_LIGHTGREY 0xD3D3D3
#define COLOR_LIGHTCYAN 0xE0FFFF
#define COLOR_VIOLET 0xEE82EE
#define COLOR_AZUR 0xF0FFFF
#define COLOR_BEIGE 0xF5F5DC
#define COLOR_MAGENTA 0xFF00FF
#define COLOR_TOMATO 0xFF6347
#define COLOR_GOLD 0xFFD700
#define COLOR_ORANGE 0xFFA500
#define COLOR_SNOW 0xFFFAFA
#define COLOR_YELLOW 0xFFFF00
#define BLACK 0x0000
#define BLUE 0x001F
#define RED 0xF800
#define GREEN 0x07E0
#define WHITE 0xFFFF
/* level is in [0; 31]*/
#define BLUE_LEV(level) ((level)&BLUE)
#define GREEN_LEV(level) ((((level)*2)<<5)&GREEN)
#define RED_LEV(level) (((level)<<(5+6))&RED)
#define GRAY_LEV(level) (BLUE_LEV(level) | GREEN_LEV(level) | RED_LEV(level))
#define RGB_24_TO_RGB565(RGB) \
(((RGB >>19)<<11) | (((RGB & 0x00FC00) >>5)) | (RGB & 0x00001F))
#define RGB_24_TO_18BIT(RGB) \
(((RGB >>16)&0xFC) | (((RGB & 0x00FF00) >>10) << 10) | (RGB & 0x0000FC)<<16)
#define RGB_16_TO_18BIT(RGB) \
(((((RGB >>11)*63)/31)<<18) | (RGB & 0x00FC00) | (((RGB & 0x00001F)*63)/31))
#define BGR_TO_RGB_18BIT(RGB) \
(RGB & 0xFF0000) | ((RGB & 0x00FF00) >> 8) | ((RGB & 0x0000FC) >> 16))
#define BGR_16_TO_18BITRGB(RGB) BGR_TO_RGB_18BIT(RGB_16_TO_18BIT(RGB))
#endif /* #define COLOR_H */

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@@ -1,186 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface for draw function on LCD.
*
*/
#ifndef DRAW_H
#define DRAW_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
#include "lcd_gimp_image.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/** Horizontal direction line definition */
#define DIRECTION_HLINE 0
/** Vertical direction line definition */
#define DIRECTION_VLINE 1
typedef struct _rect {
uint32_t x;
uint32_t y;
uint32_t width;
uint32_t height;
} rect;
COMPILER_PACK_SET(1)
typedef struct _rgb {
uint8_t b;
uint8_t g;
uint8_t r;
} sBGR;
COMPILER_PACK_RESET()
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LCDD_SetUpdateWindowSize(rect rc);
extern void LCDD_UpdateWindow(void);
extern void LCDD_UpdatePartialWindow(uint8_t *pbuf, uint32_t size);
extern void LCDD_DrawRectangleWithFill(
uint16_t *pbuf,
uint32_t dwX,
uint32_t dwY,
uint32_t dwWidth,
uint32_t dwHeight,
uint32_t dwColor);
extern uint32_t LCDD_DrawCircle(
uint16_t *pbuf,
uint32_t x,
uint32_t y,
uint32_t r,
uint32_t color);
extern uint32_t LCD_DrawFilledCircle(
uint16_t *pbuf,
uint32_t dwX,
uint32_t dwY,
uint32_t dwRadius,
uint32_t color);
extern void LCDD_DrawString(
uint16_t *pbuf,
uint32_t x,
uint32_t y,
const uint8_t *pString,
uint32_t color);
extern void LCDD_GetStringSize(
const uint8_t *pString,
uint32_t *pWidth,
uint32_t *pHeight);
extern void LCDD_BitBlt(
uint16_t *pbuf,
uint32_t dst_x,
uint32_t dst_y,
uint32_t dst_w,
uint32_t dst_h,
const LcdColor_t *src,
uint32_t src_x,
uint32_t src_y,
uint32_t src_w,
uint32_t src_h);
extern void LCDD_BitBltAlphaBlend(uint16_t *pbuf,
uint32_t dst_x,
uint32_t dst_y,
uint32_t dst_w,
uint32_t dst_h,
const LcdColor_t *src,
uint32_t src_x,
uint32_t src_y,
uint32_t src_w,
uint32_t src_h,
uint32_t alpha);
extern void LCDD_DrawImage(
uint16_t *pbuf,
uint32_t dwX,
uint32_t dwY,
const LcdColor_t *pImage,
uint32_t dwWidth,
uint32_t dwHeight);
extern void LCDD_DrawPixel(
uint16_t *pbuf,
uint32_t x,
uint32_t y,
uint32_t color);
extern void LCDD_DrawLine(
uint16_t *pbuf,
uint32_t dwX1,
uint32_t dwY1,
uint32_t dwX2,
uint32_t dwY2,
uint32_t color);
extern uint32_t LCDD_DrawLineBresenham(
uint16_t *pbuf,
uint32_t dwX1,
uint32_t dwY1,
uint32_t dwX2,
uint32_t dwY2,
uint32_t color);
extern void LCDD_DrawRectangle(
uint16_t *pbuf,
uint32_t x,
uint32_t y,
uint32_t width,
uint32_t height,
uint32_t color);
extern void LCDD_SetCavasBuffer(
void *pBuffer,
uint32_t wBufferSize);
extern void LCDD_DrawStraightLine(
uint16_t *pbuf,
uint32_t dwX1,
uint32_t dwY1,
uint32_t dwX2,
uint32_t dwY2 ,
uint32_t color);
#endif /* #ifndef DRAW_H */

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@@ -1,108 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface for draw font on LCD.
*
*/
/**
*
* \section Purpose
*
* The font.h files declares a font structure and a LCDD_DrawChar function
* that must be implemented by a font definition file to be used with the
* LCDD_DrawString method of draw.h.
*
* The font10x14.c implements the necessary variable and function for a 10x14
* font.
*
* \section Usage
*
* -# Declare a gFont global variable with the necessary Font information.
* -# Implement an LCDD_DrawChar function which displays the specified
* character on the LCD.
* -# Use the LCDD_DrawString method defined in draw.h to display a complete
* string.
*/
#ifndef _LCD_FONT_
#define _LCD_FONT_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdint.h>
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** \brief Describes the font (width, height, supported characters, etc.) used by
* the LCD driver draw API.
*/
typedef struct _Font {
/* Font width in pixels. */
uint8_t width;
/* Font height in pixels. */
uint8_t height;
} Font;
/*----------------------------------------------------------------------------
* Variables
*----------------------------------------------------------------------------*/
/** Global variable describing the font being instanced. */
extern const Font gFont;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LCDD_DrawChar(
uint16_t *pCanvasBuffer,
uint32_t x,
uint32_t y,
uint8_t c,
uint32_t color);
extern void LCD_DrawString(
uint16_t *pCanvasBuffer,
uint32_t dwX,
uint32_t dwY,
const uint8_t *pString,
uint32_t color);
#endif /* #ifndef LCD_FONT_ */

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@@ -1,45 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Font 10x14 table definition.
*
*/
#ifndef _LCD_FONT_10x14_
#define _LCD_FONT_10x14_
#include <stdint.h>
/** Char set of font 10x14 */
extern const uint8_t pCharset10x14[];
#endif /* #ifdef _LCD_FONT_10x14_ */

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@@ -1,42 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#ifndef _GIMP_IMAGE_
#define _GIMP_IMAGE_
#include <stdint.h>
typedef struct _SGIMPImage {
uint32_t dwWidth;
uint32_t dwHeight;
uint32_t dwBytes_per_pixel; /* 3:RGB, 4:RGBA */
uint8_t *pucPixel_data;
} SGIMPImage;
#endif // _GIMP_IMAGE_

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@@ -1,52 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface for LCD driver.
*
*/
#ifndef LCDD_H
#define LCDD_H
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LCDD_Initialize(uint8_t lcdMode, sXdmad *dmad, uint8_t cRotate);
extern void LCDD_On(void);
extern void LCDD_Off(void);
extern void LCDD_SetBacklight (uint32_t step);
#endif /* #ifndef LCDD_H */

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@@ -1,72 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* \section Purpose
*
* Small set of functions for simple and portable LED usage.
*
* \section Usage
*
* -# Configure one or more LEDs using LED_Configure and
* LED_ConfigureAll.
* -# Set, clear and toggle LEDs using LED_Set, LED_Clear and
* LED_Toggle.
*
* LEDs are numbered starting from 0; the number of LEDs depend on the
* board being used. All the functions defined here will compile properly
* regardless of whether the LED is defined or not; they will simply
* return 0 when a LED which does not exist is given as an argument.
* Also, these functions take into account how each LED is connected on to
* board; thus, \ref LED_Set might change the level on the corresponding pin
* to 0 or 1, but it will always light the LED on; same thing for the other
* methods.
*/
#ifndef _LED_
#define _LED_
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint32_t LED_Configure(uint32_t dwLed);
extern uint32_t LED_Set(uint32_t dwLed);
extern uint32_t LED_Clear(uint32_t dwLed);
extern uint32_t LED_Toggle(uint32_t dwLed);
#endif /* #ifndef LED_H */

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@@ -1,42 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#ifndef _MATH_
#define _MATH_
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern uint32_t min(uint32_t dwA, uint32_t dwB);
extern uint32_t absv(int32_t lValue);
extern uint32_t power(uint32_t dwX, uint32_t dwY);
#endif /* #ifndef _MATH_ */

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@@ -1,126 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* \section Purpose
*
* Interface for configuring and using Timer Counter (TC) peripherals.
*
* \section Usage
* -# Optionally, use TC_FindMckDivisor() to let the program find the best
* TCCLKS field value automatically.
* -# Configure a Timer Counter in the desired mode using TC_Configure().
* -# Start or stop the timer clock using TC_Start() and TC_Stop().
*/
#ifndef _MCAN_CONFIG_
#define _MCAN_CONFIG_
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------
* Global functions
*------------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/* Programmable Clock Source for Baud Rate is Common To Both MCAN Controllers */
#define MCAN_PROG_CLK_PRESCALER 1 /* /1 to /256 */
// select one of the following for the programmable clock source
//#define MCAN_PROG_CLK_SELECT PMC_PCK_CSS_SLOW_CLK
//#define MCAN_PROG_CLK_SELECT PMC_PCK_CSS_MAIN_CLK
//#define MCAN_PROG_CLK_SELECT PMC_PCK_CSS_PLLA_CLK
//#define MCAN_PROG_CLK_SELECT PMC_PCK_CSS_UPLL_CLK
#define MCAN_PROG_CLK_SELECT PMC_PCK_CSS_MCK
#define MCAN_PROG_CLK_FREQ_HZ \
((float) 150000000 / (float) MCAN_PROG_CLK_PRESCALER)
#define MCAN0_BIT_RATE_BPS 500000
#define MCAN0_PROP_SEG 2
#define MCAN0_PHASE_SEG1 11
#define MCAN0_PHASE_SEG2 11
#define MCAN0_SYNC_JUMP 4
#define MCAN0_FAST_BIT_RATE_BPS 2000000
#define MCAN0_FAST_PROP_SEG 2
#define MCAN0_FAST_PHASE_SEG1 4
#define MCAN0_FAST_PHASE_SEG2 4
#define MCAN0_FAST_SYNC_JUMP 2
#define MCAN0_NMBR_STD_FLTS 8 /* 128 max filters */
#define MCAN0_NMBR_EXT_FLTS 8 /* 64 max filters */
#define MCAN0_NMBR_RX_FIFO0_ELMTS 0 /* # of elements, 64 elements max */
#define MCAN0_NMBR_RX_FIFO1_ELMTS 0 /* # of elements, 64 elements max */
#define MCAN0_NMBR_RX_DED_BUF_ELMTS 16 /* # of elements, 64 elements max */
#define MCAN0_NMBR_TX_EVT_FIFO_ELMTS 0 /* # of elements, 32 elements max */
#define MCAN0_NMBR_TX_DED_BUF_ELMTS 4 /* # of elements, 32 elements max */
#define MCAN0_NMBR_TX_FIFO_Q_ELMTS 0 /* # of elements, 32 elements max */
#define MCAN0_RX_FIFO0_ELMT_SZ 8 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#define MCAN0_RX_FIFO1_ELMT_SZ 8 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#define MCAN0_RX_BUF_ELMT_SZ 8 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#define MCAN0_TX_BUF_ELMT_SZ 8 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#define MCAN1_BIT_RATE_BPS 500000
#define MCAN1_PROP_SEG 2
#define MCAN1_PHASE_SEG1 11
#define MCAN1_PHASE_SEG2 11
#define MCAN1_SYNC_JUMP 4
#define MCAN1_FAST_BIT_RATE_BPS 2000000
#define MCAN1_FAST_PROP_SEG 2
#define MCAN1_FAST_PHASE_SEG1 4
#define MCAN1_FAST_PHASE_SEG2 4
#define MCAN1_FAST_SYNC_JUMP 2
#define MCAN1_NMBR_STD_FLTS 8 /* 128 max filters */
#define MCAN1_NMBR_EXT_FLTS 8 /* 64 max filters */
#define MCAN1_NMBR_RX_FIFO0_ELMTS 12 /* # of elements, 64 elements max */
#define MCAN1_NMBR_RX_FIFO1_ELMTS 0 /* # of elements, 64 elements max */
#define MCAN1_NMBR_RX_DED_BUF_ELMTS 4 /* # of elements, 64 elements max */
#define MCAN1_NMBR_TX_EVT_FIFO_ELMTS 0 /* # of elements, 32 elements max */
#define MCAN1_NMBR_TX_DED_BUF_ELMTS 4 /* # of elements, 32 elements max */
#define MCAN1_NMBR_TX_FIFO_Q_ELMTS 4 /* # of elements, 32 elements max */
#define MCAN1_RX_FIFO0_ELMT_SZ 8 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#define MCAN1_RX_FIFO1_ELMT_SZ 8 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#define MCAN1_RX_BUF_ELMT_SZ 64 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#define MCAN1_TX_BUF_ELMT_SZ 32 /* 8, 12, 16, 20, 24, 32, 48, 64 bytes */
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _MCAN_CONFIG_ */

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@@ -1,49 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface for Real Time Clock calibration (RTC) .
*
*/
/** RTC crystal **/
typedef struct {
int8_t Tempr;
int16_t PPM;
uint8_t NEGPPM;
uint8_t HIGHPPM;
uint16_t CORRECTION;
} RTC_PPMLookup;
extern void RTC_ClockCalibration(Rtc *pRtc, int32_t CurrentTempr);

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@@ -1,255 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Interface for the S25fl1 Serial Flash driver.
*
*/
#ifndef S25FL1_H
#define S25FL1_H
#define USE_QSPI_DMA
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
#define Size(pAt25) ((pAt25)->pDesc->size)
#define PageSize(pAt25) ((pAt25)->pDesc->pageSize)
#define BlockSize(pAt25) ((pAt25)->pDesc->blockSize)
#define Name(pAt25) ((pAt25)->pDesc->name)
#define ManId(pAt25) (((pAt25)->pDesc->jedecId) & 0xFF)
#define PageNumber(pAt25) (Size(pAt25) / PageSize(pAt25))
#define BlockNumber(pAt25) (Size(pAt25) / BlockSize(pAt25))
#define PagePerBlock(pAt25) (BlockSize(pAt25) / PageSize(pAt25))
#define BlockEraseCmd(pAt25) ((pAt25)->pDesc->blockEraseCmd)
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
/** Device is protected, operation cannot be carried out. */
#define ERROR_PROTECTED 1
/** Device is busy executing a command. */
#define ERROR_BUSY 2
/** There was a problem while trying to program page data. */
#define ERROR_PROGRAM 3
/** There was an SPI communication error. */
#define ERROR_SPI 4
/** Device ready/busy status bit. */
#define STATUS_RDYBSY (1 << 0)
/** Device is ready. */
#define STATUS_RDYBSY_READY (0 << 0)
/** Device is busy with internal operations. */
#define STATUS_RDYBSY_BUSY (1 << 0)
/** Write enable latch status bit. */
#define STATUS_WEL (1 << 1)
/** Device is not write enabled. */
#define STATUS_WEL_DISABLED (0 << 1)
/** Device is write enabled. */
#define STATUS_WEL_ENABLED (1 << 1)
/** Software protection status bit-field. */
#define STATUS_SWP (3 << 2)
/** All sectors are software protected. */
#define STATUS_SWP_PROTALL (3 << 2)
/** Some sectors are software protected. */
#define STATUS_SWP_PROTSOME (1 << 2)
/** No sector is software protected. */
#define STATUS_SWP_PROTNONE (0 << 2)
/** Write protect pin status bit. */
#define STATUS_WPP (1 << 4)
/** Write protect signal is not asserted. */
#define STATUS_WPP_NOTASSERTED (0 << 4)
/** Write protect signal is asserted. */
#define STATUS_WPP_ASSERTED (1 << 4)
/** Erase/program error bit. */
#define STATUS_EPE (1 << 5)
/** Erase or program operation was successful. */
#define STATUS_EPE_SUCCESS (0 << 5)
/** Erase or program error detected. */
#define STATUS_EPE_ERROR (1 << 5)
/** Sector protection registers locked bit. */
#define STATUS_SPRL (1 << 7)
/** Sector protection registers are unlocked. */
#define STATUS_SPRL_UNLOCKED (0 << 7)
/** Sector protection registers are locked. */
#define STATUS_SPRL_LOCKED (1 << 7)
/** Quad enable bit */
#define STATUS_QUAD_ENABLE (1 << 1)
/** Quad enable bit */
#define STATUS_WRAP_ENABLE (0 << 4)
/** Latency control bits */
#define STATUS_LATENCY_CTRL (0xF << 0)
#define STATUS_WRAP_BYTE (1 << 5)
#define BLOCK_PROTECT_Msk (7 << 2)
#define TOP_BTM_PROTECT_Msk (1 << 5)
#define SEC_PROTECT_Msk (1 << 6)
#define CHIP_PROTECT_Msk (0x1F << 2)
/** Read array command code. */
#define READ_ARRAY 0x0B
/** Read array (low frequency) command code. */
#define READ_ARRAY_LF 0x03
/** Fast Read array command code. */
#define READ_ARRAY_DUAL 0x3B
/** Fast Read array command code. */
#define READ_ARRAY_QUAD 0x6B
/** Fast Read array command code. */
#define READ_ARRAY_DUAL_IO 0xBB
/** Fast Read array command code. */
#define READ_ARRAY_QUAD_IO 0xEB
/** Block erase command code (4K block). */
#define BLOCK_ERASE_4K 0x20
/** Block erase command code (32K block). */
#define BLOCK_ERASE_32K 0x52
/** Block erase command code (64K block). */
#define BLOCK_ERASE_64K 0xD8
/** Chip erase command code 1. */
#define CHIP_ERASE_1 0x60
/** Chip erase command code 2. */
#define CHIP_ERASE_2 0xC7
/** Byte/page program command code. */
#define BYTE_PAGE_PROGRAM 0x02
/** Sequential program mode command code 1. */
#define SEQUENTIAL_PROGRAM_1 0xAD
/** Sequential program mode command code 2. */
#define SEQUENTIAL_PROGRAM_2 0xAF
/** Write enable command code. */
#define WRITE_ENABLE 0x06
/** Write disable command code. */
#define WRITE_DISABLE 0x04
/** Protect sector command code. */
#define PROTECT_SECTOR 0x36
/** Unprotected sector command code. */
#define UNPROTECT_SECTOR 0x39
/** Read sector protection registers command code. */
#define READ_SECTOR_PROT 0x3C
/** Read status register command code. */
#define READ_STATUS_1 0x05
/** Read status register command code. */
#define READ_STATUS_2 0x35
/** Read status register command code. */
#define READ_STATUS_3 0x33
/** Write status register command code. */
#define WRITE_STATUS 0x01
/** Read manufacturer and device ID command code. */
#define READ_JEDEC_ID 0x9F
/** Deep power-down command code. */
#define DEEP_PDOWN 0xB9
/** Resume from deep power-down command code. */
#define RES_DEEP_PDOWN 0xAB
/** Resume from deep power-down command code. */
#define SOFT_RESET_ENABLE 0x66
/** Resume from deep power-down command code. */
#define SOFT_RESET 0x99
/** Resume from deep power-down command code. */
#define WRAP_ENABLE 0x77
/** Continuous Read Mode Reset command code. */
#define CONT_MODE_RESET 0xFF
/** SPI Flash Manufacturer JEDEC ID */
#define ATMEL_SPI_FLASH 0x1F
#define ST_SPI_FLASH 0x20
#define WINBOND_SPI_FLASH 0xEF
#define MACRONIX_SPI_FLASH 0xC2
#define SST_SPI_FLASH 0xBF
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
uint32_t S25FL1D_ReadJedecId(void);
void S25FL1D_InitFlashInterface(uint8_t Mode);
void S25FL1D_SoftReset(void);
void S25FL1D_ContReadModeReset(void);
unsigned char S25FL1D_Unprotect(void);
unsigned char S25FL1D_Protect(uint32_t StartAddr, uint32_t Size);
void S25FL1D_QuadMode(uint8_t Enable);
void S25FL1D_EnableWrap(uint8_t ByetAlign);
void S25FL1D_SetReadLatencyControl(uint8_t Latency);
unsigned char S25FL1D_EraseChip(void);
unsigned char S25FL1D_EraseSector(unsigned int address);
unsigned char S25FL1D_Erase64KBlock(unsigned int address);
unsigned char S25FL1D_Write(
uint32_t *pData,
uint32_t size,
uint32_t address,
uint8_t Secure);
extern unsigned char S25FL1D_Read(
uint32_t *pData,
uint32_t size,
uint32_t address);
extern unsigned char S25FL1D_ReadDual(
uint32_t *pData,
uint32_t size,
uint32_t address);
extern unsigned char S25FL1D_ReadQuad(
uint32_t *pData,
uint32_t size,
uint32_t address);
extern unsigned char S25FL1D_ReadDualIO(
uint32_t *pData,
uint32_t size,
uint32_t address,
uint8_t ContMode,
uint8_t Secure);
extern unsigned char S25FL1D_ReadQuadIO(
uint32_t *pData,
uint32_t size,
uint32_t address,
uint8_t ContMode,
uint8_t Secure);
#endif // #ifndef S25FL1_H

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@@ -1,160 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Implementation WM8904 driver.
*
*/
#ifndef WM8904_H
#define WM8904_H
#include "board.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define WM8904_CSB_STATE (0x0 << 0)
/** Slave address */
#define WM8904_SLAVE_ADDRESS 0x1a | WM8904_CSB_STATE
#define CS2100_SLAVE_ADDRESS 0x4E
/** Reset register*/
#define WM8904_REG_RESET 0x00
/** Bias control 0 register*/
#define WM8904_REG_BIAS_CTRL0 0x04
/** VMID control 0 register*/
#define WM8904_REG_VMID_CTRL0 0x05
/** MIC Bias control 0 register*/
#define WM8904_REG_MICBIAS_CTRL0 0x06
/** Bias control 1 register*/
#define WM8904_REG_BIAS_CTRL1 0x07
/** Power management control 0 register*/
#define WM8904_REG_POWER_MANG0 0x0C
/** Power management control 2 register*/
#define WM8904_REG_POWER_MANG2 0x0E
/** Power management control 3 register*/
#define WM8904_REG_POWER_MANG3 0x0F
/** Power management control 6 register*/
#define WM8904_REG_POWER_MANG6 0x12
/** Clock rate0 register*/
#define WM8904_REG_CLOCK_RATE0 0x14
/** Clock rate1 register*/
#define WM8904_REG_CLOCK_RATE1 0x15
/** Clock rate2 register*/
#define WM8904_REG_CLOCK_RATE2 0x16
/** Audio interface0 register*/
#define WM8904_REG_AUD_INF0 0x18
/** Audio interface1 register*/
#define WM8904_REG_AUD_INF1 0x19
/** Audio interface2 register*/
#define WM8904_REG_AUD_INF2 0x1A
/** Audio interface3 register*/
#define WM8904_REG_AUD_INF3 0x1B
/** ADC digital 0 register*/
#define WM8904_REG_ADC_DIG0 0x20
/** ADC digital 1 register*/
#define WM8904_REG_ADC_DIG1 0x21
/** Analogue left input 0 register*/
#define WM8904_REG_ANALOGUE_LIN0 0x2C
/** Analogue right input 0 register*/
#define WM8904_REG_ANALOGUE_RIN0 0x2D
/** Analogue left input 1 register*/
#define WM8904_REG_ANALOGUE_LIN1 0x2E
/** Analogue right input 1 register*/
#define WM8904_REG_ANALOGUE_RIN1 0x2F
/** Analogue left output 1 register*/
#define WM8904_REG_ANALOGUE_LOUT1 0x39
/** Analogue right output 1 register*/
#define WM8904_REG_ANALOGUE_ROUT1 0x3A
/** Analogue left output 2 register*/
#define WM8904_REG_ANALOGUE_LOUT2 0x3B
/** Analogue right output 2 register*/
#define WM8904_REG_ANALOGUE_ROUT2 0x3C
/** Analogue output 12 ZC register*/
#define WM8904_REG_ANALOGUE_OUT12ZC 0x3D
/** DC servo 0 register*/
#define WM8904_REG_DC_SERVO0 0x43
/** Analogue HP 0 register*/
#define WM8904_REG_ANALOGUE_HP0 0x5A
/** Charge pump 0 register*/
#define WM8904_REG_CHARGE_PUMP0 0x62
/** Class W 0 register*/
#define WM8904_REG_CLASS0 0x68
/** FLL control 1 register*/
#define WM8904_REG_FLL_CRTL1 0x74
/** FLL control 2 register*/
#define WM8904_REG_FLL_CRTL2 0x75
/** FLL control 3 register*/
#define WM8904_REG_FLL_CRTL3 0x76
/** FLL control 4 register*/
#define WM8904_REG_FLL_CRTL4 0x77
/** FLL control 5 register*/
#define WM8904_REG_FLL_CRTL5 0x78
/** DUMMY register*/
#define WM8904_REG_END 0xFF
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint16_t WM8904_Read(Twid *pTwid, uint32_t device, uint32_t regAddr);
extern void WM8904_Write(Twid *pTwid, uint32_t device, uint32_t regAddr,
uint16_t data);
extern uint8_t WM8904_Init(Twid *pTwid, uint32_t device, uint32_t PCK);
extern uint8_t WM8904_VolumeSet(Twid *pTwid, uint32_t device, uint16_t value);
extern void WM8904_IN2R_IN1L(Twid *pTwid, uint32_t device);
#endif // WM8904_H

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@@ -1,318 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#ifndef __rtems__
#include "samv71.h"
#else /* __rtems__ */
#include <chip.h>
#endif /* __rtems__ */
/* @cond 0 */
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/* @endcond */
/* %ATMEL_SYSTEM% */
/* Clock Settings (600MHz PLL VDDIO 3.3V and VDDCORE 1.2V) */
/* Clock Settings (300MHz HCLK, 150MHz MCK)=> PRESC = 2, MDIV = 2 */
#define SYS_BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8U))
#ifndef __rtems__
#if BOARD_MCK == 123000000
/* For example usb_video, PLLA/HCLK/MCK clock is set to 492/246/123MHz to achieve
the maximum performance, for other examples the clock is set to 300/300/150MHz */
#define SYS_BOARD_PLLAR (CKGR_PLLAR_ONE | CKGR_PLLAR_MULA(0x28U) | \
CKGR_PLLAR_PLLACOUNT(0x3fU) | CKGR_PLLAR_DIVA(0x1U))
#define SYS_BOARD_MCKR_MDIV (PMC_MCKR_MDIV_PCK_DIV2)
#define SYS_BOARD_MCKR (PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK \
| SYS_BOARD_MCKR_MDIV)
#elif BOARD_MCK == 150000000
#define SYS_BOARD_PLLAR (CKGR_PLLAR_ONE | CKGR_PLLAR_MULA(0x18U) | \
CKGR_PLLAR_PLLACOUNT(0x3fU) | CKGR_PLLAR_DIVA(0x1U))
#define SYS_BOARD_MCKR_MDIV (PMC_MCKR_MDIV_PCK_DIV2)
#define SYS_BOARD_MCKR (PMC_MCKR_PRES_CLK_1 | PMC_MCKR_CSS_PLLA_CLK \
| SYS_BOARD_MCKR_MDIV)
#else
#error "unexpected Main Clock (MCK) frequency"
#endif
uint32_t SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
#else /* __rtems__ */
#define SYS_BOARD_MCKR_MDIV ((atsam_clock_config.mckr_init) & PMC_MCKR_MDIV_Msk)
#define SYS_BOARD_MCKR (atsam_clock_config.mckr_init)
#define SYS_BOARD_PLLAR (atsam_clock_config.pllar_init)
#endif /* __rtems__ */
#define USBCLK_DIV 10
/**
* \brief Setup the microcontroller system.
* Initialize the System and update the SystemFrequency variable.
*/
#ifndef __rtems__
void SystemInit(void)
#else /* __rtems__ */
void ATSAM_START_SRAM_SECTION SystemInit(void)
#endif /* __rtems__ */
{
uint32_t read_MOR;
/* Set FWS according to SYS_BOARD_MCKR configuration */
EFC->EEFC_FMR = EEFC_FMR_FWS(5);
/* Before switching MAIN OSC on external crystal : enable it and don't
* disable at the same time RC OSC in case of if MAIN OSC is still using RC
* OSC
*/
#if ATSAM_SLOWCLOCK_USE_XTAL == 1
read_MOR = PMC->CKGR_MOR;
/* enable external crystal - enable RC OSC */
read_MOR |= (CKGR_MOR_KEY_PASSWD | CKGR_MOR_XT32KFME);
PMC->CKGR_MOR = read_MOR;
/* Select XTAL 32k instead of internal slow RC 32k for slow clock */
if ((SUPC->SUPC_SR & SUPC_SR_OSCSEL) != SUPC_SR_OSCSEL_CRYST) {
SUPC->SUPC_CR = SUPC_CR_KEY_PASSWD | SUPC_CR_XTALSEL_CRYSTAL_SEL;
while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL));
}
#endif
/* Initialize main oscillator */
if (!(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)) {
PMC->CKGR_MOR = CKGR_MOR_KEY_PASSWD | SYS_BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN |
CKGR_MOR_MOSCXTEN;
while (!(PMC->PMC_SR & PMC_SR_MOSCXTS)) {
}
}
/* Switch to 3-20MHz Xtal oscillator */
PMC->CKGR_MOR = CKGR_MOR_KEY_PASSWD | SYS_BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN |
CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL;
while (!(PMC->PMC_SR & PMC_SR_MOSCSELS)) {
}
PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS_Msk) |
PMC_MCKR_CSS_MAIN_CLK;
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
}
/* Initialize PLLA */
PMC->CKGR_PLLAR = SYS_BOARD_PLLAR;
while (!(PMC->PMC_SR & PMC_SR_LOCKA)) {
}
/* Switch to main clock: DO NOT modify MDIV and CSS feild at the same access */
PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_MDIV_Msk) |
SYS_BOARD_MCKR_MDIV;
PMC->PMC_MCKR = (SYS_BOARD_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
}
/* Switch to PLLA */
PMC->PMC_MCKR = SYS_BOARD_MCKR;
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
}
#ifndef __rtems__
SystemCoreClock = CHIP_FREQ_CPU_MAX;
#endif /* __rtems__ */
}
#ifndef __rtems__
void SystemCoreClockUpdate(void)
{
/* Determine clock frequency according to clock register values */
switch (PMC->PMC_MCKR & (uint32_t) PMC_MCKR_CSS_Msk) {
case PMC_MCKR_CSS_SLOW_CLK: /* Slow clock */
if (SUPC->SUPC_SR & SUPC_SR_OSCSEL)
SystemCoreClock = CHIP_FREQ_XTAL_32K;
else
SystemCoreClock = CHIP_FREQ_SLCK_RC;
break;
case PMC_MCKR_CSS_MAIN_CLK: /* Main clock */
if (PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)
SystemCoreClock = CHIP_FREQ_XTAL_12M;
else {
SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
switch (PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk) {
case CKGR_MOR_MOSCRCF_4_MHz:
break;
case CKGR_MOR_MOSCRCF_8_MHz:
SystemCoreClock *= 2U;
break;
case CKGR_MOR_MOSCRCF_12_MHz:
SystemCoreClock *= 3U;
break;
default:
break;
}
}
break;
case PMC_MCKR_CSS_PLLA_CLK: /* PLLA clock */
if (PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)
SystemCoreClock = CHIP_FREQ_XTAL_12M;
else {
SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
switch (PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk) {
case CKGR_MOR_MOSCRCF_4_MHz:
break;
case CKGR_MOR_MOSCRCF_8_MHz:
SystemCoreClock *= 2U;
break;
case CKGR_MOR_MOSCRCF_12_MHz:
SystemCoreClock *= 3U;
break;
default:
break;
}
}
if ((uint32_t) (PMC->PMC_MCKR & (uint32_t) PMC_MCKR_CSS_Msk) ==
PMC_MCKR_CSS_PLLA_CLK) {
SystemCoreClock *= ((((PMC->CKGR_PLLAR) & CKGR_PLLAR_MULA_Msk) >>
CKGR_PLLAR_MULA_Pos) + 1U);
SystemCoreClock /= ((((PMC->CKGR_PLLAR) & CKGR_PLLAR_DIVA_Msk) >>
CKGR_PLLAR_DIVA_Pos));
}
break;
default:
break;
}
if ((PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) == PMC_MCKR_PRES_CLK_3)
SystemCoreClock /= 3U;
else
SystemCoreClock >>= ((PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) >> PMC_MCKR_PRES_Pos);
}
#endif /* __rtems__ */
/**
* Initialize flash.
*/
void system_init_flash(uint32_t ul_clk)
{
/* Set FWS for embedded Flash access according to operating frequency */
if (ul_clk < CHIP_FREQ_FWS_0)
EFC->EEFC_FMR = EEFC_FMR_FWS(0) | EEFC_FMR_CLOE;
else {
if (ul_clk < CHIP_FREQ_FWS_1)
EFC->EEFC_FMR = EEFC_FMR_FWS(1) | EEFC_FMR_CLOE;
else {
if (ul_clk < CHIP_FREQ_FWS_2)
EFC->EEFC_FMR = EEFC_FMR_FWS(2) | EEFC_FMR_CLOE;
else {
if (ul_clk < CHIP_FREQ_FWS_3)
EFC->EEFC_FMR = EEFC_FMR_FWS(3) | EEFC_FMR_CLOE;
else {
if (ul_clk < CHIP_FREQ_FWS_4)
EFC->EEFC_FMR = EEFC_FMR_FWS(4) | EEFC_FMR_CLOE;
else
EFC->EEFC_FMR = EEFC_FMR_FWS(5) | EEFC_FMR_CLOE;
}
}
}
}
}
/**
* \brief Enable USB clock.
*
* \param pll_id Source of the USB clock.
* \param div Actual clock divisor. Must be superior to 0.
*/
void sysclk_enable_usb(void)
{
/* Disable FS USB clock*/
PMC->PMC_SCDR = PMC_SCDR_USBCLK;
/* Enable PLL 480 MHz */
PMC->CKGR_UCKR = CKGR_UCKR_UPLLEN | CKGR_UCKR_UPLLCOUNT(0xF);
/* Wait that PLL is considered locked by the PMC */
while (!(PMC->PMC_SR & PMC_SR_LOCKU));
/* USB clock register: USB Clock Input is UTMI PLL */
PMC->PMC_USB = (PMC_USB_USBS | PMC_USB_USBDIV(USBCLK_DIV - 1));
PMC->PMC_SCER = PMC_SCER_USBCLK;
}
/**
* \brief Disables USB clock.
*
*
* \param pll_id Source of the USB clock.
* \param div Actual clock divisor. Must be superior to 0.
*/
void sysclk_disable_usb(void)
{
/* Disable FS USB clock*/
PMC->PMC_SCDR = PMC_SCDR_USBCLK;
/* Enable PLL 480 MHz */
PMC->CKGR_UCKR = CKGR_UCKR_UPLLEN | CKGR_UCKR_UPLLCOUNT(0xF);
/* Wait that PLL is considered locked by the PMC */
while (!(PMC->PMC_SR & PMC_SR_LOCKU));
/* USB clock register: USB Clock Input is UTMI PLL */
PMC->PMC_USB = (PMC_USB_USBS | PMC_USB_USBDIV(USBCLK_DIV - 1));
}
/* @cond 0 */
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/* @endcond */

View File

@@ -1,434 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Provides the low-level initialization function that called on chip startup.
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#ifndef __rtems__
#include "board.h"
#else /* __rtems__ */
#define MPU_HAS_NOCACHE_REGION
#include <chip.h>
#include <include/board_lowlevel.h>
#endif /* __rtems__ */
#if defined(ENABLE_TCM) && defined(__GNUC__)
extern char _itcm_lma, _sitcm, _eitcm;
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/* Default memory map
NO. Address range Memory region Memory type Shareable? Cache policy
1 0x00000000- 0x1FFFFFFF Code Normal
0x00000000- 0x003FFFFF ITCM
0x00400000- 0x005FFFFF Internal flash Normal Not shareable WB
2 0x20000000- 0x3FFFFFFF SRAM Normal
0x20000000- 0x203FFFFF DTCM
0x20400000- 0x2043FFFF First Partition Normal Not shareable WB
if MPU_HAS_NOCACHE_REGION is defined
0x20440000- 0x2045EFFF Second Partition Normal Not shareable WB
0x2045F000- 0x2045FFFF Nocache SRAM Normal Shareable
if MPU_HAS_NOCACHE_REGION is NOT defined
0x20440000- 0x2045FFFF Second Partition Normal Not shareable WB
3 0x40000000- 0x5FFFFFFF Peripheral Device Shareable
4 0x60000000- 0x7FFFFFFF RAM
0x60000000- 0x6FFFFFFF External EBI Strongly-ordered Shareable
0x70000000- 0x7FFFFFFF SDRAM Normal Shareable WBWA
5 0x80000000- 0x9FFFFFFF QSPI Strongly-ordered Shareable
6 0xA0100000- 0xA01FFFFF USBHS RAM Device Shareable
7 0xE0000000- 0xFFFFFFFF System - -
*/
/**
* \brief Set up a memory region.
*/
void _SetupMemoryRegion(void)
{
uint32_t dwRegionBaseAddr;
uint32_t dwRegionAttr;
memory_barrier();
/***************************************************
ITCM memory region --- Normal
START_Addr:- 0x00000000UL
END_Addr:- 0x003FFFFFUL
****************************************************/
dwRegionBaseAddr =
ITCM_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_ITCM_REGION; // 1
#ifdef __rtems__
if (ITCM_END_ADDRESS + 1 != ITCM_START_ADDRESS) {
#endif /* __rtems__ */
dwRegionAttr =
MPU_AP_PRIVILEGED_READ_WRITE |
MPU_CalMPURegionSize(ITCM_END_ADDRESS - ITCM_START_ADDRESS) |
MPU_REGION_ENABLE;
#ifdef __rtems__
} else {
dwRegionAttr = MPU_REGION_DISABLE;
}
#endif /* __rtems__ */
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/****************************************************
Internal flash memory region --- Normal read-only
(update to Strongly ordered in write accesses)
START_Addr:- 0x00400000UL
END_Addr:- 0x005FFFFFUL
******************************************************/
dwRegionBaseAddr =
IFLASH_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_IFLASH_REGION; //2
dwRegionAttr =
MPU_AP_READONLY |
INNER_NORMAL_WB_NWA_TYPE(NON_SHAREABLE) |
MPU_CalMPURegionSize(IFLASH_END_ADDRESS - IFLASH_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/****************************************************
DTCM memory region --- Normal
START_Addr:- 0x20000000L
END_Addr:- 0x203FFFFFUL
******************************************************/
/* DTCM memory region */
dwRegionBaseAddr =
DTCM_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_DTCM_REGION; //3
#ifdef __rtems__
if (DTCM_END_ADDRESS + 1 != DTCM_START_ADDRESS) {
#endif /* __rtems__ */
dwRegionAttr =
MPU_AP_PRIVILEGED_READ_WRITE |
INNER_NORMAL_NOCACHE_TYPE(NON_SHAREABLE) |
MPU_CalMPURegionSize(DTCM_END_ADDRESS - DTCM_START_ADDRESS) |
MPU_REGION_ENABLE;
#ifdef __rtems__
} else {
dwRegionAttr = MPU_REGION_DISABLE;
}
#endif /* __rtems__ */
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/****************************************************
SRAM Cacheable memory region --- Normal
START_Addr:- 0x20400000UL
END_Addr:- 0x2043FFFFUL
******************************************************/
/* SRAM memory region */
dwRegionBaseAddr =
SRAM_FIRST_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_SRAM_REGION_1; //4
dwRegionAttr =
MPU_AP_FULL_ACCESS |
INNER_NORMAL_WB_NWA_TYPE(NON_SHAREABLE) |
MPU_CalMPURegionSize(SRAM_FIRST_END_ADDRESS - SRAM_FIRST_START_ADDRESS)
| MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/****************************************************
Internal SRAM second partition memory region --- Normal
START_Addr:- 0x20440000UL
END_Addr:- 0x2045FFFFUL
******************************************************/
#ifndef __rtems__
/* SRAM memory region */
dwRegionBaseAddr =
SRAM_SECOND_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_SRAM_REGION_2; //5
dwRegionAttr =
MPU_AP_FULL_ACCESS |
INNER_NORMAL_WB_NWA_TYPE(NON_SHAREABLE) |
MPU_CalMPURegionSize(SRAM_SECOND_END_ADDRESS - SRAM_SECOND_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
#else /* __rtems__ */
/* NOTE: The first SRAM region is increased so it covers the whole SRAM. If
* the SRAM is something odd (like 384k on the SAME70Q21), the next higher
* power of two will be used (in the example: 512k). That removes the need of
* the second SRAM region. There is currently no memory after the SRAM so that
* shouldn't be a problem. */
#endif /* __rtems__ */
#ifdef MPU_HAS_NOCACHE_REGION
dwRegionBaseAddr =
SRAM_NOCACHE_START_ADDRESS |
MPU_REGION_VALID |
MPU_NOCACHE_SRAM_REGION; //11
dwRegionAttr =
MPU_AP_FULL_ACCESS |
INNER_OUTER_NORMAL_NOCACHE_TYPE(SHAREABLE) |
MPU_CalMPURegionSize(NOCACHE_SRAM_REGION_SIZE) |
MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
#endif
/****************************************************
Peripheral memory region --- DEVICE Shareable
START_Addr:- 0x40000000UL
END_Addr:- 0x5FFFFFFFUL
******************************************************/
dwRegionBaseAddr =
PERIPHERALS_START_ADDRESS |
MPU_REGION_VALID |
MPU_PERIPHERALS_REGION; //6
dwRegionAttr = MPU_AP_FULL_ACCESS |
MPU_REGION_EXECUTE_NEVER |
SHAREABLE_DEVICE_TYPE |
MPU_CalMPURegionSize(PERIPHERALS_END_ADDRESS - PERIPHERALS_START_ADDRESS)
| MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
#ifdef __rtems__
dwRegionBaseAddr =
SYSTEM_START_ADDRESS |
MPU_REGION_VALID |
MPU_SYSTEM_REGION;
dwRegionAttr = MPU_AP_FULL_ACCESS |
MPU_REGION_EXECUTE_NEVER |
SHAREABLE_DEVICE_TYPE |
MPU_CalMPURegionSize(SYSTEM_END_ADDRESS - SYSTEM_START_ADDRESS)
| MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
#endif /* __rtems__ */
/****************************************************
External EBI memory memory region --- Strongly Ordered
START_Addr:- 0x60000000UL
END_Addr:- 0x6FFFFFFFUL
******************************************************/
dwRegionBaseAddr =
EXT_EBI_START_ADDRESS |
MPU_REGION_VALID |
MPU_EXT_EBI_REGION;
dwRegionAttr =
MPU_AP_FULL_ACCESS |
/* External memory Must be defined with 'Device' or 'Strongly Ordered'
attribute for write accesses (AXI) */
STRONGLY_ORDERED_SHAREABLE_TYPE |
MPU_CalMPURegionSize(EXT_EBI_END_ADDRESS - EXT_EBI_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/****************************************************
SDRAM Cacheable memory region --- Normal
START_Addr:- 0x70000000UL
END_Addr:- 0x7FFFFFFFUL
******************************************************/
dwRegionBaseAddr =
SDRAM_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_SDRAM_REGION; //7
dwRegionAttr =
MPU_AP_FULL_ACCESS |
INNER_NORMAL_WB_RWA_TYPE(SHAREABLE) |
MPU_CalMPURegionSize(SDRAM_END_ADDRESS - SDRAM_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/****************************************************
QSPI memory region --- Normal
START_Addr:- 0x80000000UL
END_Addr:- 0x9FFFFFFFUL
******************************************************/
dwRegionBaseAddr =
QSPI_START_ADDRESS |
MPU_REGION_VALID |
MPU_QSPIMEM_REGION; //8
#ifdef __rtems__
if (QSPI_END_ADDRESS + 1 != QSPI_START_ADDRESS) {
#endif /* __rtems__ */
dwRegionAttr =
MPU_AP_FULL_ACCESS |
INNER_NORMAL_WB_NWA_TYPE(SHAREABLE) |
MPU_CalMPURegionSize(QSPI_END_ADDRESS - QSPI_START_ADDRESS) |
MPU_REGION_ENABLE;
#ifdef __rtems__
} else {
dwRegionAttr = MPU_REGION_DISABLE;
}
#endif /* __rtems__ */
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/****************************************************
USB RAM Memory region --- Device
START_Addr:- 0xA0100000UL
END_Addr:- 0xA01FFFFFUL
******************************************************/
dwRegionBaseAddr =
USBHSRAM_START_ADDRESS |
MPU_REGION_VALID |
MPU_USBHSRAM_REGION; //9
dwRegionAttr =
MPU_AP_FULL_ACCESS |
MPU_REGION_EXECUTE_NEVER |
SHAREABLE_DEVICE_TYPE |
MPU_CalMPURegionSize(USBHSRAM_END_ADDRESS - USBHSRAM_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
/* Enable the memory management fault , Bus Fault, Usage Fault exception */
SCB->SHCSR |= (SCB_SHCSR_MEMFAULTENA_Msk | SCB_SHCSR_BUSFAULTENA_Msk
| SCB_SHCSR_USGFAULTENA_Msk);
/* Enable the MPU region */
#ifndef __rtems__
MPU_Enable(MPU_ENABLE | MPU_PRIVDEFENA);
#else /* __rtems__ */
MPU_Enable(MPU_ENABLE);
#endif /* __rtems__ */
memory_sync();
}
#ifdef ENABLE_TCM
#if defined (__ICCARM__) /* IAR Ewarm */
#pragma section = "CSTACK"
#pragma section = "CSTACK_DTCM"
#define SRAM_STACK_BASE (__section_begin("CSTACK"))
#define DTCM_STACK_BASE (__section_begin("CSTACK_DTCM"))
#define SRAM_STACK_LIMIT (__section_end("CSTACK"))
#define DTCM_STACK_LIMIT (__section_end("CSTACK_DTCM"))
#elif defined (__CC_ARM) /* MDK */
extern uint32_t Image$$ARM_LIB_STACK$$Base;
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit;
extern uint32_t Image$$DTCM_STACK$$Base;
extern uint32_t Image$$DTCM_STACK$$ZI$$Limit;
#define SRAM_STACK_BASE (&Image$$ARM_LIB_STACK$$Base)
#define DTCM_STACK_BASE (&Image$$DTCM_STACK$$Base)
#define SRAM_STACK_LIMIT (&Image$$ARM_LIB_STACK$$ZI$$Limit)
#define DTCM_STACK_LIMIT (&Image$$DTCM_STACK$$ZI$$Limit)
#elif defined (__GNUC__) /* GCC */
extern char _sdtcm_stack, _edtcm_stack, _sstack, _estack;
#define SRAM_STACK_BASE ((void *)(&_sstack))
#define DTCM_STACK_BASE ((void *)(&_sdtcm_stack))
#define SRAM_STACK_LIMIT ((void *)(&_estack))
#define DTCM_STACK_LIMIT ((void *)(&_edtcm_stack))
#endif
/** \brief Change stack's location to DTCM
The function changes the stack's location from SRAM to DTCM
*/
void TCM_StackInit(void);
void TCM_StackInit(void)
{
uint32_t offset = (uint32_t)SRAM_STACK_LIMIT - (uint32_t)DTCM_STACK_LIMIT;
volatile char *dst = (volatile char *)DTCM_STACK_LIMIT;
volatile char *src = (volatile char *)SRAM_STACK_LIMIT;
/* copy stack data from SRAM to DTCM */
while (src > (volatile char *)SRAM_STACK_BASE)
*--dst = *--src;
__set_MSP(__get_MSP() - offset);
}
#endif
/**
* \brief Performs the low-level initialization of the chip.
*/
extern WEAK void LowLevelInit(void)
{
SystemInit();
#ifndef MPU_EXAMPLE_FEATURE
_SetupMemoryRegion();
#endif
#if defined(FFT_DEMO) && (defined(__GNUC__) || defined(__CC_ARM))
/* Enabling the FPU */
SCB->CPACR |= 0x00F00000;
__DSB();
__ISB();
#endif
#if defined(ENABLE_TCM) && defined(__GNUC__)
volatile char *dst = &_sitcm;
volatile char *src = &_itcm_lma;
/* copy code_TCM from flash to ITCM */
while (dst < &_eitcm)
*dst++ = *src++;
#endif
}

View File

@@ -1,294 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Implementation of memories configuration on board.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#ifndef __rtems__
#include "board.h"
#else /* __rtems__ */
#include <chip.h>
#include <include/board_memories.h>
#endif /* __rtems__ */
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#define SDRAM_BA0 (1 << 20)
#define SDRAM_BA1 (1 << 21)
#ifndef __rtems__
uint32_t BOARD_SdramValidation(uint32_t baseAddr, uint32_t size)
{
uint32_t i;
uint32_t ret = 1;
uint32_t *ptr32 = (uint32_t *) baseAddr;
uint16_t *ptr16 = (uint16_t *) baseAddr;
uint8_t *ptr8 = (uint8_t *) baseAddr;
/* Test for 55AA55AA/AA55AA55 pattern */
printf(" Test for 55AA55AA/AA55AA55 pattern ... \n\r");
for (i = 0; i < size; i ++) {
if (i & 1)
ptr32[i] = 0x55AA55AA;
else
ptr32[i] = 0xAA55AA55;
memory_barrier()
}
for (i = 0; i < size; i++) {
if (i & 1) {
if (ptr32[i] != 0x55AA55AA) {
printf("-E- Expected:%x, read %x @ %x \n\r" ,
0xAA55AA55, (unsigned)ptr32[i], (unsigned)(baseAddr + i));
ret = 0;
}
} else {
if (ptr32[i] != 0xAA55AA55) {
printf("-E- Expected:%x, read %x @ %x \n\r" ,
0xAA55AA55 , (unsigned)ptr32[i], (unsigned)(baseAddr + i));
ret = 0;
}
}
}
if (!ret) return ret;
printf(" Test for BYTE accessing... \n\r");
/* Test for BYTE accessing */
for (i = 0; i < size; i ++)
ptr8[i] = (uint8_t)(i & 0xFF);
for (i = 0; i < size; i++) {
if (ptr8[i] != (uint8_t)(i & 0xFF)) {
printf("-E- Expected:%x, read %x @ %x \n\r" ,
(unsigned)(i & 0xFF), ptr8[i], (unsigned)(baseAddr + i));
ret = 0;
}
}
if (!ret) return ret;
printf(" Test for WORD accessing... \n\r");
/* Test for WORD accessing */
for (i = 0; i < size / 2; i ++)
ptr16[i] = (uint16_t)(i & 0xFFFF);
for (i = 0; i < size / 2; i++) {
if (ptr16[i] != (uint16_t)(i & 0xFFFF)) {
printf("-E- Expected:%x, read %x @ %x \n\r" ,
(unsigned)(i & 0xFFFF), ptr16[i], (unsigned)(baseAddr + i));
ret = 0;
}
}
if (!ret) return ret;
printf(" Test for DWORD accessing... \n\r");
/* Test for DWORD accessing */
for (i = 0; i < size / 4; i ++) {
ptr32[i] = (uint32_t)(i & 0xFFFFFFFF);
memory_barrier()
}
for (i = 0; i < size / 4; i++) {
if (ptr32[i] != (uint32_t)(i & 0xFFFFFFFF)) {
printf("-E- Expected:%x, read %x @ %x \n\r" ,
(unsigned)(i & 0xFFFFFFFF), (unsigned)ptr32[i], (unsigned)(baseAddr + i));
ret = 0;
}
}
return ret;
}
#endif /* __rtems__ */
/**
* \brief Configures the EBI for SDRAM (IS42S16100E-7B) access.
*/
void BOARD_ConfigureSdram(void)
{
#ifndef __rtems__
const Pin pinsSdram[] = {BOARD_SDRAM_PINS};
#endif /* __rtems__ */
volatile uint32_t i;
volatile uint8_t *pSdram = (uint8_t *) SDRAM_CS_ADDR;
/* Configure PIO */
#ifndef __rtems__
PIO_Configure(pinsSdram, PIO_LISTSIZE(pinsSdram));
#endif /* __rtems__ */
PMC_EnablePeripheral(ID_SDRAMC);
MATRIX->CCFG_SMCNFCS = CCFG_SMCNFCS_SDRAMEN;
/* 1. SDRAM features must be set in the configuration register:
asynchronous timings (TRC, TRAS, etc.), number of columns, rows,
CAS latency, and the data bus width. */
#ifndef __rtems__
SDRAMC->SDRAMC_CR =
SDRAMC_CR_NC_COL8 // 8 column bits
| SDRAMC_CR_NR_ROW11 // 12 row bits (4K)
| SDRAMC_CR_CAS_LATENCY3 // CAS Latency 3
| SDRAMC_CR_NB_BANK2 // 2 banks
| SDRAMC_CR_DBW // 16 bit
| SDRAMC_CR_TWR(5)
| SDRAMC_CR_TRC_TRFC(13) // 63ns min
| SDRAMC_CR_TRP(5) // Command period (PRE to ACT) 21 ns min
| SDRAMC_CR_TRCD(
5) // Active Command to read/Write Command delay time 21ns min
| SDRAMC_CR_TRAS(9) // Command period (ACT to PRE) 42ns min
| SDRAMC_CR_TXSR(15U); // Exit self-refresh to active time 70ns Min
#else /* __rtems__ */
SDRAMC->SDRAMC_CR = BOARD_Sdram_Config.sdramc_cr;
#endif /* __rtems__ */
/* 2. For mobile SDRAM, temperature-compensated self refresh (TCSR), drive
strength (DS) and partial array self refresh (PASR) must be set in the
Low Power Register. */
/* 3. The SDRAM memory type must be set in the Memory Device Register.*/
#ifndef __rtems__
SDRAMC->SDRAMC_MDR = SDRAMC_MDR_MD_SDRAM;
#else /* __rtems__ */
SDRAMC->SDRAMC_MDR = BOARD_Sdram_Config.sdramc_mdr;
#endif /* __rtems__ */
/* 4. A minimum pause of 200 <20><>s is provided to precede any signal toggle.*/
for (i = 0; i < 100000; i++);
/* 5. (1)A NOP command is issued to the SDRAM devices. The application must
set Mode to 1 in the Mode Register and perform a write access to
any SDRAM address.*/
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NOP;
#ifdef __rtems__
(void) SDRAMC->SDRAMC_MR;
__DMB();
#endif /* __rtems__ */
*pSdram = 0;
for (i = 0; i < 100000; i++);
/* 6. An All Banks Precharge command is issued to the SDRAM devices.
The application must set Mode to 2 in the Mode Register and perform a write
access to any SDRAM address. */
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_ALLBANKS_PRECHARGE;
#ifdef __rtems__
(void) SDRAMC->SDRAMC_MR;
__DMB();
#endif /* __rtems__ */
*pSdram = 0;
for (i = 0; i < 100000; i++);
/* 7. Eight auto-refresh (CBR) cycles are provided. The application must
set the Mode to 4 in the Mode Register and perform a write access to any
SDRAM location eight times.*/
for (i = 0; i < 8; i++) {
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_AUTO_REFRESH;
#ifdef __rtems__
(void) SDRAMC->SDRAMC_MR;
__DMB();
#endif /* __rtems__ */
*pSdram = 0;
}
for (i = 0; i < 100000; i++);
/*8. A Mode Register set (MRS) cycle is issued to program the parameters of
the SDRAM devices, in particular CAS latency and burst length. The
application must set Mode to 3 in the Mode Register and perform a write
access to the SDRAM. The write address must be chosen so that BA[1:0]
are set to 0. For example, with a 16-bit 128 MB SDRAM (12 rows, 9 columns,
4 banks) bank address, the SDRAM write access should be done at the address
0x70000000.*/
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_LOAD_MODEREG;
#ifdef __rtems__
(void) SDRAMC->SDRAMC_MR;
__DMB();
#endif /* __rtems__ */
*pSdram = 0;
for (i = 0; i < 100000; i++);
/*9. For mobile SDRAM initialization, an Extended Mode Register set (EMRS)
cycle is issued to program the SDRAM parameters (TCSR, PASR, DS). The
application must set Mode to 5 in the Mode Register and perform a write
access to the SDRAM. The write address must be chosen so that BA[1] or BA[0]
are set to 1.
For example, with a 16-bit 128 MB SDRAM, (12 rows, 9 columns, 4 banks) bank
address the SDRAM write access should be done at the address 0x70800000 or
0x70400000. */
//SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_EXT_LOAD_MODEREG;
// *((uint8_t *)(pSdram + SDRAM_BA0)) = 0;
/* 10. The application must go into Normal Mode, setting Mode to 0 in the
Mode Register and performing a write access at any location in the SDRAM. */
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NORMAL;
#ifdef __rtems__
(void) SDRAMC->SDRAMC_MR;
__DMB();
#endif /* __rtems__ */
*pSdram = 0;
for (i = 0; i < 100000; i++);
/* 11. Write the refresh rate into the count field in the SDRAMC Refresh
Timer register. (Refresh rate = delay between refresh cycles).
The SDRAM device requires a refresh every 15.625 <20><>s or 7.81 <20><>s.
With a 100 MHz frequency, the Refresh Timer Counter Register must be set
with the value 1562(15.625 <20><>s x 100 MHz) or 781(7.81 <20><>s x 100 MHz). */
// For IS42S16100E, 2048 refresh cycle every 32ms, every 15.625 <20><>s
/* ((32 x 10(^-3))/2048) x150 x (10^6) */
#ifndef __rtems__
SDRAMC->SDRAMC_TR = 1562;
SDRAMC->SDRAMC_CFR1 |= SDRAMC_CFR1_UNAL;
#else /* __rtems__ */
SDRAMC->SDRAMC_TR = BOARD_Sdram_Config.sdramc_tr;
SDRAMC->SDRAMC_CFR1 = BOARD_Sdram_Config.sdramc_cfr1;
SDRAMC->SDRAMC_LPR = BOARD_Sdram_Config.sdramc_lpr;
#endif /* __rtems__ */
/* After initialization, the SDRAM devices are fully functional. */
}

View File

@@ -1,564 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
*
* Implements UART console.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#ifndef __rtems__
#include "board.h"
#else /* __rtems__ */
#include <chip.h>
#include <include/dbg_console.h>
#endif /* __rtems__ */
#include <stdio.h>
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/** Console baud rate always using 115200. */
#ifndef __rtems__
#define CONSOLE_BAUDRATE 115200
/** EDBG used USART1 as the console, but LON support on USART1 only */
#ifndef USART_LON
#define CONSOLE_EDBG
#endif
#if defined CONSOLE_EDBG
#define CONSOLE_ON_USART
#else
#define CONSOLE_ON_UART
#endif
#if defined CONSOLE_ON_UART
#if defined SSC_AUDIO || defined USART_LON
/** Usart Hw interface used by the console (UART4). */
#define CONSOLE_UART UART4
/** Pins description corresponding to Rxd,Txd, (UART pins) */
#define CONSOLE_PINS {PINS_UART4}
#define CONSOLE_ID ID_UART4
#else
/** Usart Hw interface used by the console (UART0). */
#define CONSOLE_UART UART0
/** Pins description corresponding to Rxd,Txd, (UART pins) */
#define CONSOLE_PINS {PINS_UART0}
#define CONSOLE_ID ID_UART0
#endif
#endif
#if defined CONSOLE_ON_USART
/** USART1 pin RX */
#define PIN_USART1_RXD_DBG \
{PIO_PA21A_RXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin TX */
#define PIN_USART1_TXD_DBG \
{PIO_PB4D_TXD1, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
#define PINS_USART1 PIN_USART1_TXD_DBG, PIN_USART1_RXD_DBG
/** Usart Hw interface used by the console (Usart0). */
#define CONSOLE_Usart USART1
/** Pins description corresponding to Rxd,Txd, (Usart pins) */
#define CONSOLE_PINS {PINS_USART1}
#define CONSOLE_ID ID_USART1
#endif
#else /* __rtems__ */
#define CONSOLE_BAUDRATE ATSAM_CONSOLE_BAUD
#if ATSAM_CONSOLE_DEVICE_TYPE == 1
#define CONSOLE_ON_UART
#if ATSAM_CONSOLE_DEVICE_INDEX == 4
#define CONSOLE_UART UART4
#define CONSOLE_ID ID_UART4
#elif ATSAM_CONSOLE_DEVICE_INDEX == 3
#define CONSOLE_UART UART3
#define CONSOLE_ID ID_UART3
#elif ATSAM_CONSOLE_DEVICE_INDEX == 2
#define CONSOLE_UART UART2
#define CONSOLE_ID ID_UART2
#elif ATSAM_CONSOLE_DEVICE_INDEX == 1
#define CONSOLE_UART UART1
#define CONSOLE_ID ID_UART1
#else
#define CONSOLE_UART UART0
#define CONSOLE_ID ID_UART0
#endif
#else
#define CONSOLE_ON_USART
#if ATSAM_CONSOLE_DEVICE_INDEX == 4
#define CONSOLE_Usart USART4
#define CONSOLE_ID ID_USART4
#elif ATSAM_CONSOLE_DEVICE_INDEX == 3
#define CONSOLE_Usart USART3
#define CONSOLE_ID ID_USART3
#elif ATSAM_CONSOLE_DEVICE_INDEX == 2
#define CONSOLE_Usart USART2
#define CONSOLE_ID ID_USART2
#elif ATSAM_CONSOLE_DEVICE_INDEX == 1
#define CONSOLE_Usart USART1
#define CONSOLE_ID ID_USART1
#else
#define CONSOLE_Usart USART0
#define CONSOLE_ID ID_USART0
#endif
#endif
#endif /* __rtems__ */
/*----------------------------------------------------------------------------
* Variables
*----------------------------------------------------------------------------*/
#ifndef __rtems__
/** Is Console Initialized. */
static uint8_t _ucIsConsoleInitialized = 0;
#else /* __rtems__ */
#define _ucIsConsoleInitialized 1
#endif /* __rtems__ */
/**
* \brief Configures an USART peripheral with the specified parameters.
*
* \param baudrate Baudrate at which the USART should operate (in Hz).
* \param masterClock Frequency of the system master clock (in Hz).
*/
extern void DBG_Configure(uint32_t baudrate, uint32_t masterClock)
{
#ifndef __rtems__
const Pin pPins[] = CONSOLE_PINS;
#endif /* __rtems__ */
#if defined CONSOLE_ON_UART
Uart *pUart = CONSOLE_UART;
/* Configure PIO */
#ifndef __rtems__
PIO_Configure(pPins, PIO_LISTSIZE(pPins));
#endif /* __rtems__ */
// Reset & disable receiver and transmitter, disable interrupts
pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RSTSTA;
pUart->UART_IDR = 0xFFFFFFFF;
PMC_EnablePeripheral(CONSOLE_ID);
pUart->UART_BRGR = (masterClock / baudrate) / 16;
// Configure mode register
pUart->UART_MR
= (UART_MR_CHMODE_NORMAL | UART_MR_PAR_NO
| UART_MR_BRSRCCK_PERIPH_CLK);
// Enable receiver and transmitter
pUart->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
#endif
#if defined CONSOLE_ON_USART
Usart *pUsart = CONSOLE_Usart;
// Disable the MATRIX registers write protection
#ifndef __rtems__
MATRIX->MATRIX_WPMR = MATRIX_WPMR_WPKEY_PASSWD;
MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO4;
PIO_Configure(pPins, PIO_LISTSIZE(pPins));
#endif /* __rtems__ */
// Reset & disable receiver and transmitter, disable interrupts
pUsart->US_CR = US_CR_RSTRX | US_CR_RSTTX | US_CR_RSTSTA;
pUsart->US_IDR = 0xFFFFFFFF;
PMC_EnablePeripheral(CONSOLE_ID);
pUsart->US_BRGR = (masterClock / baudrate) / 16;
// Configure mode register
pUsart->US_MR
= (US_MR_USART_MODE_NORMAL | US_MR_PAR_NO | US_MR_USCLKS_MCK
| US_MR_CHRL_8_BIT);
// Enable receiver and transmitter
pUsart->US_CR = US_CR_RXEN | US_CR_TXEN;
#endif
#ifndef __rtems__
_ucIsConsoleInitialized = 1;
/* Disable buffering for printf(). */
#if (defined (__GNUC__) && !defined (__SAMBA__))
setvbuf(stdout, (char *)NULL, _IONBF, 0);
#endif
#endif /* __rtems__ */
}
/**
* \brief Outputs a character on the UART line.
*
* \note This function is synchronous (i.e. uses polling).
* \param c Character to send.
*/
extern void DBG_PutChar(uint8_t c)
{
#if defined CONSOLE_ON_UART
Uart *pUart = CONSOLE_UART;
if (!_ucIsConsoleInitialized)
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
// Wait for the transmitter to be ready
while ((pUart->UART_SR & UART_SR_TXEMPTY) == 0);
// Send character
pUart->UART_THR = c;
// Wait for the transfer to complete
while ((pUart->UART_SR & UART_SR_TXEMPTY) == 0);
#endif
#if defined CONSOLE_ON_USART
Usart *pUsart = CONSOLE_Usart;
if (!_ucIsConsoleInitialized)
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
// Wait for the transmitter to be ready
while ((pUsart->US_CSR & US_CSR_TXEMPTY) == 0);
// Send character
pUsart->US_THR = c;
// Wait for the transfer to complete
while ((pUsart->US_CSR & US_CSR_TXEMPTY) == 0);
#endif
}
/**
* \brief Input a character from the UART line.
*
* \note This function is synchronous
* \return character received.
*/
extern uint32_t DBG_GetChar(void)
{
#if defined CONSOLE_ON_UART
Uart *pUart = CONSOLE_UART;
if (!_ucIsConsoleInitialized)
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
while ((pUart->UART_SR & UART_SR_RXRDY) == 0);
return pUart->UART_RHR;
#endif
#if defined CONSOLE_ON_USART
Usart *pUsart = CONSOLE_Usart;
if (!_ucIsConsoleInitialized)
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
while ((pUsart->US_CSR & US_CSR_RXRDY) == 0);
return pUsart->US_RHR;
#endif
}
/**
* \brief Check if there is Input from UART line.
*
* \return true if there is Input.
*/
extern uint32_t DBG_IsRxReady(void)
{
#if defined CONSOLE_ON_UART
Uart *pUart = CONSOLE_UART;
if (!_ucIsConsoleInitialized)
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
return (pUart->UART_SR & UART_SR_RXRDY);
#endif
#if defined CONSOLE_ON_USART
Usart *pUsart = CONSOLE_Usart;
if (!_ucIsConsoleInitialized)
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
return (pUsart->US_CSR & US_CSR_RXRDY);
#endif
}
#ifndef __rtems__
/**
* Displays the content of the given frame on the UART0.
*
* \param pucFrame Pointer to the frame to dump.
* \param dwSize Buffer size in bytes.
*/
extern void DBG_DumpFrame(uint8_t *pucFrame, uint32_t dwSize)
{
uint32_t dw;
for (dw = 0; dw < dwSize; dw++)
printf("%02X ", pucFrame[dw]);
printf("\n\r");
}
/**
* Displays the content of the given buffer on the UART0.
*
* \param pucBuffer Pointer to the buffer to dump.
* \param dwSize Buffer size in bytes.
* \param dwAddress Start address to display
*/
extern void DBG_DumpMemory(uint8_t *pucBuffer, uint32_t dwSize,
uint32_t dwAddress)
{
uint32_t i;
uint32_t j;
uint32_t dwLastLineStart;
uint8_t *pucTmp;
for (i = 0; i < (dwSize / 16); i++) {
printf("0x%08X: ", (unsigned int)(dwAddress + (i * 16)));
pucTmp = (uint8_t *)&pucBuffer[i * 16];
for (j = 0; j < 4; j++) {
printf("%02X%02X%02X%02X ",
pucTmp[0], pucTmp[1], pucTmp[2], pucTmp[3]);
pucTmp += 4;
}
pucTmp = (uint8_t *)&pucBuffer[i * 16];
for (j = 0; j < 16; j++)
DBG_PutChar(*pucTmp++);
printf("\n\r");
}
if ((dwSize % 16) != 0) {
dwLastLineStart = dwSize - (dwSize % 16);
printf("0x%08X: ", (unsigned int)(dwAddress + dwLastLineStart));
for (j = dwLastLineStart; j < dwLastLineStart + 16; j++) {
if ((j != dwLastLineStart) && (j % 4 == 0))
printf(" ");
if (j < dwSize)
printf("%02X", pucBuffer[j]);
else
printf(" ");
}
printf(" ");
for (j = dwLastLineStart; j < dwSize; j++)
DBG_PutChar(pucBuffer[j]);
printf("\n\r");
}
}
/**
* Reads an integer
*
* \param pdwValue Pointer to a integer variable to contain the input value.
*
* \return success(1) or failure(0)
*/
extern uint32_t DBG_GetInteger(int32_t *pdwValue)
{
uint8_t ucKey;
uint8_t ucNum = 0;
int32_t dwValue = 0;
int32_t sign = 1;
while (1) {
ucKey = DBG_GetChar();
DBG_PutChar(ucKey);
if (((ucKey == '-') || (ucKey == '+')) && (ucNum == 0)) {
if (ucKey == '-')
sign = -1;
else
sign = 1;
ucNum++;
} else {
if (ucKey >= '0' && ucKey <= '9') {
dwValue = (dwValue * 10) + (ucKey - '0');
ucNum++;
} else {
if (ucKey == 0x0D || ucKey == ' ') {
if (ucNum == 0) {
printf("\n\rWrite a number and press ENTER or SPACE!\n\r");
return 0;
} else {
printf("\n\r");
*pdwValue = dwValue * sign;
return 1;
}
} else {
printf("\n\r'%c' not a number or sign(+/-)!\n\r", ucKey);
return 0;
}
}
}
}
}
/**
* Reads an integer and check the value
*
* \param pdwValue Pointer to a integer variable to contain the input value.
* \param dwMin Minimum value
* \param dwMax Maximum value
*
* \return success(1) or failure(0)
*/
extern uint32_t DBG_GetIntegerMinMax(int32_t *pdwValue, int32_t dwMin,
int32_t dwMax)
{
int32_t dwValue = 0;
if (DBG_GetInteger(&dwValue) == 0)
return 0;
if (dwValue < dwMin || dwValue > dwMax) {
printf("\n\rThe number have to be between %d and %d\n\r",
(int)dwMin, (int)dwMax);
return 0;
}
printf("\n\r");
*pdwValue = dwValue;
return 1;
}
/**
* Reads an hexadecimal number
*
* \param pdwValue Pointer to the uint32_t variable to contain the input value.
*/
extern uint32_t DBG_GetHexa32(uint32_t *pdwValue)
{
uint8_t ucKey;
uint32_t dw = 0;
uint32_t dwValue = 0;
for (dw = 0; dw < 8; dw++) {
ucKey = DBG_GetChar();
DBG_PutChar(ucKey);
if (ucKey >= '0' && ucKey <= '9')
dwValue = (dwValue * 16) + (ucKey - '0');
else {
if (ucKey >= 'A' && ucKey <= 'F')
dwValue = (dwValue * 16) + (ucKey - 'A' + 10);
else {
if (ucKey >= 'a' && ucKey <= 'f')
dwValue = (dwValue * 16) + (ucKey - 'a' + 10);
else {
printf("\n\rIt is not a hexadecimal character!\n\r");
return 0;
}
}
}
}
printf("\n\r");
*pdwValue = dwValue;
return 1;
}
#if defined __ICCARM__ /* IAR Ewarm 5.41+ */
/**
* \brief Outputs a character on the UART.
*
* \param c Character to output.
*
* \return The character that was output.
*/
extern WEAK signed int putchar(signed int c)
{
DBG_PutChar(c);
return c;
}
#endif // defined __ICCARM__
extern WEAK int puts(const char *ptr)
{
for (; *ptr != 0; ptr++)
DBG_PutChar(*ptr);
return 0;
}
extern WEAK char *gets(char *ptr)
{
uint8_t ch = 0;
while (ch != '\r') {
ch = DBG_GetChar();
DBG_PutChar(ch);
*(ptr++) = ch;
}
*ptr = '\0';
return 0;
}
#endif /* __rtems__ */

View File

@@ -1,159 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \addtogroup acc_module Working with ACC
* \ingroup peripherals_module
* The ACC driver provides the interface to configure and use the ACC
* peripheral.\n
*
* It applies comparison on two inputs and gives a compare output.
*
* To Enable a ACC Comparison,the user has to follow these few steps:
* <ul>
* <li> Enable ACC peripheral clock by setting the corresponding bit in
* PMC_PCER1 (PMC Peripheral Clock Enable Register 1)
* </li>
* <li> Reset the controller by asserting ACC_CR_SWRST in ACC_CR(ACC Control
* Register) </li>
* <li> Configure the mode as following steps: </li>
* -# Select inputs for SELMINUS and SELPLUS in ACC_MR (ACC Mode Register).
* -# Enable Analog Comparator by setting ACEN in ACC_MR.
* -# Configure Edge Type to detect different compare output.
* </li>
* <li> Wait until the automatic mask period expires by polling MASK bit in
* ACC_ISR.
* </ul>
*
* For more accurate information, please look at the ACC section of the
* Datasheet.
*
* Related files :\n
* \ref acc.c\n
* \ref acc.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Analog Comparator Controller (ACC).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "acc.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initialize the ACC controller
*
* \param pAcc Pointer to an Acc instance.
* \param idAcc ACC identifier
* \param ucSelplus input connected to inp, 0~7
* \param ucSelminus input connected to inm,0~7
* \param wAc_en Analog comparator enabled/disabled
* \param wEdge CF flag triggering mode
* \param wInvert INVert comparator output,use pattern defined in the device
* header file
*/
extern void ACC_Configure(Acc *pAcc, uint8_t idAcc, uint8_t ucSelplus,
uint8_t ucSelminus, uint16_t wAc_en, uint16_t wEdge, uint16_t wInvert)
{
/* Enable peripheral clock*/
PMC->PMC_PCER1 = 1 << (idAcc - 32);
/* Reset the controller */
pAcc->ACC_CR |= ACC_CR_SWRST;
/* Write to the MR register */
ACC_CfgModeReg(pAcc,
((ucSelplus << ACC_MR_SELPLUS_Pos) & ACC_MR_SELPLUS_Msk) |
((ucSelminus << ACC_MR_SELMINUS_Pos) & ACC_MR_SELMINUS_Msk) |
((wAc_en << 8) & ACC_MR_ACEN) |
((wEdge << ACC_MR_EDGETYP_Pos) & ACC_MR_EDGETYP_Msk) |
((wInvert << 12) & ACC_MR_INV));
/* set hysteresis and current option*/
pAcc->ACC_ACR = (ACC_ACR_ISEL_HISP
| ((0x01 << ACC_ACR_HYST_Pos) & ACC_ACR_HYST_Msk));
/* Automatic Output Masking Period*/
while (pAcc->ACC_ISR & (uint32_t)ACC_ISR_MASK);
}
/**
* Return the Channel Converted Data
* \param pAcc Pointer to an Acc instance.
* \param ucSelplus input applied on ACC SELPLUS
* \param ucSelminus input applied on ACC SELMINUS
*/
extern void ACC_SetComparisonPair(Acc *pAcc, uint8_t ucSelplus,
uint8_t ucSelminus)
{
uint32_t dwTemp;
assert(ucSelplus < 8 && ucSelminus < 8);
dwTemp = pAcc->ACC_MR;
pAcc->ACC_MR =
dwTemp & (uint32_t) ((~ACC_MR_SELMINUS_Msk) & (~ACC_MR_SELPLUS_Msk));
pAcc->ACC_MR |= (((ucSelplus << ACC_MR_SELPLUS_Pos) & ACC_MR_SELPLUS_Msk) |
((ucSelminus << ACC_MR_SELMINUS_Pos) & ACC_MR_SELMINUS_Msk));
}
/**
* Return Comparison Result
* \param pAcc Pointer to an Acc instance.
* \param dwStatus value of ACC_ISR
*/
extern uint32_t ACC_GetComparisonResult(Acc *pAcc, uint32_t dwStatus)
{
uint32_t dwTemp = pAcc->ACC_MR;
if ((dwTemp & ACC_MR_INV) == ACC_MR_INV) {
if (dwStatus & ACC_ISR_SCO) {
return 0; /* inn>inp*/
} else {
return 1;/* inp>inn*/
}
} else {
if (dwStatus & ACC_ISR_SCO) {
return 1; /* inp>inn*/
} else {
return 0;/* inn>inp*/
}
}
}

View File

@@ -1,286 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \addtogroup aes_module Working with AES
* \ingroup peripherals_module
* The AES driver provides the interface to configure and use the AES peripheral.
* \n
*
* The Advanced Encryption Standard (AES) specifies a FIPS-approved
* cryptographic algorithm that can be used to protect electronic data. The AES
* algorithm is a symmetric block cipher that can encrypt (encipher) and decrypt
* (decipher) information.
* Encryption converts data to an unintelligible form called ciphertext.
* Decrypting the ciphertext converts the data back into its original form,
* called plaintext. The CIPHER bit in the AES Mode Register (AES_MR) allows
* selection between the encryption and the decryption processes. The AES is
* capable of using cryptographic keys of 128/192/256 bits to encrypt and
* decrypt data in blocks of 128 bits.
* This 128-bit/192-bit/256-bit key is defined in the Key Registers (AES_KEYWRx)
* and set by AES_WriteKey(). The input to the encryption processes of the CBC,
* CFB, and OFB modes includes, in addition to the plaintext, a 128-bit data
* block called the initialization vector (IV),
* which must be set with AES_SetVector().
* The initialization vector is used in an initial step in the encryption of a
* message and in the corresponding decryption of the message.
* The Initialization Vector Registers are also used by the CTR mode to set the
* counter value.
*
* To Enable a AES encryption and decryption,the user has to follow these few
* steps:
* <ul>
* <li> A software triggered hardware reset of the AES interface is performed
* by AES_SoftReset().</li>
* <li> Configure AES algorithm mode, key mode, start mode and operation mode by
* AES_Configure(). </li>
* <li> Input AES data for encryption and decryption with function
* AES_SetInput() </li>
* <li> Set AES key with function AES_WriteKey(). </li>
* <li> To start the encryption or the decryption process with AES_Start()</li>
* <li> To get the encryption or decryption result by AES_GetOutput() </li>
* </ul>
*
*
* For more accurate information, please look at the AES section of the
* Datasheet.
*
* Related files :\n
* \ref aes.c\n
* \ref aes.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Advanced Encryption Standard (AES)
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "aes.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Starts Manual encryption/decryption process.
*/
void AES_Start(void)
{
AES->AES_CR = AES_CR_START;
}
/**
* \brief Resets the AES. A software triggered hardware reset of the AES
* interface is performed.
*/
void AES_SoftReset(void)
{
AES->AES_CR = AES_CR_SWRST;
}
/**
* \brief Configures an AES peripheral with the specified parameters.
* \param mode Desired value for the AES mode register (see the datasheet).
*/
void AES_Configure(uint32_t mode)
{
AES->AES_MR = mode;
}
/**
* \brief Enables the selected interrupts sources on a AES peripheral.
* \param sources Bitwise OR of selected interrupt sources.
*/
void AES_EnableIt(uint32_t sources)
{
AES->AES_IER = sources;
}
/**
* \brief Disables the selected interrupts sources on a AES peripheral.
* \param sources Bitwise OR of selected interrupt sources.
*/
void AES_DisableIt(uint32_t sources)
{
AES->AES_IDR = sources;
}
/**
* \brief Get the current status register of the given AES peripheral.
* \return AES status register.
*/
uint32_t AES_GetStatus(void)
{
return AES->AES_ISR;
}
/**
* \brief Set the 128-bit/192-bit/256-bit cryptographic key used for
* encryption/decryption.
* \param pKey Pointer to a 16/24/32 bytes cipher key.
* \param keyLength length of key
*/
void AES_WriteKey(const uint32_t *pKey, uint32_t keyLength)
{
AES->AES_KEYWR[0] = pKey[0];
AES->AES_KEYWR[1] = pKey[1];
AES->AES_KEYWR[2] = pKey[2];
AES->AES_KEYWR[3] = pKey[3];
if (keyLength >= 24) {
AES->AES_KEYWR[4] = pKey[4];
AES->AES_KEYWR[5] = pKey[5];
}
if (keyLength == 32) {
AES->AES_KEYWR[6] = pKey[6];
AES->AES_KEYWR[7] = pKey[7];
}
}
/**
* \brief Set the for 32-bit input Data allow to set the 128-bit data block
* used for encryption/decryption.
* \param data Pointer to the 16-bytes data to cipher/decipher.
*/
void AES_SetInput(const uint32_t *data)
{
uint8_t i;
for (i = 0; i < 4; i++)
AES->AES_IDATAR[i] = data[i];
}
/**
* \brief Get the four 32-bit data contain the 128-bit data block which
* has been encrypted/decrypted.
* \param data pointer to the word that has been encrypted/decrypted..
*/
void AES_GetOutput(uint32_t *data)
{
uint8_t i;
for (i = 0; i < 4; i++)
data[i] = AES->AES_ODATAR[i];
}
/**
* \brief Set four 64-bit initialization vector data block, which is used by
* some modes of operation as an additional initial input.
* \param pVector point to the word of the initialization vector.
*/
void AES_SetVector(const uint32_t *pVector)
{
AES->AES_IVR[0] = pVector[0];
AES->AES_IVR[1] = pVector[1];
AES->AES_IVR[2] = pVector[2];
AES->AES_IVR[3] = pVector[3];
}
/**
* \brief Set Length in bytes of the AAD data that is to be processed.
* \param len Length.
*/
void AES_SetAadLen(uint32_t len)
{
AES->AES_AADLENR = len;
}
/**
* \brief Set Length in bytes of the Length in bytes of the
* plaintext/ciphertext (C) data that is to be processed..
* \param len Length.
*/
void AES_SetDataLen(uint32_t len)
{
AES->AES_CLENR = len;
}
/**
* \brief Set The four 32-bit Hash Word registers expose the intermediate GHASH
* value. May be read to save the current GHASH value so processing can later be
* resumed, presumably on a later message fragment. modes of operation as an
* additional initial input.
* \param hash point to the word of the hash.
*/
void AES_SetGcmHash(uint32_t *hash)
{
uint8_t i;
for (i = 0; i < 4; i++)
AES->AES_GHASHR[i] = hash[i];
}
/**
* \brief Get The four 32-bit Tag which contain the final 128-bit GCM
* Authentication tag <20><>T<EFBFBD><54> when GCM processing is complete.
* \param tag point to the word of the tag.
*/
void AES_GetGcmTag(uint32_t *tag)
{
uint8_t i;
for (i = 0; i < 4; i++)
tag[i] = AES->AES_TAGR[i];
}
/**
* \brief Reports the current value of the 32-bit GCM counter
* \param counter Point to value of GCM counter.
*/
void AES_GetGcmCounter(uint32_t *counter)
{
*counter = AES->AES_CTRR;
}
/**
* \brief Get the four 32-bit data contain the 128-bit H value computed from
* the KEYW value
* \param data point to the word that has been encrypted/decrypted.
*/
void AES_GetGcmH(uint32_t *h)
{
uint8_t i;
for (i = 0; i < 4; i++)
h[i] = AES->AES_GCMHR[i];
}

View File

@@ -1,256 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \addtogroup afe_dma_module Working with AFE (DMA support)
* \ingroup peripherals_module
* The afec driver provides the interface to configure and use the afecC
* peripheral with DMA support.\n
*
* For more accurate information, please look at the AFEC section of the
* Datasheet.
*
* Related files :\n
* \ref afe_dma.c\n
* \ref afe_dma.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "afe_dma.h"
#include "xdmad.h"
#include <stdint.h>
#include <assert.h>
/* DMA driver instance */
static uint32_t afeDmaRxChannel;
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
/**
* \brief AFE xDMA Rx callback
* Invoked on AFE DMA reception done.
* \param channel DMA channel.
* \param pArg Pointer to callback argument - Pointer to AfeDma instance.
*/
static void Afe_Rx_Cb(uint32_t channel, AfeDma *pArg)
{
AfeCmd *pAfedCmd = pArg->pCurrentCommand;
if (channel != afeDmaRxChannel)
return;
/* Configure and enable interrupt on RC compare */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_DisableIRQ(XDMAC_IRQn);
/* Release the DMA channels */
XDMAD_FreeChannel(pArg->pXdmad, afeDmaRxChannel);
SCB_InvalidateDCache_by_Addr(pAfedCmd->pRxBuff, pAfedCmd->RxSize);
/* Release the dataflash semaphore */
pArg->semaphore++;
/* Invoke the callback associated with the current command */
if (pAfedCmd && pAfedCmd->callback)
pAfedCmd->callback(0, pAfedCmd->pArgument);
}
/**
* \brief Configure the DMA Channels: 0 RX.
* Channels are disabled after configure.
* \param pXdmad Pointer to a AfeDma instance
* \returns 0 if the dma channel configuration successfully; otherwise returns
* AFE_ERROR_XXX.
*/
static uint8_t _AfeConfigureDmaChannels(AfeDma *pAfed)
{
/* Driver initialize */
XDMAD_FreeChannel(pAfed->pXdmad, afeDmaRxChannel);
/* Allocate a DMA channel for AFE0/1 RX. */
afeDmaRxChannel =
XDMAD_AllocateChannel(pAfed->pXdmad, pAfed->afeId, XDMAD_TRANSFER_MEMORY);
if (afeDmaRxChannel == XDMAD_ALLOC_FAILED)
return AFE_ERROR;
/* Setup callbacks for AFE0/1 RX */
XDMAD_SetCallback(pAfed->pXdmad, afeDmaRxChannel,
(XdmadTransferCallback)Afe_Rx_Cb, pAfed);
if (XDMAD_PrepareChannel(pAfed->pXdmad, afeDmaRxChannel))
return AFE_ERROR;
return AFE_OK;
}
/**
* \brief Configure the DMA source and destination with Linker List mode.
* \param pXdmad Pointer to a AfeDma instance
* \param pCommand Pointer to AfeCmd instance
* \param AfeCmd Pointer to command
*/
static uint8_t _Afe_configureLinkList(Afec *pAfeHw, void *pXdmad,
AfeCmd *pCommand)
{
uint32_t xdmaCndc, xdmaInt;
sXdmadCfg xdmadRxCfg;
uint32_t afeId;
if ((unsigned int)pAfeHw == (unsigned int)AFEC0) afeId = ID_AFEC0;
if ((unsigned int)pAfeHw == (unsigned int)AFEC1) afeId = ID_AFEC1;
/* Setup RX Link List */
xdmadRxCfg.mbr_ubc = XDMA_UBC_NVIEW_NDV0 |
XDMA_UBC_NDE_FETCH_DIS |
XDMA_UBC_NDEN_UPDATED |
pCommand->RxSize;
xdmadRxCfg.mbr_da = (uint32_t)pCommand->pRxBuff;
xdmadRxCfg.mbr_sa = (uint32_t) & (pAfeHw->AFEC_LCDR);
xdmadRxCfg.mbr_cfg = XDMAC_CC_TYPE_PER_TRAN |
XDMAC_CC_MBSIZE_SINGLE |
XDMAC_CC_DSYNC_PER2MEM |
XDMAC_CC_CSIZE_CHK_1 |
XDMAC_CC_DWIDTH_WORD |
XDMAC_CC_SIF_AHB_IF1 |
XDMAC_CC_DIF_AHB_IF1 |
XDMAC_CC_SAM_FIXED_AM |
XDMAC_CC_DAM_INCREMENTED_AM |
XDMAC_CC_PERID(
XDMAIF_Get_ChannelNumber(afeId, XDMAD_TRANSFER_RX));
xdmadRxCfg.mbr_bc = 0;
xdmadRxCfg.mbr_sus = 0;
xdmadRxCfg.mbr_dus = 0;
xdmaInt = (XDMAC_CIE_BIE |
XDMAC_CIE_DIE |
XDMAC_CIE_FIE |
XDMAC_CIE_RBIE |
XDMAC_CIE_WBIE |
XDMAC_CIE_ROIE);
xdmaCndc = 0;
if (XDMAD_ConfigureTransfer(pXdmad, afeDmaRxChannel,
&xdmadRxCfg, xdmaCndc, 0, xdmaInt))
return AFE_ERROR;
return AFE_OK;
}
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initializes the AfeDma structure and the corresponding AFE & DMA .
* hardware select value.
* The driver will uses DMA channel 0 for RX .
* The DMA channels are freed automatically when no DMA command processing.
*
* \param pAfed Pointer to a AfeDma instance.
* \param pAfeHw Associated Afe peripheral.
* \param AfeId Afe peripheral identifier.
* \param pDmad Pointer to a Dmad instance.
*/
uint32_t Afe_ConfigureDma(AfeDma *pAfed ,
Afec *pAfeHw ,
uint8_t AfeId,
sXdmad *pXdmad)
{
/* Initialize the Afe structure */
pAfed->pAfeHw = pAfeHw;
pAfed->afeId = AfeId;
pAfed->semaphore = 1;
pAfed->pCurrentCommand = 0;
assert(pXdmad == &XDMAD_Instance);
pAfed->pXdmad = pXdmad;
return 0;
}
/**
* \brief Starts a AFE transfer. This is a non blocking function. It will
* return as soon as the transfer is started.
*
* \param pAfed Pointer to a AfeDma instance.
* \param pCommand Pointer to the Afe command to execute.
* \returns 0 if the transfer has been started successfully; otherwise returns
* AFE_ERROR_LOCK is the driver is in use, or AFE_ERROR if the command is not
* valid.
*/
uint32_t Afe_SendData(AfeDma *pAfed, AfeCmd *pCommand)
{
Afec *pAfeHw = pAfed->pAfeHw;
/* Try to get the dataflash semaphore */
if (pAfed->semaphore == 0)
return AFE_ERROR_LOCK;
pAfed->semaphore--;
// Initialize the callback
pAfed->pCurrentCommand = pCommand;
/* Initialize DMA controller using channel 0 for RX. */
if (_AfeConfigureDmaChannels(pAfed))
return AFE_ERROR_LOCK;
/* Configure and enable interrupt on RC compare */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_SetPriority(XDMAC_IRQn , 1);
NVIC_EnableIRQ(XDMAC_IRQn);
if (_Afe_configureLinkList(pAfeHw, pAfed->pXdmad, pCommand))
return AFE_ERROR_LOCK;
AFEC_StartConversion(pAfeHw);
/* Start DMA 0(RX) */
if (XDMAD_StartTransfer(pAfed->pXdmad, afeDmaRxChannel))
return AFE_ERROR_LOCK;
return AFE_OK;;
}

View File

@@ -1,458 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \addtogroup AFEC_module Working with AFE
* \ingroup peripherals_module
* The AFE driver provides the interface to configure and use the AFE peripheral.
* \n
*
* It converts the analog input to digital format. The converted result could be
* 12bit or 10bit. The AFE supports up to 16 analog lines.
*
* To Enable a AFE conversion,the user has to follow these few steps:
* <ul>
* <li> Select an appropriate reference voltage on ADVREF </li>
* <li> Configure the AFE according to its requirements and special needs,which
* could be broken down into several parts:
* -# Select the resolution by setting or clearing AFEC_MR_LOWRES bit in
* AFEC_MR (Mode Register)
* -# Set AFE clock by setting AFEC_MR_PRESCAL bits in AFEC_MR, the clock is
* calculated with AFEClock = MCK / ((PRESCAL+1) * 2)
* -# Set Startup Time,Tracking Clock cycles and Transfer Clock respectively
* in AFEC_MR.
</li>
* <li> Start conversion by setting AFEC_CR_START in AFEC_CR. </li>
* </ul>
*
* For more accurate information, please look at the AFE section of the
* Datasheet.
*
* Related files :\n
* \ref afec.c\n
* \ref afec.h\n
* \ref afe_dma.c\n
* \ref afe_dma.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Analog-to-Digital Converter (AFE).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Local variables
*----------------------------------------------------------------------------*/
/** Current working clock */
static uint32_t dwAFEClock = 0;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initialize the AFE controller
*
* \param pAFE Pointer to an AFE instance.
* \param dwID AFE Index
*/
extern void AFEC_Initialize(Afec *pAFE, uint32_t dwID)
{
/* Enable peripheral clock*/
PMC_EnablePeripheral(dwID);
/* Reset the controller */
pAFE->AFEC_CR = AFEC_CR_SWRST;
/* Reset Mode Register */
pAFE->AFEC_MR = 0;
}
/**
* \brief Set AFE clock.
*
* \param pAFE Pointer to an AFE instance.
* \param dwPres prescale value
* \param dwMck Board MCK (Hz)
*
* \return AFE clock
*/
extern uint32_t AFEC_SetClock(Afec *pAFE, uint32_t dwClk, uint32_t dwMck)
{
uint32_t dwPres, dwMr;
/* Formula for PRESCAL is:
PRESCAL = peripheral clock/ fAFE Clock - 1 */
dwPres = (dwMck) / (dwClk) - 1;
dwMr = AFEC_MR_PRESCAL(dwPres);
if (dwMr == 0) return 0;
dwMr |= (pAFE->AFEC_MR & ~AFEC_MR_PRESCAL_Msk);
pAFE->AFEC_MR = dwMr;
dwAFEClock = dwMck / (dwPres + 1);
return dwAFEClock;
}
/**
* \brief Set AFE timing.
*
* \param pAFE Pointer to an AFE instance.
* \param dwStartup startup value
* \param dwTracking tracking value
* \param dwSettling settling value
*/
extern void AFEC_SetTiming(Afec *pAFE, uint32_t dwStartup, uint32_t dwTracking,
uint32_t dwSettling)
{
uint32_t dwMr;
dwMr = pAFE->AFEC_MR;
dwMr &= (~AFEC_MR_STARTUP_Msk) & (~AFEC_MR_TRACKTIM_Msk) &
(~AFEC_MR_SETTLING_Msk);
/* Formula:
* Startup Time = startup value / AFEClock
* Transfer Time = (TRANSFER * 2 + 3) / AFEClock
* Tracking Time = (TRACKTIM + 1) / AFEClock
* Settling Time = settling value / AFEClock
*/
dwMr |= dwStartup | dwTracking | dwSettling;
pAFE->AFEC_MR |= dwMr;
}
/**
* \brief Set AFE trigger.
*
* \param pAFE Pointer to an AFE instance.
* \param dwTrgSel Trigger selection
*/
extern void AFEC_SetTrigger(Afec *pAFE, uint32_t dwTrgSel)
{
uint32_t dwMr;
dwMr = pAFE->AFEC_MR;
dwMr &= ~AFEC_MR_TRGSEL_Msk;
dwMr |= dwTrgSel;
pAFE->AFEC_MR |= dwMr;
}
/**
* \brief Enable/Disable sleep mode.
*
* \param pAFE Pointer to an AFE instance.
* \param bEnDis Enable/Disable sleep mode.
*/
extern void AFEC_SetSleepMode(Afec *pAFE, uint8_t bEnDis)
{
if (bEnDis)
pAFE->AFEC_MR |= AFEC_MR_SLEEP;
else
pAFE->AFEC_MR &= ~AFEC_MR_SLEEP;
}
/**
* \brief Enable/Disable fast wake up.
*
* \param pAFE Pointer to an AFE instance.
* \param bEnDis Enable/Disable fast wake up in sleep mode.
*/
extern void AFEC_SetFastWakeup(Afec *pAFE, uint8_t bEnDis)
{
if (bEnDis)
pAFE->AFEC_MR |= AFEC_MR_FWUP;
else
pAFE->AFEC_MR &= ~AFEC_MR_FWUP;
}
/**
* \brief Enable/Disable sequence mode.
*
* \param pAFE Pointer to an AFE instance.
* \param bEnDis Enable/Disable sequence mode.
*/
extern void AFEC_SetSequenceMode(Afec *pAFE, uint8_t bEnDis)
{
if (bEnDis) {
/* User Sequence Mode: The sequence respects what is defined in
AFEC_SEQR1 and AFEC_SEQR2 */
pAFE->AFEC_MR |= AFEC_MR_USEQ;
} else {
/* Normal Mode: The controller converts channels in a simple
numeric order. */
pAFE->AFEC_MR &= ~AFEC_MR_USEQ;
}
}
/**
* \brief Set channel sequence.
*
* \param pAFE Pointer to an AFE instance.
* \param dwSEQ1 Sequence 1 ~ 8 channel number.
* \param dwSEQ2 Sequence 9 ~ 16 channel number.
*/
extern void AFEC_SetSequence(Afec *pAFE, uint32_t dwSEQ1, uint32_t dwSEQ2)
{
pAFE->AFEC_SEQ1R = dwSEQ1;
pAFE->AFEC_SEQ2R = dwSEQ2;
}
/**
* \brief Set channel sequence by given channel list.
*
* \param pAFE Pointer to an AFE instance.
* \param ucChList Channel list.
* \param ucNumCh Number of channels in list.
*/
extern void AFEC_SetSequenceByList(Afec *pAFE, uint8_t ucChList[],
uint8_t ucNumCh)
{
uint8_t i;
uint8_t ucShift;
pAFE->AFEC_SEQ1R = 0;
for (i = 0, ucShift = 0; i < 8; i ++, ucShift += 4) {
if (i >= ucNumCh) return;
pAFE->AFEC_SEQ1R |= ucChList[i] << ucShift;
}
pAFE->AFEC_SEQ2R = 0;
for (ucShift = 0; i < 16; i ++, ucShift += 4) {
if (i >= ucNumCh) return;
pAFE->AFEC_SEQ2R |= ucChList[i] << ucShift;
}
}
/**
* \brief Set analog change.
* IF enabled, it allows different analog settings for each channel,
* otherwise, DIFF0, GAIN0 and OFF0 are used for all channels.
*
* \param pAFE Pointer to an AFE instance.
* \param bEnDis Enable/Disable.
*/
extern void AFEC_SetAnalogChange(Afec *pAFE, uint8_t bEnDis)
{
if (bEnDis)
pAFE->AFEC_MR |= AFEC_MR_ONE;
else
pAFE->AFEC_MR &= ~AFEC_MR_ONE;
}
/**
* \brief Set "TAG" mode, show channel number in last data or not.
*
* \param pAFE Pointer to an AFE instance.
* \param bEnDis Enable/Disable TAG value.
*/
extern void AFEC_SetTagEnable(Afec *pAFE, uint8_t bEnDis)
{
if (bEnDis)
pAFE->AFEC_EMR |= AFEC_EMR_TAG;
else
pAFE->AFEC_EMR &= ~AFEC_EMR_TAG;
}
/**
* \brief Set compare channel.
*
* \param pAFE Pointer to an AFE instance.
* \param dwChannel channel number to be set,16 for all channels
*/
extern void AFEC_SetCompareChannel(Afec *pAFE, uint32_t dwChannel)
{
assert(dwChannel <= 16);
if (dwChannel < 16) {
pAFE->AFEC_EMR &= ~(AFEC_EMR_CMPALL);
pAFE->AFEC_EMR &= ~(AFEC_EMR_CMPSEL_Msk);
pAFE->AFEC_EMR |= (dwChannel << AFEC_EMR_CMPSEL_Pos);
} else
pAFE->AFEC_EMR |= AFEC_EMR_CMPALL;
}
/**
* \brief Set compare mode.
*
* \param pAFE Pointer to an AFE instance.
* \param dwMode compare mode
*/
extern void AFEC_SetCompareMode(Afec *pAFE, uint32_t dwMode)
{
pAFE->AFEC_EMR &= ~(AFEC_EMR_CMPMODE_Msk);
pAFE->AFEC_EMR |= (dwMode & AFEC_EMR_CMPMODE_Msk);
}
/**
* \brief Set comparison window.
*
* \param pAFE Pointer to an AFE instance.
* \param dwHi_Lo Comparison Window
*/
extern void AFEC_SetComparisonWindow(Afec *pAFE, uint32_t dwHi_Lo)
{
pAFE->AFEC_CWR = dwHi_Lo;
}
/**
* \brief Return the Channel Converted Data
*
* \param pAFE Pointer to an AFE instance.
* \param dwChannel channel to get converted value
*/
extern uint32_t AFEC_GetConvertedData(Afec *pAFE, uint32_t dwChannel)
{
uint32_t dwData = 0;
assert(dwChannel < 12);
pAFE->AFEC_CSELR = dwChannel;
dwData = pAFE->AFEC_CDR;
return dwData;
}
/**
* Sets the AFE startup time.
* \param pAFE Pointer to an AFE instance.
* \param dwUs Startup time in uS.
*/
void AFEC_SetStartupTime(Afec *pAFE, uint32_t dwUs)
{
uint32_t dwStart;
uint32_t dwMr;
if (dwAFEClock == 0) return;
/* Formula for STARTUP is:
STARTUP = (time x AFECLK) / (1000000) - 1
Division multiplied by 10 for higher precision */
dwStart = (dwUs * dwAFEClock) / (100000);
if (dwStart % 10) dwStart /= 10;
else {
dwStart /= 10;
if (dwStart) dwStart --;
}
if (dwStart > 896) dwMr = AFEC_MR_STARTUP_SUT960;
else if (dwStart > 832) dwMr = AFEC_MR_STARTUP_SUT896;
else if (dwStart > 768) dwMr = AFEC_MR_STARTUP_SUT832;
else if (dwStart > 704) dwMr = AFEC_MR_STARTUP_SUT768;
else if (dwStart > 640) dwMr = AFEC_MR_STARTUP_SUT704;
else if (dwStart > 576) dwMr = AFEC_MR_STARTUP_SUT640;
else if (dwStart > 512) dwMr = AFEC_MR_STARTUP_SUT576;
else if (dwStart > 112) dwMr = AFEC_MR_STARTUP_SUT512;
else if (dwStart > 96) dwMr = AFEC_MR_STARTUP_SUT112;
else if (dwStart > 80) dwMr = AFEC_MR_STARTUP_SUT96;
else if (dwStart > 64) dwMr = AFEC_MR_STARTUP_SUT80;
else if (dwStart > 24) dwMr = AFEC_MR_STARTUP_SUT64;
else if (dwStart > 16) dwMr = AFEC_MR_STARTUP_SUT24;
else if (dwStart > 8) dwMr = AFEC_MR_STARTUP_SUT16;
else if (dwStart > 0) dwMr = AFEC_MR_STARTUP_SUT8;
else dwMr = AFEC_MR_STARTUP_SUT0;
dwMr |= pAFE->AFEC_MR & ~AFEC_MR_STARTUP_Msk;
pAFE->AFEC_MR = dwMr;
}
/**
* Set AFE tracking time
* \param pAFE Pointer to an AFE instance.
* \param dwNs Tracking time in nS.
*/
void AFEC_SetTrackingTime(Afec *pAFE, uint32_t dwNs)
{
uint32_t dwShtim;
uint32_t dwMr;
if (dwAFEClock == 0) return;
/* Formula for SHTIM is:
SHTIM = (time x AFECLK) / (1000000000) - 1
Since 1 billion is close to the maximum value for an integer, we first
divide AFECLK by 1000 to avoid an overflow */
dwShtim = (dwNs * (dwAFEClock / 1000)) / 100000;
if (dwShtim % 10) dwShtim /= 10;
else {
dwShtim /= 10;
if (dwShtim) dwShtim --;
}
dwMr = AFEC_MR_TRACKTIM(dwShtim);
dwMr |= pAFE->AFEC_MR & ~AFEC_MR_TRACKTIM_Msk;
pAFE->AFEC_MR = dwMr;
}
/**
* \brief Set analog offset to be used for channel CSEL.
*
* \param afec Base address of the AFEC.
* \param dwChannel AFEC channel number.
* \param aoffset Analog offset value.
*/
void AFEC_SetAnalogOffset(Afec *pAFE, uint32_t dwChannel, uint32_t aoffset)
{
assert(dwChannel < 12);
pAFE->AFEC_CSELR = dwChannel;
pAFE->AFEC_COCR = (aoffset & AFEC_COCR_AOFF_Msk);;
}
/**
* \brief Set analog offset to be used for channel CSEL.
*
* \param afec Base address of the AFEC.
* \param control Analog control value.
*/
void AFEC_SetAnalogControl(Afec *pAFE, uint32_t control)
{
pAFE->AFEC_ACR = control;
}

View File

@@ -1,238 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \addtogroup dacc_module Working with DACC
* \ingroup peripherals_module
* The DACC driver provides the interface to configure and use the DACC
* peripheral.\n
*
* The DACC(Digital-to-Analog Converter Controller) converts digital code to
* analog output.
* The data to be converted are sent in a common register for all channels.
* It offers up to 2 analog outputs.The output voltage ranges from (1/6)ADVREF
* to (5/6)ADVREF.
*
* To Enable a DACC conversion,the user has to follow these few steps:
* <ul>
* <li> Select an appropriate reference voltage on ADVREF </li>
* <li> Configure the DACC according to its requirements and special needs,
* which could be broken down into several parts:
* -# Enable DACC in free running mode by clearing TRGEN in DACC_MR;
* -# Configure Refresh Period through setting REFRESH fields
* in DACC_MR; The refresh mechanism is used to protect the output analog
* value from
* decreasing.
* -# Enable channels and write digital code to DACC_CDR,in free running mode,
* the conversion is started right after at least one channel is enabled and
* data is written .
</li>
* </ul>
*
* For more accurate information, please look at the DACC section of the
* Datasheet.
*
* Related files :\n
* \ref dac_dma.c\n
* \ref dac_dma.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Digital-to-Analog Converter Controller (DACC).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#include <assert.h>
/* DMA driver instance */
static uint32_t dacDmaTxChannel;
static LinkedListDescriporView1 dmaWriteLinkList[256];
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
/**
* \brief Configure the DMA Channels: 0 RX.
* Channels are disabled after configure.
* \returns 0 if the dma channel configuration successfully; otherwise returns
* DAC_ERROR_XXX.
*/
static uint8_t _DacConfigureDmaChannels(DacDma *pDacd)
{
/* Driver initialize */
XDMAD_FreeChannel(pDacd->pXdmad, dacDmaTxChannel);
/* Allocate a DMA channel for DAC0/1 TX. */
dacDmaTxChannel =
XDMAD_AllocateChannel(pDacd->pXdmad, XDMAD_TRANSFER_MEMORY, ID_DACC);
if (dacDmaTxChannel == XDMAD_ALLOC_FAILED)
return DAC_ERROR;
if (XDMAD_PrepareChannel(pDacd->pXdmad, dacDmaTxChannel))
return DAC_ERROR;
return DAC_OK;
}
/**
* \brief Configure the DMA source and destination with Linker List mode.
*
* \param pBuffer Pointer to dac buffer
* \param size length of buffer
*/
static uint8_t _Dac_configureLinkList(Dacc *pDacHw, void *pXdmad,
DacCmd *pCommand)
{
uint32_t xdmaCndc;
sXdmadCfg xdmadCfg;
uint32_t *pBuffer;
/* Setup TX Link List */
uint8_t i;
pBuffer = (uint32_t *)pCommand->pTxBuff;
for (i = 0; i < pCommand->TxSize; i++) {
dmaWriteLinkList[i].mbr_ubc = XDMA_UBC_NVIEW_NDV1
| XDMA_UBC_NDE_FETCH_EN
| XDMA_UBC_NSEN_UPDATED
| XDMAC_CUBC_UBLEN(4);
dmaWriteLinkList[i].mbr_sa = (uint32_t)pBuffer;
dmaWriteLinkList[i].mbr_da =
(uint32_t) & (pDacHw->DACC_CDR[pCommand->dacChannel]);
if (i == (pCommand->TxSize - 1)) {
if (pCommand->loopback)
dmaWriteLinkList[i].mbr_nda = (uint32_t)&dmaWriteLinkList[0];
else
dmaWriteLinkList[i].mbr_nda = 0;
} else
dmaWriteLinkList[i].mbr_nda = (uint32_t)&dmaWriteLinkList[i + 1];
pBuffer++;
}
xdmadCfg.mbr_cfg = XDMAC_CC_TYPE_PER_TRAN
| XDMAC_CC_MBSIZE_SINGLE
| XDMAC_CC_DSYNC_MEM2PER
| XDMAC_CC_CSIZE_CHK_1
| XDMAC_CC_DWIDTH_WORD
| XDMAC_CC_SIF_AHB_IF1
| XDMAC_CC_DIF_AHB_IF1
| XDMAC_CC_SAM_INCREMENTED_AM
| XDMAC_CC_DAM_FIXED_AM
| XDMAC_CC_PERID(
XDMAIF_Get_ChannelNumber(ID_DACC, XDMAD_TRANSFER_TX));
xdmaCndc = XDMAC_CNDC_NDVIEW_NDV1
| XDMAC_CNDC_NDE_DSCR_FETCH_EN
| XDMAC_CNDC_NDSUP_SRC_PARAMS_UPDATED
| XDMAC_CNDC_NDDUP_DST_PARAMS_UPDATED;
XDMAD_ConfigureTransfer(pXdmad, dacDmaTxChannel, &xdmadCfg, xdmaCndc,
(uint32_t)&dmaWriteLinkList[0], XDMAC_CIE_LIE);
return DAC_OK;
}
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initializes the DacDma structure and the corresponding DAC & DMA .
* hardware select value.
* The driver will uses DMA channel 0 for RX .
* The DMA channels are freed automatically when no DMA command processing.
*
* \param pDacd Pointer to a DacDma instance.
* \param pDacHw Associated Dac peripheral.
* \param DacId Dac peripheral identifier.
* \param pDmad Pointer to a Dmad instance.
*/
uint32_t Dac_ConfigureDma(DacDma *pDacd ,
Dacc *pDacHw ,
uint8_t DacId,
sXdmad *pXdmad)
{
/* Initialize the Dac structure */
pDacd->pDacHw = pDacHw;
pDacd->dacId = DacId;
pDacd->semaphore = 1;
pDacd->pCurrentCommand = 0;
assert(pXdmad == &XDMAD_Instance);
pDacd->pXdmad = pXdmad;
return 0;
}
/**
* \brief Starts a DAC transfer. This is a non blocking function. It will
* return as soon as the transfer is started.
*
* \param pDacd Pointer to a DacDma instance.
* \param pCommand Pointer to the Dac command to execute.
* \returns 0 if the transfer has been started successfully; otherwise returns
* DAC_ERROR_LOCK is the driver is in use, or DAC_ERROR if the command is not
* valid.
*/
uint32_t Dac_SendData(DacDma *pDacd, DacCmd *pCommand)
{
Dacc *pDacHw = pDacd->pDacHw;
/* Try to get the dataflash semaphore */
if (pDacd->semaphore == 0)
return DAC_ERROR_LOCK;
pDacd->semaphore--;
// Initialize the callback
pDacd->pCurrentCommand = pCommand;
/* Initialize DMA controller using channel 0 for RX. */
if (_DacConfigureDmaChannels(pDacd))
return DAC_ERROR_LOCK;
if (_Dac_configureLinkList(pDacHw, pDacd->pXdmad, pCommand))
return DAC_ERROR_LOCK;
SCB_CleanDCache();
/* Start DMA TX */
if (XDMAD_StartTransfer(pDacd->pXdmad, dacDmaTxChannel))
return DAC_ERROR_LOCK;
return DAC_OK;;
}

View File

@@ -1,280 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \addtogroup efc_module Working with EEFC
* \ingroup peripherals_module
*
* The EEFC driver provides the interface to configure and use the EEFC
* peripheral.
*
* The user needs to set the number of wait states depending on the frequency
* used.\n
* Configure number of cycles for flash read/write operations in the FWS field
* of EEFC_FMR.
*
* It offers a function to send flash command to EEFC and waits for the
* flash to be ready.
*
* To send flash command, the user could do in either of following way:
* <ul>
* <li>Write a correct key, command and argument in EEFC_FCR. </li>
* <li>Or, Use IAP (In Application Programming) function which is executed from
* ROM directly, this allows flash programming to be done by code running in
* flash.</li>
* <li>Once the command is achieved, it can be detected even by polling
* EEFC_FSR or interrupt.
* </ul>
*
* The command argument could be a page number,GPNVM number or nothing, it
* depends on the command itself. Some useful functions in this driver could
* help user translate physical flash address into a page number and vice verse.
*
* For more accurate information, please look at the EEFC section of the
* Datasheet.
*
* Related files :\n
* \ref efc.c\n
* \ref efc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Enhanced Embedded Flash Controller (EEFC).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Macro
*----------------------------------------------------------------------------*/
#define EEFC_FCR_FCMD(value) ((EEFC_FCR_FCMD_Msk & ((value) << EEFC_FCR_FCMD_Pos)))
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void EFC_WriteFMR(Efc *efc, uint32_t dwFmr);
#ifdef __ICCARM__
extern __ramfunc void EFC_WriteFMR(Efc *efc, uint32_t dwFmr)
#else
__attribute__ ((section (".ramfunc")))
extern void EFC_WriteFMR(Efc *efc, uint32_t dwFmr)
#endif
{
efc->EEFC_FMR = dwFmr;
}
/**
* \brief Enables the flash ready interrupt source on the EEFC peripheral.
*
* \param efc Pointer to a Efc instance
*/
extern void EFC_EnableFrdyIt(Efc *efc)
{
uint32_t dwFmr;
dwFmr = efc->EEFC_FMR |= EEFC_FMR_FRDY;
EFC_WriteFMR(efc, dwFmr);
}
/**
* \brief Disables the flash ready interrupt source on the EEFC peripheral.
*
* \param efc Pointer to a Efc instance
*/
extern void EFC_DisableFrdyIt(Efc *efc)
{
uint32_t dwFmr;
dwFmr = efc->EEFC_FMR & (~EEFC_FMR_FRDY);
EFC_WriteFMR(efc, dwFmr);
}
/**
* \brief Set read/write wait state on the EEFC peripheral.
*
* \param efc Pointer to a Efc instance
* \param cycles the number of wait states in cycle.
*/
extern void EFC_SetWaitState(Efc *efc, uint8_t ucCycles)
{
uint32_t dwFmr;
dwFmr = efc->EEFC_FMR;
dwFmr &= ~((uint32_t)EEFC_FMR_FWS_Msk);
dwFmr |= EEFC_FMR_FWS(ucCycles);
EFC_WriteFMR(efc, dwFmr);
}
/**
* \brief Returns the current status of the EEFC.
*
* \note Keep in mind that this function clears the value of some status bits
* (LOCKE, PROGE).
*
* \param efc Pointer to a Efc instance
*/
extern uint32_t EFC_GetStatus(Efc *efc)
{
return efc->EEFC_FSR;
}
/**
* \brief Returns the result of the last executed command.
*
* \param efc Pointer to a Efc instance
*/
extern uint32_t EFC_GetResult(Efc *efc)
{
return efc->EEFC_FRR;
}
/**
* \brief Translates the given address page and offset values.
* \note The resulting values are stored in the provided variables if they are
* not null.
*
* \param efc Pointer to a Efc instance
* \param address Address to translate.
* \param pPage First page accessed.
* \param pOffset Byte offset in first page.
*/
extern void EFC_TranslateAddress(Efc **ppEfc, uint32_t dwAddress,
uint16_t *pwPage,
uint16_t *pwOffset)
{
assert(dwAddress >= IFLASH_ADDR);
assert(dwAddress <= (IFLASH_ADDR + IFLASH_SIZE));
/* Store values */
if (ppEfc)
*ppEfc = EFC;
if (pwPage)
*pwPage = (dwAddress - IFLASH_ADDR) / IFLASH_PAGE_SIZE;
if (pwOffset) {
*pwOffset = (dwAddress - IFLASH_ADDR) % IFLASH_PAGE_SIZE;;
}
}
/**
* \brief Computes the address of a flash access given the page and offset.
*
* \param efc Pointer to a Efc instance
* \param page Page number.
* \param offset Byte offset inside page.
* \param pAddress Computed address (optional).
*/
extern void EFC_ComputeAddress(Efc *efc, uint16_t wPage, uint16_t wOffset,
uint32_t *pdwAddress)
{
uint32_t dwAddress;
/* Stop warning */
efc = efc;
assert(efc);
assert(wPage <= IFLASH_NB_OF_PAGES);
assert(wOffset < IFLASH_PAGE_SIZE);
dwAddress = IFLASH_ADDR + wPage * IFLASH_PAGE_SIZE + wOffset;
/* Store result */
if (pdwAddress != NULL)
*pdwAddress = dwAddress;
}
/**
* \brief Performs the given command and wait until its completion (or an error).
*
* \param efc Pointer to a Efc instance
* \param command Command to perform.
* \param argument Optional command argument.
*
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t EFC_PerformCommand(Efc *efc, uint32_t dwCommand,
uint32_t dwArgument, uint32_t dwUseIAP)
{
if (dwUseIAP != 0) {
/* Pointer on IAP function in ROM */
static uint32_t (*IAP_PerformCommand)(uint32_t, uint32_t);
IAP_PerformCommand = (uint32_t (*)(uint32_t, uint32_t))
* ((uint32_t *)CHIP_FLASH_IAP_ADDRESS);
if (efc == EFC) {
IAP_PerformCommand(0, EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FARG(dwArgument)
| EEFC_FCR_FCMD(dwCommand));
}
return (efc->EEFC_FSR & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE | EEFC_FSR_FLERR));
} else {
uint32_t dwStatus;
efc->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FARG(dwArgument)
| EEFC_FCR_FCMD(dwCommand);
do {
dwStatus = efc->EEFC_FSR;
} while ((dwStatus & EEFC_FSR_FRDY) != EEFC_FSR_FRDY);
return (dwStatus & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE | EEFC_FSR_FLERR));
}
}
/**
* \brief Set flash access mode.
*
* \param dwMode - 0:128-bit, (1<<24):64-bit
*/
extern void EFC_SetFlashAccessMode(Efc *efc, uint32_t dwMode)
{
uint32_t dwFmr;
dwFmr = dwMode;
EFC_WriteFMR(efc, dwFmr);
}

View File

@@ -1,214 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/**
* \file
* This file contains the default exception handlers.
*
* \note
* The exception handler has weak aliases.
* As they are weak aliases, any function with the same name will override
* this definition.
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Default NMI interrupt handler.
*/
void NMI_Handler(void)
{
printf("\r\n-E- Enter NMI_Handler!");
while (1);
}
/**
* \brief This function back trace the stack to give exact address where fault
happened
**/
__STATIC_INLINE uint32_t StackUnwind(void)
{
uint32_t Fault_Add;
#if defined (__CC_ARM)
uint32_t temp;
__ASM("mrs temp, msp ");
__ASM{ ldr Fault_Add, [temp, #28]}
#else
__ASM("mrs r0, msp ");
__ASM("ldr %0, [r0,#28]" : "=r" (Fault_Add));
#endif
return Fault_Add;
}
/**
* \brief If Other Faults are enabled then HardFault error will look for those
* errors to give more detail about fault
**/
static void HardFault_reason(void)
{
uint32_t CFSRValue;
TRACE_DEBUG("In Hard Fault Handler\n\r");
TRACE_DEBUG("SCB->HFSR = 0x%08x\n\r", SCB->HFSR);
if ((SCB->HFSR & SCB_HFSR_DEBUGEVT_Msk)) {
TRACE_DEBUG("Debug Event Hard Fault\n\r");
TRACE_DEBUG("SCB->DFSR = 0x%08x\n", SCB->DFSR);
}
if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk)) {
TRACE_DEBUG("Fault was due to vector table read on \
exception processing\n\r");
}
// Forced HardFault
if ((SCB->HFSR & SCB_HFSR_FORCED_Msk)) {
TRACE_DEBUG("Forced Hard Fault\n\r");
TRACE_DEBUG("SCB->CFSR = 0x%08x\n\r", SCB->CFSR);
// Usage Fault
if ((SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk)) {
CFSRValue = SCB->CFSR;
TRACE_DEBUG("Usage fault: ");
CFSRValue >>= SCB_CFSR_USGFAULTSR_Pos;
if ((CFSRValue & (1 << 9)))
TRACE_DEBUG("Divide by zero\n\r");
if ((CFSRValue & (1 << 8)))
TRACE_DEBUG("Unaligned access error\n\r");
if ((CFSRValue & (1 << 3)))
TRACE_DEBUG("Coprocessor access error\n\r");
if ((CFSRValue & (1 << 2)))
TRACE_DEBUG("Integrity check error on EXC_RETURN\n\r");
}
// Bus Fault
if ((SCB->CFSR & SCB_CFSR_BUSFAULTSR_Msk)) {
CFSRValue = SCB->CFSR;
TRACE_DEBUG("Bus fault: ");
CFSRValue >>= SCB_CFSR_BUSFAULTSR_Pos;
if ((CFSRValue & (1 << 7)) && (CFSRValue & (1 << 1))) {
TRACE_DEBUG("Precise data access error. Bus Fault Address \
Register is: %x \n\r", SCB->BFAR);
}
if ((CFSRValue & (1 << 4)))
TRACE_DEBUG("Bus fault has occurred on exception entry\n\r");
if ((CFSRValue & (1 << 3)))
TRACE_DEBUG("bus fault has occurred on exception return\n\r");
if ((CFSRValue & (1 << 2)))
TRACE_DEBUG("Imprecise data access error\n\r");
if ((CFSRValue & (1 << 0))) {
TRACE_DEBUG("This bit indicates a bus fault on an instruction \
pre-fetch. \n\r");
}
}
}
// MemoryFault
if ((SCB->CFSR & SCB_CFSR_MEMFAULTSR_Msk)) {
CFSRValue = SCB->CFSR;
TRACE_DEBUG("Memory fault: ");
CFSRValue >>= SCB_CFSR_MEMFAULTSR_Pos;
if ((CFSRValue & (1 << 9)) != 0)
TRACE_DEBUG("Divide by zero\n\r");
}
__ISB();
__DMB();
__ASM volatile("BKPT #01");
}
/**
* \brief Default HardFault interrupt handler.
*/
void HardFault_Handler(void)
{
printf("\n\rHardFault at address 0X%x\n\r", (int)StackUnwind());
__ISB();
__DMB();
HardFault_reason();
}
#ifndef MPU_EXAMPLE_FEATURE
/**
* \brief Default MemManage interrupt handler.
*/
void MemManage_Handler(void)
{
printf("\n\rMemoryMemFault (MPU fault) at address 0X%x\n\r",
(int)StackUnwind());
__ISB();
__DMB();
__ASM volatile("BKPT #01");
}
#endif
/**
* \brief Default BusFault interrupt handler.
*/
void BusFault_Handler(void)
{
__ASM("nop");
__ASM("nop");
printf("\n\rBus Fault at address 0X%x\n\r", (int)StackUnwind());
__ISB();
__DMB();
__ASM volatile("BKPT #01");
}
/**
* \brief Default UsageFault interrupt handler.
*/
void UsageFault_Handler(void)
{
printf("\r\nUsage fault at address 0X%x", (int)StackUnwind());
__ISB();
__DMB();
__ASM volatile("BKPT #01");
}

View File

@@ -1,595 +0,0 @@
/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2015, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/** \addtogroup flashd_module Flash Memory Interface
* The flash driver manages the programming, erasing, locking and unlocking
* sequences with dedicated commands.
*
* To implement flash programming operation, the user has to follow these few
* steps :
* <ul>
* <li>Configure flash wait states to initializes the flash. </li>
* <li>Checks whether a region to be programmed is locked. </li>
* <li>Unlocks the user region to be programmed if the region have locked
* before.</li>
* <li>Erases the user page before program (optional).</li>
* <li>Writes the user page from the page buffer.</li>
* <li>Locks the region of programmed area if any.</li>
* </ul>
*
* Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable
* data corruption.
* A check of this validity and padding for 32-bit alignment should be done in
* write algorithm.
* Lock/unlock range associated with the user address range is automatically
* translated.
*
* This security bit can be enabled through the command "Set General Purpose
* NVM Bit 0".
*
* A 128-bit factory programmed unique ID could be read to serve several
* purposes.
*
* The driver accesses the flash memory by calling the lowlevel module provided
* in \ref efc_module.
* For more accurate information, please look at the EEFC section of the
* Datasheet.
*
* Related files :\n
* \ref flashd.c\n
* \ref flashd.h.\n
* \ref efc.c\n
* \ref efc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* The flash driver provides the unified interface for flash program operations.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <string.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define GPNVM_NUM_MAX 9
/*----------------------------------------------------------------------------
* Local variables
*----------------------------------------------------------------------------*/
static uint32_t _pdwPageBuffer[IFLASH_PAGE_SIZE / sizeof(uint32_t)];
static uint32_t _dwUseIAP = 1; /* Use IAP interface by default. */
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
/**
* \brief Computes the lock range associated with the given address range.
*
* \param dwStart Start address of lock range.
* \param dwEnd End address of lock range.
* \param pdwActualStart Actual start address of lock range.
* \param pdwActualEnd Actual end address of lock range.
*/
static void ComputeLockRange(uint32_t dwStart, uint32_t dwEnd,
uint32_t *pdwActualStart, uint32_t *pdwActualEnd)
{
Efc *pStartEfc;
Efc *pEndEfc;
uint16_t wStartPage;
uint16_t wEndPage;
uint16_t wNumPagesInRegion;
uint16_t wActualStartPage;
uint16_t wActualEndPage;
/* Convert start and end address in page numbers */
EFC_TranslateAddress(&pStartEfc, dwStart, &wStartPage, 0);
EFC_TranslateAddress(&pEndEfc, dwEnd, &wEndPage, 0);
/* Find out the first page of the first region to lock */
wNumPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE;
wActualStartPage = wStartPage - (wStartPage % wNumPagesInRegion);
wActualEndPage = wEndPage;
if ((wEndPage % wNumPagesInRegion) != 0)
wActualEndPage += wNumPagesInRegion - (wEndPage % wNumPagesInRegion);
/* Store actual page numbers */
EFC_ComputeAddress(pStartEfc, wActualStartPage, 0, pdwActualStart);
EFC_ComputeAddress(pEndEfc, wActualEndPage, 0, pdwActualEnd);
TRACE_DEBUG("Actual lock range is 0x%06X - 0x%06X\n\r",
(unsigned int)*pdwActualStart, (unsigned int)*pdwActualEnd);
}
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initializes the flash driver.
*
* \param dwMCk Master clock frequency in Hz.
* \param dwUseIAP 0: use EEFC controller interface, 1: use IAP interface.
* dwUseIAP should be set to 1 when running out of flash.
*/
extern void FLASHD_Initialize(uint32_t dwMCk, uint32_t dwUseIAP)
{
dwMCk = dwMCk; /* avoid warnings */
EFC_DisableFrdyIt(EFC);
_dwUseIAP = dwUseIAP;
}
/**
* \brief Erases the entire flash.
*
* \param dwAddress Flash start address.
* \return 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_Erase(uint32_t dwAddress)
{
Efc *pEfc;
uint16_t wPage;
uint16_t wOffset;
uint32_t dwError;
assert((dwAddress >= IFLASH_ADDR)
|| (dwAddress <= (IFLASH_ADDR + IFLASH_SIZE)));
/* Translate write address */
EFC_TranslateAddress(&pEfc, dwAddress, &wPage, &wOffset);
dwError = EFC_PerformCommand(pEfc, EFC_FCMD_EA, 0, _dwUseIAP);
return dwError;
}
/**
* \brief Erases flash by sector.
*
* \param dwAddress Start address of be erased sector.
*
* \return 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_EraseSector(uint32_t dwAddress)
{
Efc *pEfc;
uint16_t wPage;
uint16_t wOffset;
uint32_t dwError;
assert((dwAddress >= IFLASH_ADDR)
|| (dwAddress <= (IFLASH_ADDR + IFLASH_SIZE)));
/* Translate write address */
EFC_TranslateAddress(&pEfc, dwAddress, &wPage, &wOffset);
dwError = EFC_PerformCommand(pEfc, EFC_FCMD_ES, wPage, _dwUseIAP);
return dwError;
}
/**
* \brief Erases flash by pages.
*
* \param dwAddress Start address of be erased pages.
* \param dwPageNum Number of pages to be erased with EPA command (4, 8, 16, 32)
*
* \return 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_ErasePages(uint32_t dwAddress, uint32_t dwPageNum)
{
Efc *pEfc;
uint16_t wPage;
uint16_t wOffset;
uint32_t dwError;
static uint32_t dwFarg;
assert((dwAddress >= IFLASH_ADDR)
|| (dwAddress <= (IFLASH_ADDR + IFLASH_SIZE)));
/* Translate write address */
EFC_TranslateAddress(&pEfc, dwAddress, &wPage, &wOffset);
/* Get FARG field for EPA command:
* The first page to be erased is specified in the FARG[15:2] field of
* the MC_FCR register. The first page number must be modulo 4, 8,16 or 32
* according to the number of pages to erase at the same time.
*
* The 2 lowest bits of the FARG field define the number of pages to
* be erased (FARG[1:0]).
*/
if (dwPageNum == 32) {
wPage &= ~(32u - 1u);
dwFarg = (wPage) | 3; /* 32 pages */
} else if (dwPageNum == 16) {
wPage &= ~(16u - 1u);
dwFarg = (wPage) | 2; /* 16 pages */
} else if (dwPageNum == 8) {
wPage &= ~(8u - 1u);
dwFarg = (wPage) | 1; /* 8 pages */
} else {
wPage &= ~(4u - 1u);
dwFarg = (wPage) | 0; /* 4 pages */
}
dwError = EFC_PerformCommand(pEfc, EFC_FCMD_EPA, dwFarg, _dwUseIAP);
return dwError;
}
/**
* \brief Writes a data buffer in the internal flash
*
* \note This function works in polling mode, and thus only returns when the
* data has been effectively written.
* \param address Write address.
* \param pBuffer Data buffer.
* \param size Size of data buffer in bytes.
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t FLASHD_Write(uint32_t dwAddress,
const void *pvBuffer, uint32_t dwSize)
{
Efc *pEfc;
uint16_t page;
uint16_t offset;
uint32_t writeSize;
uint32_t pageAddress;
uint16_t padding;
uint32_t dwError;
uint32_t dwIdx;
uint32_t *pAlignedDestination;
uint8_t *pucPageBuffer = (uint8_t *)_pdwPageBuffer;
assert(pvBuffer);
assert(dwAddress >= IFLASH_ADDR);
assert((dwAddress + dwSize) <= (IFLASH_ADDR + IFLASH_SIZE));
/* Translate write address */
EFC_TranslateAddress(&pEfc, dwAddress, &page, &offset);
/* Write all pages */
while (dwSize > 0) {
/* Copy data in temporary buffer to avoid alignment problems */
writeSize = min((uint32_t)IFLASH_PAGE_SIZE - offset, dwSize);
EFC_ComputeAddress(pEfc, page, 0, &pageAddress);
padding = IFLASH_PAGE_SIZE - offset - writeSize;
/* Pre-buffer data */
memcpy(pucPageBuffer, (void *) pageAddress, offset);
/* Buffer data */
memcpy(pucPageBuffer + offset, pvBuffer, writeSize);
/* Post-buffer data */
memcpy(pucPageBuffer + offset + writeSize,
(void *) (pageAddress + offset + writeSize), padding);
/* Write page
* Writing 8-bit and 16-bit data is not allowed and may
lead to unpredictable data corruption
*/
pAlignedDestination = (uint32_t *)pageAddress;
for (dwIdx = 0; dwIdx < (IFLASH_PAGE_SIZE / sizeof(uint32_t)); ++ dwIdx) {
*pAlignedDestination++ = _pdwPageBuffer[dwIdx];
memory_barrier()
}
/* Cache coherence operation before flash write*/
SCB_CleanDCache_by_Addr((uint32_t *)pageAddress, IFLASH_PAGE_SIZE);
/* Note: It is not possible to use Erase and write Command (EWP) on all Flash
(this command is available on the First 2 Small Sector, 16K Bytes).
For the next block, Erase them first then use Write page command. */
/* Send writing command */
dwError = EFC_PerformCommand(pEfc, EFC_FCMD_WP, page, _dwUseIAP);
if (dwError)
return dwError;
/* Progression */
pvBuffer = (void *)((uint32_t) pvBuffer + writeSize);
dwSize -= writeSize;
page++;
offset = 0;
}
return 0;
}
/**
* \brief Locks all the regions in the given address range. The actual lock
* range is reported through two output parameters.
*
* \param start Start address of lock range.
* \param end End address of lock range.
* \param pActualStart Start address of the actual lock range (optional).
* \param pActualEnd End address of the actual lock range (optional).
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t FLASHD_Lock(uint32_t start, uint32_t end,
uint32_t *pActualStart, uint32_t *pActualEnd)
{
Efc *pEfc;
uint32_t actualStart, actualEnd;
uint16_t startPage, endPage;
uint32_t dwError;
uint16_t numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE;
/* Compute actual lock range and store it */
ComputeLockRange(start, end, &actualStart, &actualEnd);
if (pActualStart != NULL)
*pActualStart = actualStart;
if (pActualEnd != NULL)
*pActualEnd = actualEnd;
/* Compute page numbers */
EFC_TranslateAddress(&pEfc, actualStart, &startPage, 0);
EFC_TranslateAddress(0, actualEnd, &endPage, 0);
/* Lock all pages */
while (startPage < endPage) {
dwError = EFC_PerformCommand(pEfc, EFC_FCMD_SLB, startPage, _dwUseIAP);
if (dwError)
return dwError;
startPage += numPagesInRegion;
}
return 0;
}
/**
* \brief Unlocks all the regions in the given address range. The actual unlock
* range is reported through two output parameters.
* \param start Start address of unlock range.
* \param end End address of unlock range.
* \param pActualStart Start address of the actual unlock range (optional).
* \param pActualEnd End address of the actual unlock range (optional).
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t FLASHD_Unlock(uint32_t start, uint32_t end,
uint32_t *pActualStart, uint32_t *pActualEnd)
{
Efc *pEfc;
uint32_t actualStart, actualEnd;
uint16_t startPage, endPage;
uint32_t dwError;
uint16_t numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE;
/* Compute actual unlock range and store it */
ComputeLockRange(start, end, &actualStart, &actualEnd);
if (pActualStart != NULL)
*pActualStart = actualStart;
if (pActualEnd != NULL)
*pActualEnd = actualEnd;
/* Compute page numbers */
EFC_TranslateAddress(&pEfc, actualStart, &startPage, 0);
EFC_TranslateAddress(0, actualEnd, &endPage, 0);
/* Unlock all pages */
while (startPage < endPage) {
dwError = EFC_PerformCommand(pEfc, EFC_FCMD_CLB, startPage, _dwUseIAP);
if (dwError)
return dwError;
startPage += numPagesInRegion;
}
return 0;
}
/**
* \brief Returns the number of locked regions inside the given address range.
*
* \param start Start address of range
* \param end End address of range.
*/
extern uint32_t FLASHD_IsLocked(uint32_t start, uint32_t end)
{
uint32_t i, j;
Efc *pEfc;
uint16_t startPage, endPage;
uint8_t startRegion, endRegion;
uint32_t numPagesInRegion;
uint32_t status[IFLASH_NB_OF_LOCK_BITS / 32u];
uint32_t numLockedRegions = 0;
assert(end >= start);
assert((start >= IFLASH_ADDR) && (end <= IFLASH_ADDR + IFLASH_SIZE));
/* Compute page numbers */
EFC_TranslateAddress(&pEfc, start, &startPage, 0);
EFC_TranslateAddress(0, end, &endPage, 0);
/* Compute region numbers */
numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE;
startRegion = startPage / numPagesInRegion;
endRegion = endPage / numPagesInRegion;
if ((endPage % numPagesInRegion) != 0)
endRegion++;
/* Retrieve lock status */
EFC_PerformCommand(pEfc, EFC_FCMD_GLB, 0, _dwUseIAP);
for (i = 0; i < (IFLASH_NB_OF_LOCK_BITS / 32u); i++)
status[i] = EFC_GetResult(pEfc);
/* Check status of each involved region */
while (startRegion < endRegion) {
i = startRegion / 32u;
j = startRegion % 32u;
if ((status[i] & (1 << j)) != 0)
numLockedRegions++;
startRegion++;
}
return numLockedRegions;
}
/**
* \brief Check if the given GPNVM bit is set or not.
*
* \param gpnvm GPNVM bit index.
* \returns 1 if the given GPNVM bit is currently set; otherwise returns 0.
*/
extern uint32_t FLASHD_IsGPNVMSet(uint8_t ucGPNVM)
{
uint32_t dwStatus;
assert(ucGPNVM < GPNVM_NUM_MAX);
/* Get GPNVMs status */
EFC_PerformCommand(EFC, EFC_FCMD_GFB, 0, _dwUseIAP);
dwStatus = EFC_GetResult(EFC);
/* Check if GPNVM is set */
if ((dwStatus & (1 << ucGPNVM)) != 0)
return 1;
else
return 0;
}
/**
* \brief Sets the selected GPNVM bit.
*
* \param gpnvm GPNVM bit index.
* \returns 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_SetGPNVM(uint8_t ucGPNVM)
{
assert(ucGPNVM < GPNVM_NUM_MAX);
if (!FLASHD_IsGPNVMSet(ucGPNVM))
return EFC_PerformCommand(EFC, EFC_FCMD_SFB, ucGPNVM, _dwUseIAP);
else
return 0;
}
/**
* \brief Clears the selected GPNVM bit.
*
* \param gpnvm GPNVM bit index.
* \returns 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_ClearGPNVM(uint8_t ucGPNVM)
{
assert(ucGPNVM < GPNVM_NUM_MAX);
if (FLASHD_IsGPNVMSet(ucGPNVM))
return EFC_PerformCommand(EFC, EFC_FCMD_CFB, ucGPNVM, _dwUseIAP);
else
return 0;
}
/**
* \brief Read the unique ID.
*
* \param pdwUniqueID pointer on a 4bytes char containing the unique ID value.
* \returns 0 if successful; otherwise returns an error code.
*/
#ifdef __ICCARM__
extern __ramfunc uint32_t FLASHD_ReadUniqueID(uint32_t *pdwUniqueID)
#else
__attribute__ ((section (".ramfunc")))
uint32_t FLASHD_ReadUniqueID(uint32_t *pdwUniqueID)
#endif
{
uint32_t status;
if (pdwUniqueID == NULL)
return 1;
pdwUniqueID[0] = 0;
pdwUniqueID[1] = 0;
pdwUniqueID[2] = 0;
pdwUniqueID[3] = 0;
/* Send the Start Read unique Identifier command (STUI) by writing the Flash
Command Register with the STUI command.*/
EFC->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EFC_FCMD_STUI;
/* When the Unique Identifier is ready to be read, the FRDY bit in the Flash
Programming Status Register (EEFC_FSR) falls. */
do {
status = EFC->EEFC_FSR;
} while ((status & EEFC_FSR_FRDY) == EEFC_FSR_FRDY);
/* The Unique Identifier is located in the first 128 bits of the Flash
memory mapping. So, at the address 0x400000-0x40000F. */
pdwUniqueID[0] = *(uint32_t *)IFLASH_ADDR;
pdwUniqueID[1] = *(uint32_t *)(IFLASH_ADDR + 4);
pdwUniqueID[2] = *(uint32_t *)(IFLASH_ADDR + 8);
pdwUniqueID[3] = *(uint32_t *)(IFLASH_ADDR + 12);
/* To stop the Unique Identifier mode, the user needs to send the Stop Read
unique Identifier command (SPUI) by writing the Flash Command Register
with the SPUI command. */
EFC->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EFC_FCMD_SPUI;
/* When the Stop read Unique Unique Identifier command (SPUI) has been
performed, the FRDY bit in the Flash Programming Status Register (EEFC_FSR)
rises. */
do {
status = EFC->EEFC_FSR;
} while ((status & EEFC_FSR_FRDY) != EEFC_FSR_FRDY);
return 0;
}

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