arm/raspberrypi: ensure that RTEMS application image can be started by U-boot.

The current versions of U-boot start kernel/RTEMS application image
with instruction and data caches enabled and it sets exception
base register to new address after its self-relocation.

        ldr     r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
        mcr     p15, 0, r0, c12, c0, 0  /* Set VBAR */

Included changes in bsp_start_hook_0 restore default state to
allow RTEMS image to run after startup from newer U-boot version
on Raspberry Pi.

Clear interrupt enable registers in interrupt controller
to ensure that RTEMS starts from well defined state.

Updates #2783
This commit is contained in:
Pavel Pisa
2016-05-19 10:24:46 +02:00
committed by Pavel Pisa
parent be5cf032c5
commit c6e0201443
2 changed files with 39 additions and 1 deletions

View File

@@ -120,5 +120,9 @@ void bsp_interrupt_handler_default(rtems_vector_number vector)
rtems_status_code bsp_interrupt_facility_initialize(void)
{
raspberrypi_set_exception_handler(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt);
BCM2835_REG(BCM2835_IRQ_DISABLE1) = 0xffffffff;
BCM2835_REG(BCM2835_IRQ_DISABLE2) = 0xffffffff;
BCM2835_REG(BCM2835_IRQ_DISABLE_BASIC) = 0xffffffff;
BCM2835_REG(BCM2835_IRQ_FIQ_CTRL) = 0;
return RTEMS_SUCCESSFUL;
}

View File

@@ -26,11 +26,45 @@
#include <bsp/start.h>
#include <bsp/raspberrypi.h>
#include <bsp/mm.h>
#include <libcpu/arm-cp15.h>
void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
{
}
uint32_t sctlr_val;
sctlr_val = arm_cp15_get_control();
/*
* Current U-boot loader seems to start kernel image
* with I and D caches on and MMU enabled.
* If RTEMS application image finds that cache is on
* during startup then disable caches.
*/
if (sctlr_val & (ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
if (sctlr_val & (ARM_CP15_CTRL_C | ARM_CP15_CTRL_M)) {
/*
* If the data cache is on then ensure that it is clean
* before switching off to be extra carefull.
*/
arm_cp15_drain_write_buffer();
arm_cp15_data_cache_clean_and_invalidate();
}
arm_cp15_flush_prefetch_buffer();
sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
arm_cp15_set_control(sctlr_val);
arm_cp15_tlb_invalidate();
arm_cp15_flush_prefetch_buffer();
arm_cp15_data_cache_invalidate();
arm_cp15_instruction_cache_invalidate();
}
/* Clear Translation Table Base Control Register */
arm_cp15_set_translation_table_base_control_register(0);
/* Clear Secure or Non-secure Vector Base Address Register */
arm_cp15_set_vector_base_address(0);
}
void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
{