The LEON3_MP_IRQ define is used to pick the IRQ to be used by the
shared memory driver and for inter-processor interrupts. On some LEON3
systems, for example the GR712RC, the default value of 14 is not suitable.
To make this value configurable from the application, it is replaced with
a weakly linked variable that can be overridden from the application.
Since or1k architecture stack grows down, threads should be initialized
with high stack addresses instead of lower ones. This is done in
_CPU_Context_Initialize function.
Converting 64-bit nanoseconds values into the common struct timeval or
struct timespec formats requires a 64-bit division to get the seconds
value. Performance analysis of high network loads revealed that this is
too costly on PowerPC.
Converting 64-bit nanoseconds values into the common struct timeval or
struct timespec formats requires a 64-bit division to get the seconds
value. Performance analysis of high network loads revealed that this is
too costly on PowerPC.
Rename rtems_stdio_redirect_t to rtems_stdio_redirect since the
namespace *_t is reserved by POSIX, see also The Open Group Base
Specifications Issue 6 IEEE Std 1003.1, 2004 Edition, 2.2.2 The Name
Space.
crt.h defines such lovely constants as "RED" and "GREEN" which
have a nasty habit of conflicting with non-BSP code. There is
no reason to include this private .h from bsp.h and pollute the
namespace for applications.
This change starts with removing the effectively empty file
timerdrv.h. The prototypes for benchmark_timer_XXX() were in
btimer.h which was not universally used. Thus every use of
timerdrv.h had to be changed to btimer.h. Then the prototypes
for benchmark_timer_read() had to be adjusted to return
benchmark_timer_t rather than int or uint32_t.
I took this opportunity to also correct the file headers to
separate the copyright from the file description comments which
is needed to ensure the copyright isn't propagated into Doxygen
output.
Implement new cache functions for or1k and create new bspstart function
for or1ksim to initialize instruction and data caches. Also, sim.cfg
is modified to enable/confiure cache units.
Modify README to provide instruction on how to run or1ksim BSP on
latest or1ksim emulator built from github repo and add commands
to run or1ksim BSP on QEMU.
This patch avoids unexpected behavior when initializing tick timer registers.
Initializing these registers fires unexpected exceptions and interrupts even
though RTEMS has not enabled interrupts yet. So, a little long interval added
to allow RTEMS to finish the remaining initialization work before running the
application. The tick timer interval is adjusted to reflect an accurate
timing for RTEMS applications.
This patch allocate a space in the stack to account for red-zone
that gcc may utilize for the use of leaf functions. Care must be
taken to handle this red-zone from many places:
1- Upon creation of a new thread stack.
2- Once an interrupt entred.
Also moving the enable-thread-dispach() and increment ISR level before
checking if dispatch needed was required.
The previous modifications solved the printf bug which disabled ticker
to output strings after context switches that arise from Thread_Delay_ended.
Do not use sprintf() in thread dispatch critical sections to avoid
corruption of profiling samples. Update test to reflect thread the life
cycle changes.
This module makes it easy to redirect and capture stdout, stderr or any
other fd in your application.
The captured data can be sent off board, for example using syslog,
or buffered and displayed in a web page.
The ping code is taken from a recent FreeBSD release. Some options have been
tested, other not tested or do not work. This could be due to the age of
our TCP/IP stack.
This version of ping will not work if more than 64 file descriptors are
open at once because the select FD size is 64 as set in newlib.
Without the source the error code does not say that much.
Let it be up to the CPU/BSP to determine the error code
reported on fatal shutdown.
This patch does not change the current behaviour, just
adds the option to handle the source of the fatal halt.
Do not invalidate the entire L2 cache since it is a uniform cache in
_CPU_cache_invalidate_entire_instruction(). For consitency do not touch
the L2 cache even for the range function
_CPU_cache_invalidate_instruction_range().
