forked from Imagelibrary/rtems
Let CPU/BSP Fatal handler have access to source
Without the source the error code does not say that much. Let it be up to the CPU/BSP to determine the error code reported on fatal shutdown. This patch does not change the current behaviour, just adds the option to handle the source of the fatal halt.
This commit is contained in:
committed by
Sebastian Huber
parent
12ab8d67e4
commit
f82752a474
@@ -455,7 +455,7 @@ void _CPU_Context_Initialize(
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*(*(_destination)) = _CPU_Null_fp_context; \
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} while (0)
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#define _CPU_Fatal_halt( _err ) \
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#define _CPU_Fatal_halt( _source, _err ) \
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do { \
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uint32_t _level; \
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uint32_t _error = _err; \
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@@ -814,7 +814,7 @@ uint32_t _CPU_ISR_Get_level( void );
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ \
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}
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@@ -912,7 +912,7 @@ void _CPU_Context_Initialize(
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ \
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__asm__ volatile ( "cli R1; \
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R1 = %0; \
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@@ -847,8 +847,8 @@ uint32_t _CPU_ISR_Get_level( void );
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* XXX
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*/
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#define _CPU_Fatal_halt( _error ) \
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printk("Fatal Error %d Halted\n",_error); \
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#define _CPU_Fatal_halt( _source, _error ) \
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printk("Fatal Error %d.%d Halted\n",_source, _error); \
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for(;;)
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@@ -525,7 +525,7 @@ uint32_t _CPU_ISR_Get_level( void );
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* + disable interrupts and halt the CPU
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ \
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uint32_t _error_lvalue = ( _error ); \
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__asm__ volatile ( "cli ; \
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@@ -915,7 +915,7 @@ extern char _gp[];
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ \
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}
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@@ -906,7 +906,7 @@ void _CPU_Context_Restart_self(
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ \
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}
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@@ -924,7 +924,7 @@ void _CPU_Context_Restart_self(
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ \
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}
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@@ -479,7 +479,7 @@ void *_CPU_Thread_Idle_body( uintptr_t ignored );
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*/
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#if ( defined(__mcoldfire__) )
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ __asm__ volatile( "move.w %%sr,%%d0\n\t" \
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"or.l %2,%%d0\n\t" \
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"move.w %%d0,%%sr\n\t" \
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@@ -491,7 +491,7 @@ void *_CPU_Thread_Idle_body( uintptr_t ignored );
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: "d0", "d1" ); \
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}
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#else
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ __asm__ volatile( "movl %0,%%d0; " \
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"orw #0x0700,%%sr; " \
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"stop #0x2700" : "=d" ((_error)) : "0" ((_error)) ); \
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@@ -913,7 +913,7 @@ void _CPU_Context_Initialize(
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* halts/stops the CPU.
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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do { \
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unsigned int _level; \
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_CPU_ISR_Disable(_level); \
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@@ -733,8 +733,8 @@ uint32_t _CPU_ISR_Get_level( void );
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*
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* XXX
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*/
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#define _CPU_Fatal_halt( _error ) \
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printk("Fatal Error %d Halted\n",_error); \
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#define _CPU_Fatal_halt( _source, _error ) \
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printk("Fatal Error %d.%d Halted\n",_source,_error); \
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for(;;)
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/* end of Fatal Error manager macros */
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@@ -14,7 +14,7 @@
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#include <rtems/score/cpu.h>
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#include <rtems/score/nios2-utility.h>
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void _CPU_Fatal_halt( uint32_t _error )
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void _CPU_Fatal_halt( uint32_t _source, uint32_t _error )
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{
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/* write 0 to status register (disable interrupts) */
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__builtin_wrctl( NIOS2_CTLREG_INDEX_STATUS, 0 );
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@@ -133,5 +133,5 @@ void __ISR_Handler(void)
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void __Exception_Handler(CPU_Exception_frame *efr)
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{
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_CPU_Fatal_halt(0xECC0);
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_CPU_Fatal_halt(RTEMS_FATAL_SOURCE_EXCEPTION, 0xECC0); /* source ignored */
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}
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@@ -310,7 +310,8 @@ void _CPU_Context_Initialize(
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#define _CPU_Context_Restart_self( _the_context ) \
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_CPU_Context_restore( (_the_context) );
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void _CPU_Fatal_halt( uint32_t _error ) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
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void _CPU_Fatal_halt( uint32_t _source, uint32_t _error )
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RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
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/**
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* @brief CPU initialization.
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@@ -1071,7 +1071,7 @@ uint32_t _CPU_ISR_Get_level( void );
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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{ \
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}
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@@ -677,7 +677,7 @@ void _BSP_Fatal_error(unsigned int);
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#endif /* ASM */
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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_BSP_Fatal_error(_error)
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/* end of Fatal Error manager macros */
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@@ -675,9 +675,9 @@ SCORE_EXTERN void _CPU_Context_Initialize(
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#ifdef BSP_FATAL_HALT
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/* we manage the fatal error in the board support package */
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void bsp_fatal_halt( uint32_t _error);
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#define _CPU_Fatal_halt( _error ) bsp_fatal_halt( _error)
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#define _CPU_Fatal_halt( _source, _error ) bsp_fatal_halt( _error)
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#else
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#define _CPU_Fatal_halt( _error)\
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#define _CPU_Fatal_halt( _source, _error)\
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{ \
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__asm__ volatile("mov.l %0,r0"::"m" (_error)); \
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__asm__ volatile("mov #1, r4"); \
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@@ -1080,7 +1080,7 @@ void _CPU_Context_Initialize(
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* location or a register, optionally disables interrupts, and
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* halts/stops the CPU.
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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do { \
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uint32_t level; \
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\
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@@ -905,7 +905,7 @@ void _CPU_Context_Initialize(
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* halts/stops the CPU.
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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do { \
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uint32_t level; \
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\
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@@ -871,7 +871,7 @@ void _CPU_Context_Initialize(
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*
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* Move the error code into r10, disable interrupts and halt.
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*/
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#define _CPU_Fatal_halt( _error ) \
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#define _CPU_Fatal_halt( _source, _error ) \
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do { \
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__asm__ __volatile__ ( "di" ); \
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__asm__ __volatile__ ( "mov %0, r10; " : "=r" ((_error)) ); \
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@@ -49,7 +49,7 @@ void _Terminate(
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_System_state_Set( SYSTEM_STATE_TERMINATED );
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_CPU_Fatal_halt( the_error );
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_CPU_Fatal_halt( the_source, the_error );
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/* will not return from this routine */
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while (true);
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