Implement new cache functions for or1k and create new bspstart function
for or1ksim to initialize instruction and data caches. Also, sim.cfg
is modified to enable/confiure cache units.
Modify README to provide instruction on how to run or1ksim BSP on
latest or1ksim emulator built from github repo and add commands
to run or1ksim BSP on QEMU.
This patch avoids unexpected behavior when initializing tick timer registers.
Initializing these registers fires unexpected exceptions and interrupts even
though RTEMS has not enabled interrupts yet. So, a little long interval added
to allow RTEMS to finish the remaining initialization work before running the
application. The tick timer interval is adjusted to reflect an accurate
timing for RTEMS applications.
This patch allocate a space in the stack to account for red-zone
that gcc may utilize for the use of leaf functions. Care must be
taken to handle this red-zone from many places:
1- Upon creation of a new thread stack.
2- Once an interrupt entred.
Also moving the enable-thread-dispach() and increment ISR level before
checking if dispatch needed was required.
The previous modifications solved the printf bug which disabled ticker
to output strings after context switches that arise from Thread_Delay_ended.
Do not use sprintf() in thread dispatch critical sections to avoid
corruption of profiling samples. Update test to reflect thread the life
cycle changes.
This module makes it easy to redirect and capture stdout, stderr or any
other fd in your application.
The captured data can be sent off board, for example using syslog,
or buffered and displayed in a web page.
The ping code is taken from a recent FreeBSD release. Some options have been
tested, other not tested or do not work. This could be due to the age of
our TCP/IP stack.
This version of ping will not work if more than 64 file descriptors are
open at once because the select FD size is 64 as set in newlib.
Without the source the error code does not say that much.
Let it be up to the CPU/BSP to determine the error code
reported on fatal shutdown.
This patch does not change the current behaviour, just
adds the option to handle the source of the fatal halt.
Do not invalidate the entire L2 cache since it is a uniform cache in
_CPU_cache_invalidate_entire_instruction(). For consitency do not touch
the L2 cache even for the range function
_CPU_cache_invalidate_instruction_range().
This avoids test durations of more than one hour on fast targets, since
fast targets can count a lot during one clock tick period, so the minor
loop iteration count was quite high. Estimate now the test body
duration to iterate only through the interesting time window.
Add and use interrupt_critical_section_test().
This implementation is able to catch cast to type
which differs not only in qualifiers. The error
diagnostic message when used in function is self
descriptive. Macro is compatible with used in initializers
but there message about not constant initial value
signals types incompatibility.
The actual implementation does not distinguish between
volatile and const removal.
