Commit Graph

134 Commits

Author SHA1 Message Date
Sebastian Huber
ba89aae89d bsps/arm: BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENT
Add the BSP option BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENT to
optionally define an alignment of the vector address table begin.
2023-12-06 13:35:37 +01:00
Christian Mauderer
a38f9c57f9 bsps/imx*: imx_gpio from pointer to fdt property
Device trees allow mixing different kinds of GPIOs in one property. For
that it is usefull to only provide a pointer to an arbitrary location in
the property and initialize a GPIO from that.
2023-11-28 13:36:41 +01:00
Sebastian Huber
ffec9f96fc arm: Fix cache support for ARM926EJ-S
The ARM926EJ-S is an ARMv5T architecture processor and lacks some
features of ARMv6 processors such as the ARM1176JZF-S.

Close #4940.
2023-08-10 08:34:34 +02:00
Christian Mauderer
5bfcad2641 bsps/imx*: Support more GPIO controllers
The imx-gpio driver used in i.MX and i.MXRT BSPs generates a name based
on a fixed string. The original code only used one digit for the
controller. With the 13 GPIO controllers of the i.MXRT1166, that isn't
enough any more. This patch extends the name to two digits which should
be enough for the next controller generations.
2023-07-24 14:40:49 +02:00
Sebastian Huber
bc31fb65d2 arm/xilinx-zynq: Do not provide legacy API
The header file <rtems/irq.h> provides a legacy API.  Do not provide it
by default through <bsp/irq.h>.
2023-05-26 06:56:11 +02:00
Sebastian Huber
da2b49e7b7 bsps/arm: Use interrupt entry for IPI
Avoid a dynamic memory allocation for the inter-processor interrupt.
2023-05-26 06:56:11 +02:00
Sebastian Huber
eff408b64f bsps/arm: Use interrupt entry for clock driver
Avoid a dynamic memory allocation for the clock driver interrupt.
2023-05-26 06:56:11 +02:00
Sebastian Huber
ebe4224dce bsps/arm: Improve Doxygen groups 2023-05-26 06:56:11 +02:00
Sebastian Huber
f69326d0c2 bsps: Improve Doxygen file comments 2023-05-26 06:56:11 +02:00
Christian Mauderer
6f034c18e8 imx_iomux: Don't set reserved bits in PAD_CTL
On most i.MX* the upper bits in SW_PAD_CTL are reserved. On some chips,
like the i.MXRT1166, they are a domain write protection. Setting them to
1 can have unexpected side effects.

The device tree uses these bits for some flags. Make sure that they are
not accidentally written to some value.
2023-05-22 09:45:42 +02:00
Sebastian Huber
bcef89f236 Update company name
The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.
2023-05-20 11:05:26 +02:00
Sebastian Huber
a60b816fa7 bsps/arm: Fix wording 2023-03-17 07:25:34 +01:00
Sebastian Huber
bb465c8548 doxygen: Add Doxygen files to a group
Update #3707.
2023-02-16 08:27:09 +01:00
Dariusz Sabala
1eae6f24fe bsps/arm: fix Cortex-M7 systick reload value
- see ARM DUI 0646C Arm Cortex-M7 Devices Generic User Guide
  "The RELOAD value is calculated according to its use.
  For example, to generate a multi-shot timer with a period
  of N processor clock cycles, use a RELOAD value of N-1.
  If the SysTick interrupt is required every 100 clock pulses,
  set RELOAD to 99."
- see routines used in CMSIS project for reference

Close #4746.
2022-10-26 11:47:22 +02:00
Sebastian Huber
f6e7c62705 bsps/arm: Mark functions in start.S
Add the function type to _start() and bsp_start_hook_0_done() so that
the linker can generate ARM/Thumb interworking code.

Update #4202.
2022-09-22 08:05:06 +02:00
Sebastian Huber
80be0de40e bsps/arm: Add comment about banked FIQ registers 2022-09-22 07:59:04 +02:00
Sebastian Huber
21a36ed19b bsps: Fix .data.rel.ro placement
The .data.rel.ro* linker input section pattern accidentally matches with
writeable data those symbol name starts with "ro".

Close #4701.
2022-08-12 10:10:17 +02:00
Sebastian Huber
5ed0035377 bsps: Sort .noinit* sections
Sort the .noinit* input sections by name first, then by alignment if two
sections have the same name.  This allows the placement of begin/end symbols to
initialize some areas with a special value.

Update #4678.
2022-07-15 10:46:02 +02:00
Joel Sherrill
8ca4b5c8bb bsps/arm/shared: Change license to BSD-2
Updates #3053.
2022-07-08 08:42:42 -05:00
Chris Johns
cb52e37464 bsps/arm: MP core timer setting off by one 2022-06-15 13:15:15 +10:00
Karel Gardas
635cd68aa7 bsp/arm: allocate .rtemsstack on REGION_STACK instead of on REGION_WORK
REGION_WORK may be backed by external RAM which may not be initialized
in a time we need stack to work well. E.g. code loaded in flash,
stack allocated on in-cpu SRAM and data (REGION_WORK) on external SDRAM.

Sponsored-By:	Precidata
2022-05-23 08:36:41 +02:00
Sebastian Huber
e7a2470d06 bsps/arm: Fix bsp_start_memcpy() for ARMv7-AR
Synchronize data and instruction streams.
2022-03-14 09:23:54 +01:00
Joel Sherrill
ba619b7f36 bsps/arm/: Scripted embedded brains header file clean up
Updates #4625.
2022-03-10 08:43:50 +01:00
Sebastian Huber
db8f598d56 build: Remove old build system
Close #3250.
Close #4081.
2021-09-21 07:39:09 +02:00
Sebastian Huber
59472042ec bsps/arm: More robust SMP start
Do not continue execution on processors which are not configured to prevent the
use of arbitrary memory for the initialization stack.
2021-08-12 10:04:11 +02:00
Sebastian Huber
c7b4eca7fa bsps/irq: bsp_interrupt_facility_initialize()
Do not return a status code in bsp_interrupt_facility_initialize() since this
leads to unreachable code in bsp_interrupt_initialize().  Use RTEMS_DEBUG
assertions in bsp_interrupt_facility_initialize() if necessary.
2021-07-27 10:03:19 +02:00
Sebastian Huber
32f5a195d7 bsps/irq: bsp_interrupt_vector_disable()
Return a status code for bsp_interrupt_vector_disable().

Update #3269.
2021-07-26 19:57:31 +02:00
Sebastian Huber
bc86a5fa84 bsps/irq: bsp_interrupt_vector_enable()
Return a status code for bsp_interrupt_vector_enable().

Update #3269.
2021-07-26 19:57:30 +02:00
Sebastian Huber
deb5afb2f2 bsps/irq: Add rtems_interrupt_is_pending()
Add a default implementation which just returns RTEMS_UNSATISFIED.

Update #3269.
2021-07-26 17:08:42 +02:00
Sebastian Huber
eebecd09fa bsps/irq: Add rtems_interrupt_get_attributes()
Add a default implementation which clears the attributes to zero and
just returns RTEMS_SUCCESSFUL for valid parameters.

Update #3269.
2021-07-26 17:08:42 +02:00
Sebastian Huber
9832652c53 bsps/irq: Add rtems_interrupt_raise()
Add rtems_interrupt_raise_on() and rtems_interrupt_clear().

Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.

Update #3269.
2021-07-26 07:54:25 +02:00
Sebastian Huber
781213f9ec bsps/irq: Add rtems_interrupt_vector_is_enabled()
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.

Update #3269.
2021-07-26 07:54:25 +02:00
Sebastian Huber
a398909dc2 bsps/arm: Fix SMP start
Skip the data cache initialization if we are a secondary processor.

The bug was introduced by e164df5e33 and
did not show up in tests using Qemu since the data cache behaviour is
not emulated.
2021-07-09 10:43:10 +02:00
Pranav Dangi
8b0e333487 bsps/arm: Add start up support for ARMv6 RPi Models 2021-07-07 20:09:47 +02:00
Sebastian Huber
3fee662093 bsps/irq: Use BSP_INTERRUPT_VECTOR_COUNT
Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX.

Update #3269.
2021-06-24 11:36:25 +02:00
Sebastian Huber
af73b7b64b bsps/irq: Remove BSP_INTERRUPT_VECTOR_MIN
Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector
numbers start with zero.

The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit
and building all BSPs.

Update #3269.
2021-06-24 11:35:49 +02:00
Sebastian Huber
e10dec0fe7 bsps: Support RTEMS_NOINIT in linkcmds
Update #3866.
2021-05-02 18:41:21 +02:00
Sebastian Huber
2a24f99d11 bsps/arm: Set MSP in ARMv7-M start code
Set the Main Stack Pointer (MSP) to the ISR stack area end just in case
we run using the Process Stack Pointer (PSP).  This helps if
applications are started by a boot loader.
2021-04-21 07:04:53 +02:00
Vijay Kumar Banerjee
c90fa83041 bsps: Remove networking drivers
Update #3850
2021-04-07 16:15:38 -06:00
Sebastian Huber
9eb9813dc1 bsps: Add missing DWARF 5 sections
Sort alphabetically.
2021-01-26 15:29:36 +01:00
Sebastian Huber
33c12d5f92 bsps: Support DWARF 5 sections
GCC 11 uses DWARF 5 by default.
2021-01-25 12:56:00 +01:00
Sebastian Huber
9f3a08ef2d bsps: Use header file for GIC architecture support
This avoids a function call overhead in the interrupt dispatching.

Update #4202.
2020-12-23 09:24:49 +01:00
Sebastian Huber
23d9223ad3 bsps/arm: Invalidate TLB in start.S
Update #4202.
2020-12-23 09:24:47 +01:00
Sebastian Huber
e164df5e33 bsps/arm: Clear SCTLR[M, I, A, C] in start.S
Initialize the data and unified cache levels.  Invalidate the
instruction cache levels.

Update #4202.
2020-12-23 09:19:28 +01:00
Sebastian Huber
b32fd22732 bsps/arm: Add arm-data-cache-loop-set-way.h
This makes it possible to reuse this loop.

Update #4202.
2020-12-23 09:19:28 +01:00
Sebastian Huber
46a3c0446f bsps/arm: Remove optional start hook arguments
The start hook arguments are not used by a BSP.  Removing them avoids
the need for a stack during the very early system initialization.

Update #4202.
2020-12-23 09:19:28 +01:00
Sebastian Huber
76a1a53780 bsps/arm: Invalidate branch predictors earlier
Make sure the branch predictors are invalidated before the first branch
is executed.

Update #4202.
2020-12-23 09:19:28 +01:00
Sebastian Huber
272534eb72 bsps/arm: Set VBAR in start.S
Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.

Set the VBAR to the normal vector table in start.S for the main
processor.  Secondary processors set it in bsp_start_hook_0().

Update #4202.
2020-12-23 09:19:17 +01:00
Sebastian Huber
b5aceef5d9 bsps: Remove gicvx_interrupt_dispatch()
Avoid one level of indirection.

Update #4202.
2020-12-16 11:00:03 +01:00
Christian Mauderer
9b3def237a bsps/arm/imx*: Fix location of shared headers
When moving the headers from the imx BSP to the shared area, the wrong
directory has been selected. This patch fixes that problem.

Update #4180
2020-12-14 11:29:36 +01:00