Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.
Set the VBAR to the normal vector table in start.S for the main
processor. Secondary processors set it in bsp_start_hook_0().
Update #4202.
Somehow the table index has been missing in the latest patch version.
With that, the configuration for the first region has been applied
multiple times.
Update #4180
This adds some commands that are usefull for debugging simple serial
interfaces.
Even if they are a complete re-implementation, the i2c* commands use a
simmilar call like the Linux i2c tools.
Expressions in static assertions must be integral constant expressions. In
integral constant expressions the use of address constant expressions is not
allowed.
In static initializers the address constant expressions are allowed. Introduce
a new macro _CONFIGURE_ASSERT_NOT_NULL() which leads to a compile time error if
the second parameter is NULL. It generates error messages like this if for
example
#define CONFIGURE_INIT_TASK_ENTRY_POINT NULL
is provided by the application:
cpukit/include/rtems/confdefs/inittask.h:51:26: error: size of unnamed array is negative
51 | ( _type ) sizeof( int[ ( _value ) != NULL ? 1 : -1 ] ) )
| ^
cpukit/include/rtems/confdefs/inittask.h:170:3: note: in expansion of macro '_CONFIGURE_ASSERT_NOT_NULL'
170 | _CONFIGURE_ASSERT_NOT_NULL(
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
This fix relates to CID 1470570 (PARSE_ERROR).
Update #4181.
The arm_cp15 function for accessing the current CPU index is specific
to ARMv7 while this header is used for ARMv8 as well. Instead, use a
generic accessor that is part of the standard CPU API.
Use the targets parameter to determine the targets of the SGI. Change
targets parameter type to 32-bit to ease the parameter passing. GICv3
supports up to 16 targets.
Update #4202.
Currently, zynq-uart code is always built and has some requirements for
BSPs that use it. Instead of making all BSPs satisfy that requirement or
working around it by setting defaults, this moves the zynq-uart code
into its own spec build object so it can be included if needed.
This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC
(ZynqMP) family of chips. It is configured to be usable on the Qemu
ZCU102 machine definition and should be almost trivially portable to
ZynqMP development boards and custom hardware. It is also configured to
be usable with libbsd.
