Commit Graph

161 Commits

Author SHA1 Message Date
Jiri Gaisler
d3d4e77c42 riscv: add griscv bsp
Update #3678.
2019-01-22 12:50:09 +01:00
Sebastian Huber
9aee88aa54 bsp/riscv: Clear boot command line 2019-01-08 14:44:08 +01:00
Sebastian Huber
ff081aee72 score: Rename interrupt stack symbols
Rename

  * _Configuration_Interrupt_stack_area_begin in _ISR_Stack_area_begin,
  * _Configuration_Interrupt_stack_area_end in _ISR_Stack_area_end, and
  * _Configuration_Interrupt_stack_size in _ISR_Stack_size.

Move definitions to <rtems/score/isr.h>.  The new names are considerable
shorter and in the right namespace.

Update #3459.
2018-11-08 08:09:20 +01:00
Hesham Almatary
9cda6f29a7 riscv: Allow platforms with no PLIC to proceed
Spike simulator and QEMU's spike_v1.10 don't have a PLIC
2018-09-17 14:22:17 +02:00
Sebastian Huber
141d502b52 bsp/riscv: Add missing BSP variant
Update #3433.
2018-08-02 15:33:00 +02:00
Sebastian Huber
4c740de6e2 bsp/riscv: Fix build with RTEMS_SMP undefined
Update #3433.
2018-08-02 14:13:25 +02:00
Sebastian Huber
3d11c1e2af bsp/riscv: Fix a synchronization issue for PLIC
Update #3433.
2018-08-02 09:28:23 +02:00
Sebastian Huber
dee2ebbaa6 bsp/riscv: Remove unused variable
Update #3433.
2018-08-01 11:15:55 +02:00
Sebastian Huber
56b0387d2f bsp/riscv: Add NS16750 support to console driver
Update #3433.
2018-08-01 11:15:14 +02:00
Sebastian Huber
529154bad2 bsp/riscv: Initialize FPU depending on ISA
Initialize fcsr to zero for a defined rounding mode.

Update #3433.
2018-08-01 10:08:59 +02:00
Sebastian Huber
48cbd63c84 bsp/riscv: Fix clock driver
Do not assume that mtime is zero at boot time.

Update #3433.
2018-08-01 10:07:18 +02:00
Sebastian Huber
44c2d393bd bsp/riscv: Fix inter-processor interrupts
The previous version worked only on a patched Qemu.  Writes to mip are
illegal according to the The RISC-V Instruction Set Manual, Volume II:
Privileged Architecture, Privileged Architecture Version 1.10.

Update #3433.
2018-07-27 15:06:55 +02:00
Sebastian Huber
cfc95736ff riscv: Rework CPU counter support
Update #3433.
2018-07-27 15:06:55 +02:00
Sebastian Huber
581a0f8866 bsp/riscv: Use interrupt driven NS16550 driver
Update #3433.
2018-07-25 10:07:44 +02:00
Sebastian Huber
adede135e7 bsp/riscv: Add PLIC support
Update #3433.
2018-07-25 10:07:44 +02:00
Sebastian Huber
bd5603868a bsp/riscv: Add simple SMP support to clock driver
This is a hack.  The clock interrupt should be handled by each hart.

Update #3433.
2018-07-25 10:07:44 +02:00
Sebastian Huber
6552ba8c37 bsp/riscv: Use CPU counter btimer
Update #3433.
2018-07-25 10:07:44 +02:00
Sebastian Huber
447fd894ae bsp/riscv: Add basic SMP startup
Update #3433.
2018-07-25 10:07:44 +02:00
Sebastian Huber
6b9ef097c3 riscv: Add CLINT and PLIC support
The CLINT and PLIC need some per-processor state.

Update #3433.
2018-07-25 10:07:43 +02:00
Sebastian Huber
f5fd8eb9e3 bsps/riscv: Update linker-symbols.h
Update #3433.
2018-07-25 10:07:43 +02:00
Sebastian Huber
dda6e06edb bsp/riscv: Add reset via for SiFive Test Finisher
Update #3433.
2018-07-25 10:07:43 +02:00
Sebastian Huber
3a263a9b02 bsp/riscv: Add and use riscv_fdt_get_address()
Update #3433.
2018-07-25 10:07:43 +02:00
Sebastian Huber
7fe48551a2 bsp/riscv: Fix HTIF warnings
Update #3433.
2018-07-25 10:07:43 +02:00
Sebastian Huber
8db3f0e878 riscv: Rework exception handling
Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector()
functions.  Applications can install an exception handler via the fatal
error handler to handle synchronous exceptions.

Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must
be provided by the BSP.

Update #3433.
2018-07-25 10:07:43 +02:00
Sebastian Huber
1a192398bf bsp/riscv: Add console support for NS16550 devices
Update #3433.
2018-07-06 14:27:39 +02:00
Sebastian Huber
31f90a2ff4 bsp/riscv: Simplify printk() support
This is a prepartion to add NS16550 driver support to the console
driver.

Update #3433.
2018-07-06 14:27:29 +02:00
Sebastian Huber
bca36d986b riscv: Add LADDR assembler define
An address must be loaded to a register according to the code model.
Add LADDR define for use in assembler code.

Update #3433.
2018-07-06 13:46:46 +02:00
Sebastian Huber
dd32e2b2d0 riscv: Implement CPU counter
Update #3433.
2018-07-06 13:46:46 +02:00
Sebastian Huber
d3dff40e5e bsps: Update headers.am 2018-07-05 07:26:49 +02:00
Sebastian Huber
0fd8287b2b riscv: Add _CPU_Get_current_per_CPU_control()
Update #3433.
2018-06-28 15:03:23 +02:00
Sebastian Huber
3be4478f5a riscv: Avoid namespace pollution
Remove <rtems/score/riscv-utility.h> include from <rtems/score/cpu.h>
(which is visible via <rtems.h> for example).

Update #3433.
2018-06-28 15:03:23 +02:00
Sebastian Huber
ff7b10479b bsp/riscv: Remove bsp_interrupt_handler_default()
It duplicated the default implementation.

Update #3433.
2018-06-28 15:03:19 +02:00
Sebastian Huber
cdfed94f34 bsp/riscv: Rework clock driver
Use device tree provided timebase frequency.  Do not write to read-only
mtime register.

Update #3433.
2018-06-28 15:03:19 +02:00
Sebastian Huber
1232cd4690 bsp/riscv: Add device tree support for console
Update #3433.
2018-06-28 15:02:13 +02:00
Sebastian Huber
c558cc4b00 bsp/riscv: Fix vector table for lp64
Update #3433.
2018-06-28 15:02:13 +02:00
Sebastian Huber
5f5c450aa4 bsp/riscv: Add SMP startup synchronization
Update #3433.
2018-06-28 15:02:13 +02:00
Sebastian Huber
fe2cd01ba7 bsp/riscv: Add device tree support
Update #3433.
2018-06-28 15:02:12 +02:00
Sebastian Huber
2086948a7b riscv: Add dummy SMP support
Update #3433.
2018-06-28 15:02:12 +02:00
Sebastian Huber
9b2ef07f4b bsp/riscv: Load global pointer
Update #3433.
2018-06-27 08:58:18 +02:00
Sebastian Huber
b0ee7894d7 bsp/riscv: Use memset() to clear .bss
Update #3433.
2018-06-27 08:58:18 +02:00
Sebastian Huber
52f4fb65b3 riscv: Format assembler files
Use tabs to match the GCC generated assembler output.

Update #3433.
2018-06-27 08:58:18 +02:00
Sebastian Huber
fef0a414cf bsp/riscv: Do not clear integer registers at start
There is no need to do this.

Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
380243627b bsp/riscv: Fix some warnings
Update #3444.
2018-06-27 08:58:17 +02:00
Sebastian Huber
16d905f289 bsp/riscv: Add BSP options to define RAM region
Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
f3da074a12 bsp/riscv: Add new BSP variants
The latest RISC-V tool chain introduced new multilib variants. Add
corresponding BSP variants.

Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
6f5d88a469 bsp/riscv_generic: Rename to "riscv"
Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
41e22955ca bsp/riscv_generic: Use standard optimization flags
Update #3433.
2018-06-27 08:58:17 +02:00
Hesham Almatary
92388f6941 bsps/riscv_generic: Rename and add variants
Add BSP variants to match supported RISC-V ISA variants (multilibs).
2018-06-27 08:58:17 +02:00
Sebastian Huber
9e3bb457e6 bsp/riscv_generic: New linker command file
This linker command file is based on the "riscv64-rtems5-ld --verbose"
output.

Update #3433.
2018-06-27 08:58:17 +02:00
Sebastian Huber
511dc4b2be Rework initialization and interrupt stack support
Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>.  Place the
interrupt stack area in a special section ".rtemsstack.interrupt".  Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures.  There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack().  Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  * interrupts are disabled during the sequential system initialization,
    and

  * the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  * Mostly replace the linker symbol based configuration of stacks with
    the standard <rtems/confdefs.h> configuration via
    CONFIGURE_INTERRUPT_STACK_SIZE.  The size of the FIQ, ABT and UND
    mode stack is still defined via linker symbols.  These modes are
    rarely used in applications and the default values provided by the
    BSP should be sufficient in most cases.

  * Remove the bsp_processor_count linker symbol hack used for the SMP
    support. This is possible since the interrupt stack area is now
    allocated by the linker and not allocated from the heap.  This makes
    some configure.ac stuff obsolete.  Remove the now superfluous BSP
    variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  * Remove unused magic linker command file allocation of initialization
    stack.  Maybe a previous linker command file copy and paste problem?
    In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

m68k:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

powerpc:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

  * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt
    stack on BSPs using the shared linkcmds.base (replacement for
    REGION_RWEXTRA).

sparc:

  * Remove the hard coded initialization stack.  Use the interrupt stack
    for the initialization stack on the boot processor.  This saves
    16KiB of RAM.

Update #3459.
2018-06-27 08:58:16 +02:00