Files
rtems/bsps/riscv
Sebastian Huber 44c2d393bd bsp/riscv: Fix inter-processor interrupts
The previous version worked only on a patched Qemu.  Writes to mip are
illegal according to the The RISC-V Instruction Set Manual, Volume II:
Privileged Architecture, Privileged Architecture Version 1.10.

Update #3433.
2018-07-27 15:06:55 +02:00
..
2018-01-25 08:45:26 +01:00