Commit Graph

4431 Commits

Author SHA1 Message Date
Cindy Liu
498fd84a55 use raise warining in version check
Signed-off-by: Cindy Liu <hcindyl@google.com>
2023-12-28 06:05:07 +07:00
Cindy Liu
807a42e91e Move the version check just before the usage
Signed-off-by: Cindy Liu <hcindyl@google.com>
2023-12-28 06:05:07 +07:00
Cindy Liu
04dc9675f3 Replace deprecated pkg_resources usage
Use importlib.metadata to check the jinja2 version

Signed-off-by: Cindy Liu <hcindyl@google.com>
2023-12-28 06:05:07 +07:00
Gerwin Klein
7bad3610f1 github: upload kernel.elf build artifact
The kernel.elf file is occasionally more useful for debugging than the
final board image.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-12-12 08:12:10 +01:00
Birg
9a532efc15 change CPTR to CPtr
Signed-off-by: Birg <bbrcknl@github.com>
2023-12-06 10:41:28 +00:00
Rafal Kolanski
d92c49ab9b arm hyp: avoid implicit downcast to local vars
lr_num is assigned to from word_t, so should also be word_t rather than
unsigned int.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-12-06 03:23:49 +11:00
Rafal Kolanski
55aee64707 arm hyp: gic_vcpu_num_list_regs should be word_t
On AArch64, if this is int, we encounter a situation where we can't
prove equivalence with the abstract spec without an extra invariant that
the number of these registers isn't zero (to satisfy 32<->64 bit casts).
Sticking with word size will make sense on both 32 and 64 bit.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-12-06 03:23:49 +11:00
Rafal Kolanski
66e5c79d06 Arm 64-bit: do not use unsigned int for arg length
Arch_decodeInvocation takes a word_t length and then passes it to
functions that take an unsigned int length. This was OK on 32-bit where
these types are the same, but on 64-bit this is a downcast without a
range check. It isn't clear why this doesn't trip a compiler warning.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-12-06 03:23:49 +11:00
Birg
391bfb15f8 update some manual todos
Signed-off-by: Birg <bbrcknl@github.com>
2023-11-29 10:21:32 +00:00
Axel Heider
94c5a0b53a cmake: show DTS name in error message
Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-11-27 14:24:55 +00:00
Axel Heider
b59fa0ed20 riscv: use MAX_IRQ instead of PLIC_MAX_NUM_INT
Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-11-24 09:57:46 +00:00
Axel Heider
a2cb6d0271 style: support property SMMU
Avoid the annoying style checker complaints.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-11-24 09:57:46 +00:00
Axel Heider
d2027a1fb9 cmake: rework macro declare_seL4_arch()
Support multiple architectures as parameter.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-11-23 11:53:46 +00:00
Axel Heider
7d93471e9c debug: use c99 standard instead of gcc extensions
Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-11-16 12:09:52 +00:00
Axel Heider
7dbdbee05f exynos4: remove explicit TIMER_PRECISION setting
The default value is zero anyway.

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-11-15 18:03:37 +00:00
Corey Lewis
155a5146bf mcs: change installTCBCap to not insert null caps
This insertion is not required, as the slot has just been cleared by
cteDelete. Avoiding the insertion simplifies verification.

Signed-off-by: Corey Lewis <corey.lewis@proofcraft.systems>
2023-11-15 15:53:14 +11:00
Corey Lewis
172d4c0f49 mcs: refactor validFaultHandler
This changes it to be a pure function, which eases verification

Signed-off-by: Corey Lewis <corey.lewis@proofcraft.systems>
2023-11-15 15:53:14 +11:00
Axel Heider
d7f2ba4aec remove useless assert
The assert() condition is checked two lines above

Signed-off-by: Axel Heider <axelheider@gmx.de>
2023-11-10 22:16:31 +11:00
Ivan-Velickovic
baacd4453a Add Pine64 Star64 support to CHANGES
Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-11-08 14:34:18 +00:00
Ivan-Velickovic
49e5f47041 Update PLIC handling for Star64/U74-MC
Similarly to the U54-MC, the U74-MC has a S-core that does not run in
supervisor mode.

Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-11-08 14:34:18 +00:00
Ivan-Velickovic
e959f83962 Add support for Star64 SBC
Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2023-11-08 14:34:18 +00:00
Gerwin Klein
4b8bed320d arm_global: document deadline assert
The comment that PRECISION is too low when the assert fails was wrong.
PRECISION should have no influence on it.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-08 11:01:00 +11:00
Gerwin Klein
14ff0c28ec x86 setDeadline: must set at least 1 tick
- make sure the tick count does not underflow
- make sure the tick count does not become 0 in the division, because
  a value of 0 stops the timer.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-08 11:01:00 +11:00
Gerwin Klein
dac2857229 mcs: move setDeadline assertions
Move the ksCurTime assertions out of setDeadline, because they are not
necessarily true there. Assert ksCurTime in setNextInterrupt instead.

We only know that the deadline being set is at least ksCurTime -
getTimerPrecision(), which can be slightly in the past (ksCurTime is
already slightly in the past, at kernel entry).

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-08 11:01:00 +11:00
Michael McInerney
521f7e3c19 mcs: remove getKernelWcetTicks from refill_ready
Previously, a refill would be ready if its head time
was at most getKernelWcetTicks after the current time.
This would mean that refill_unblock_check could
bring a refill's time forward, which violates an
invariant (namely that the time of the last refill
is at most the period from the time of the head refill).

Moreover, since the time to exit the kernel is always
less than the WCET, this might result in us running
a thread whose refill time is in the future, which
seems to violate the timing model.

Signed-off-by: Michael McInerney <michael.mcinerney@proofcraft.systems>
2023-11-08 11:01:00 +11:00
Gerwin Klein
d8f4a95b72 manual: group invocations by MCS/non-MCS
Put MCS-only invocations into their own groups and files. This solves
the problem that doxygen gets confused by duplicate function names with
the same parameters.

MCS/non-MCS is distinguished by evaluating the <condition> field in the
API XML definition. If the condition evaluates to true when
CONFIG_KERNEL_MCS is set, it is an MCS-only method, otherwise it is
assumed to be non-MCS or present in both configs.

Fixes #558

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 16:13:28 +11:00
Gerwin Klein
355f9abc15 sel4.xml: mark Set Space as MCS in the manual
Disambiguate (for the reader) between normal and mcs versions of
SetSpace in the manual. This does not yet solve doxygen confusion.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 16:13:28 +11:00
Gerwin Klein
beb2c0d176 manual: remove obsolete doxygen settings
HTML_TIMESTAMP and LATEX_TIMESTAMP have been removed in more recent
doxygen versions. Since we are using the defaults, they are safe to
remove in our config file.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 16:13:27 +11:00
Gerwin Klein
9956101ba6 manual: handle name duplication between groups
Different API groups may contain the same function name, for instance
IRQ_Control GetTrigger for RISC-V vs the same for ARM. Duplicate
function names with identical parameter lists confuse doxygen, leading
it to generate a single merged xml entry for both, which means one of
the entires will be missing and the other will be potentially wrong.

When the functions are placed in different files and different groups
at the same time, doxygen no longer is confused in all cases.

Therefore:

- generate a separate file for each API group
- generate a separate file group_defs.h that contains group definitions
  and declares group nesting

Unfortunately, this does not seem to always work (e.g. the toplevel
MCS/non-MCS syscalls), so manual inspection is still necessary when
adding new calls and separate doxygen runs for duplicate function names
may be necessary. Generating separate files as above enables this
option, should it become necessary in the future.

Fixes #530

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 16:01:50 +11:00
Gerwin Klein
1de89ba1f2 trivial: spelling (sel4 -> seL4)
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 16:01:50 +11:00
Gerwin Klein
b67c7310af parse_doxygen_xml: avoid XMLParsedAsHTMLWarning
Explicitly select xml parser (instead of html) via "lxml-xml" in
BeatifulSoup to avoid warning.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 16:01:49 +11:00
Gerwin Klein
97588df016 mcs: simplify sc_sporadic, assert invariant
It is an invariant in the MCS kernel that scSporadic implies sc_active.
Make use of that invariant by avoiding an explicit check for sc_active,
but assert the invariant in debug mode so it fails quickly when new
code breaks the invariant.

Essentially reverts 56098195f2 now that the invariant is preserved,
but adjusts the assertion from 17109eb8c9 to actually express
the invariant.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 08:39:10 +11:00
Gerwin Klein
be848fd06b mcs finaliseCap: ensure invariant for inactive SCs
Make sure the invariant "sc_sporadic implies sc_active" is preserved by
invalid SchedContexts as well.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 08:39:10 +11:00
Gerwin Klein
8e7aa93e00 schedcontrol: tweak code ordering for verification
Change the statement ordering such that the "sc_sporadic implies
sc_active" invariant is not violated. In the previous code order, the
scSporadic flag is set while the scheduling context is still
potentially inactive. Setting the flag later avoids temporarily
breaking the invariant.

Move the badge setting together with the flag to keep these heap
updates together.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-07 08:36:02 +11:00
Hesham Almatary
c2497cbb38 riscv: place traps and fastpath code adjacently
Follow Arm's code where it tries to place traps and vector
code adjacently in a 4KiB page to optimise performance
(through spatial cache locality).

Closes #1091

Signed-off-by: Hesham Almatary <hesham.almatary@cl.cam.ac.uk>
2023-11-02 09:36:28 +00:00
Gerwin Klein
b7ad2e0c66 github: fix sel4bench trigger in GitHub workflow
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-11-01 08:43:06 +11:00
Hesham Almatary
5b4fb3e357 Add "ax" flags to .section directives in assembly
This commit fixes a linking error when using LLVM's lld.

llvm-as doesn't assume or assign section flags for input section if
not specified. This will make the section non-allocatable and put
into a none segment and trigger relocation linking errors against
symbols in non-allocatble sections.

For example, when building with LLVM/lld for AArch64, the following
error occurs:
(traps.S.obj:(function arm_vector_table: .vectors+0x0): has non-ABS
relocation R_AARCH64_JUMP26 against symbol 'invalid_vector_entry')
This does not happen with ld.bfd (GNU's linker) as it seems to allow
relocations against symbols in non-allocatable sections.

The GNU's assembler documentation states that:
"If no flags are specified, the default flags depend upon the
section name. If the section name is not recognized, the default
will be for the section to have none of the above flags: it will
not be allocated in memory, nor writable, nor executable.
The section will contain data. [1]"

This commit explicitly sets .section flags in assembly to avoid
this error and for better intentionality (and good practice)
without relying on toolchains handling flags and linkage differently.

[1] https://sourceware.org/binutils/docs/as/Section.html

Sponsored by: DARPA.

Signed-off-by: Hesham Almatary <hesham.almatary@cl.cam.ac.uk>
2023-10-31 08:36:00 +11:00
Nick Spinale
b9b36e584a cmake: remove mention of undone change in CHANGES
gen_config.h files are no longer generated at build time rather than
configure time. This is a return to the behavior of the last release.
Remove mention of the temporary change.

Signed-off-by: Nick Spinale <nick@nickspinale.com>
2023-10-28 07:36:42 +11:00
Nick Spinale
2c8bc584da cmake: generate config headers at config-time
Commit 6d439a4646, which added JSON configuration output, caused the
configuration headers to be generated at build-time instead of
configure-time.  This broke CAmkES build systems which depend on
configuration headers in CAmkES files at configure-time.

This commit makes the configuration headers available at configure-time.

Signed-off-by: Nick Spinale <nick@nickspinale.com>
2023-10-28 07:36:42 +11:00
Rafal Kolanski
4f9b736526 aarch64: use VS prefix for vspace_cap fields
The vspace (top level PT) cap had non-standard names which were a bit
confusing to reason about. The name conflict with capPTBasePtr also
spits out fully-qualified names in verification.
This commit updates all the field names of vspace_cap to start with
"capVS" and updates all the call sites.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-10-27 10:25:37 +11:00
Indan Zupancic
b4592ebc97 ARM: No special handling for edge-triggered IRQs
Clearing the pending state only has an effect if the IRQ state is
active-and-pending, which happens for edge-triggered interrupts if
another edge happens on the IRQ line for the currently active
interrupt. This window is small enough to ignore, at worst user
space will get another notification, which is harmless.

If unnecessary notifications are unwanted, the pending state should
be cleared during seL4_IRQHandler_Ack(), as that covers a much bigger
window. However, edge-triggered interrupts are not expected to happen
often. Making all interrupt handling slightly faster and the code
simpler is the better trade-off.

Reading the GIC config word is very slow for GICv2, see pull #1107.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2023-10-26 11:34:51 +01:00
Rafal Kolanski
908cac7202 aarch64: IS_PAGE_ALIGNED -> checkVPAlignment
Verification sees macros as the preprocessed C code. On other arches, we
have checkVPAlignment, but on AArch64 we had IS_PAGE_ALIGNED only. Since
this was the only use, this commit also removes IS_PAGE_ALIGNED in
favour of checkVPAlignment.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-10-26 10:52:01 +11:00
Rafal Kolanski
076dce203d aarch64: performPageInvocationUnmap consistency
For verification purposes, don't go through `_ptr_set_` from the
bitfield generator (same as RISC-V).

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-10-26 10:52:01 +11:00
Rafal Kolanski
88c35852fc aarch64: performASIDPoolInvocation consistency
For verification purposes, use same arg names as other platforms, and
don't go through `_ptr_set_` from the bitfield generator (same as
RISC-V).

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-10-26 10:52:01 +11:00
Gerwin Klein
542ee070c9 aarch64: make error reporting consistent
Report the vspace cap (1) as invalid, instead of the frame cap (0) in
decodeARMFrameInvocation to stay consistent with the other
architectures.

See also #1075

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-10-25 15:27:12 +11:00
Axel Heider
1c7a0cb549 qemu: handle 32-bit address limit
Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
2023-10-25 10:33:09 +11:00
Nick Spinale
c49ed7c152 boot: skip clock sync test on qemu-arm-virt
This sanity check does not pass reliably on qemu-arm-virt due to it
being a virtualized platform.

Signed-off-by: Nick Spinale <nick@nickspinale.com>
2023-10-24 20:38:43 +11:00
Gerwin Klein
a34aed4b70 github: add MCS C proofs to proof check
These proofs are currently still in progress (unfinished), but already
check large parts of the kernel and can break when the MCS preprocess
check fails.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2023-10-24 14:19:54 +11:00
Michael McInerney
6de399dc65 mcs: rephrase refill_capacity to ease verification
Signed-off-by: Michael McInerney <michael.mcinerney@proofcraft.systems>
2023-10-24 08:43:03 +11:00
Rafal Kolanski
7221eba1b9 arm: tune vcpu/gic struct padding for verification
Verification requires packed C structures for reasoning. While we
previously updated `struct vcpu` to be packed on AArch32, on AArch64
`struct gicVCpuIface` needs extra padding.

This extra padding now aligns a previously un-aligned field on AArch32,
meaning that needs to go away, and the comment there adjusted.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
2023-10-20 12:39:47 +11:00