* [components][clock_time] Refactor time subsystem around clock_time
Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.
Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.
Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.
* [components][clock_time] Use BSP-provided clock timer frequency on riscv64
* [risc-v] Use runtime clock timer frequency for tick and delays
* [bsp] Add clock timer frequency hooks for riscv64 boards
* [bsp] Update Renesas RA driver doc clock_timer link
* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh
* [bsp][rk3500] Update rk3500 clock configuration
* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays
* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci
* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk
Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.
* [bsp][raspi3] select clock time for systimer
* [bsp][hpm5300evk] Trim trailing blank line
* [bsp][hpm5301evklite] Trim trailing blank line
* [bsp][hpm5e00evk] Trim trailing blank line
* [bsp][hpm6200evk] Trim trailing blank line
* [bsp][hpm6300evk] Trim trailing blank line
* [bsp][hpm6750evk] Trim trailing blank line
* [bsp][hpm6750evk2] Trim trailing blank line
* [bsp][hpm6750evkmini] Trim trailing blank line
* [bsp][hpm6800evk] Trim trailing blank line
* [bsp][hpm6e00evk] Trim trailing blank line
* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source
* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.
* [docs][clock_time] add clock time documentation
* [docs][clock_time] Update clock time subsystem documentation
- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file
* [kernel][utest] Trim trailing space
* [clock_time] Fix hrtimer wrap handling
* [clock_time] fix the static rt_inline issue
* [clock_time] fix the rt_clock_hrtimer_control result issue
Problem:
When enumerating device tree nodes, platform bus and native buses (I2C/SPI)
may create duplicate devices for the same OFW node, causing cross-bus conflicts.
This triggers assertion failure '(dev->bus != new_bus)' in
rt_bus_reload_driver_device() during boot on minimal DM-enabled systems.
Root Cause:
1. Platform bus tries to reload devices that already belong to other buses
by calling rt_bus_reload_driver_device(dev->bus, dev), which violates
the API contract (requires dev->bus != new_bus).
2. Native buses (I2C/SPI) do not mark OFW nodes as occupied, so platform
bus creates duplicate platform devices for I2C/SPI client nodes.
Solution:
1. components/drivers/core/platform_ofw.c: Return RT_EOK when np->dev exists,
letting the native bus handle device lifecycle instead of cross-bus reload.
2. components/drivers/i2c/dev_i2c_bus.c: Mark i2c_client_np->dev during scan
to prevent platform bus from duplicating I2C client devices.
3. components/drivers/spi/dev_spi_bus.c: Mark spi_dev_np->dev during scan
to prevent platform bus from duplicating SPI devices.
Tested on Spacemit K1 RISC-V platform with minimal DM configuration.
Signed-off-by: lhxj <2743257167@qq.com>
- Add RT_USING_SPI_BITOPS as a separate configurable option
- Make RT_USING_SOFT_SPI depend on RT_USING_SPI_BITOPS
- Adjust build order in SConscript for proper com
Signed-off-by: Runcheng Lu <runcheng.lu@hpmicro.com>
1. 8250 serila family (OFW, PCI, DWC, early)
2. Virtual serial (by graphic and input)
3. HVC early serial
4. ARM PL011 serial
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Generic GPIO based backlight driver
2. Generic PWM based backlight driver
3. Simple framebuffer support
4. Standard 224-color RT-Thread logo
5. Standard 224-color RT-Thread white logo
Signed-off-by: GuEe-GUI <2991707448@qq.com>
Some comments have been initially added as a bignner task.
components/libc/cplusplus/os/cxx_Semaphore.cpp
components/libc/cplusplus/os/cxx_Thread.cpp
components/libc/cplusplus/utest/tc_atomic.cpp
components/libc/cplusplus/utest/tc_smartptr.cpp
components/libc/cplusplus/utest/tc_thread.cpp
Signed-off-by:Liu Chengtao<2739960959@qq.com>
The old CLK is can't link all hardware clock cell in system that the
API of layout such as 'set_parent' can't work as expected.
Some hareware clock cell need some flags to prevent some dangerous behaviors, eg:
When a clock cell is link to the PMU, the SoC will power-down if the cell is
disable.
The new CLK can do it, and make the CLK drivers implemented easier from
TRM/DataSheet.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
Hardware spinlock modules provide hardware assistance for
synchronization and mutual exclusion between heterogeneous processors
and those not operating under a single, shared operating system.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
