Files
rt-thread/components
GuEe-GUI 335a1242b0 [dm][clk] refactoring the CLK framework
The old CLK is can't link all hardware clock cell in system that the
API of layout such as 'set_parent' can't work as expected.

Some hareware clock cell need some flags to prevent some dangerous behaviors, eg:
When a clock cell is link to the PMU, the SoC will power-down if the cell is
disable.

The new CLK can do it, and make the CLK drivers implemented easier from
TRM/DataSheet.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2025-12-12 13:33:28 +08:00
..
2025-12-04 15:48:28 +08:00
2025-12-04 15:48:28 +08:00
2025-12-03 21:49:52 +08:00
2023-10-30 08:24:55 -04:00