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[driver/usb]Update dwc2/usb_glue_infineon.c to add the missing header file. (#11158)
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@@ -8,13 +8,13 @@
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#include "usb_dwc2_param.h"
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#include "rtthread.h"
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#include "cybsp.h"
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#include "cy_device.h"
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#if defined (COMPONENT_CM55)
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#if defined(CONFIG_USB_DWC2_DMA_ENABLE) && !defined(CONFIG_USB_DCACHE_ENABLE)
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#if !defined(CONFIG_USB_DCACHE_ENABLE)
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#error "Please enable CONFIG_USB_DCACHE_ENABLE and put USB_NOCACHE_RAM_SECTION to section ".cy_socmem_data" when using DMA"
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#endif
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#else
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#define CONFIG_USB_DWC2_DMA_ENABLE
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#endif
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@@ -83,6 +83,8 @@ void usb_dc_low_level_init(uint8_t busid)
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USBHS_SS->PHY_FUNC_CTL_1 |= (7 << USBHS_SS_PHY_FUNC_CTL_1_PLL_FSEL_Pos);
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USBHS_SS->PHY_FUNC_CTL_2 |= (USBHS_SS_PHY_FUNC_CTL_2_RES_TUNING_SEL_Msk | USBHS_SS_PHY_FUNC_CTL_2_EFUSE_SEL_Msk);
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rt_thread_mdelay(200); /* Wait for PHY stable */
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cy_stc_sysint_t usb_int_cfg = {
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.intrSrc = usbhs_interrupt_usbhsctrl_IRQn,
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.intrPriority = 3
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@@ -120,6 +122,8 @@ void usb_hc_low_level_init(struct usbh_bus *bus)
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USBHS_SS->PHY_FUNC_CTL_1 |= (7 << USBHS_SS_PHY_FUNC_CTL_1_PLL_FSEL_Pos);
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USBHS_SS->PHY_FUNC_CTL_2 |= (USBHS_SS_PHY_FUNC_CTL_2_RES_TUNING_SEL_Msk | USBHS_SS_PHY_FUNC_CTL_2_EFUSE_SEL_Msk);
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rt_thread_mdelay(200); /* Wait for PHY stable */
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cy_stc_sysint_t usb_int_cfg = {
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.intrSrc = usbhs_interrupt_usbhsctrl_IRQn,
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.intrPriority = 3
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