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RTOS:main RTOS:6 RTOS:5 RTOS:4.11 RTOS:4.10 RTOS:4.9 RTOS:4.8 Imagelibrary:main Imagelibrary:6 Imagelibrary:5 Imagelibrary:4.11 Imagelibrary:4.10 Imagelibrary:4.9 Imagelibrary:4.8
RTOS:contrib/cpukit/uuid/1.45.5 RTOS:contrib/cpukit/xz-embedded/2015-11-03-e75f4eb RTOS:contrib/cpukit/zlib/1.3.1 RTOS:contrib/cpukit/utf8proc/1.1.5 RTOS:contrib/cpukit/fastlz/0.1.0 RTOS:contrib/bsps/arm/stm32u5/stm32u5xx-hal-driver/1.5.0 RTOS:contrib/bsps/arm/stm32h7/stm32h7xx_hal_driver/1.11.3 RTOS:contrib/bsps/arm/stm32h7/cmsis-device-h7/1.10.4 RTOS:6.1 RTOS:base/6 RTOS:5.3 RTOS:5.2 RTOS:5.1 RTOS:4.11.3 RTOS:4.11.2 RTOS:4.11.0 RTOS:4.11.1 RTOS:4.10.2 RTOS:4.9.6 RTOS:4.10.1 RTOS:4.10.0 RTOS:4.9.5 RTOS:4.8.2 RTOS:4.9.4 RTOS:4.9.3 RTOS:4.9.2 RTOS:4.9.1 RTOS:4.9.0 RTOS:4.8.1 RTOS:4.8.0 RTOS:4.7.3 RTOS:4.7.2 RTOS:4.7.1 RTOS:4.7.0 RTOS:4.6.6 RTOS:4.6.5 RTOS:4.6.4 RTOS:4.6.3 RTOS:4.6.2 RTOS:4.6.1 RTOS:4.6.0 RTOS:4.5.1-pre3 RTOS:4.5.1-pre2 RTOS:4.5.1-pre1 RTOS:4.5.0 RTOS:4.0.0 RTOS:3.6.0 RTOS:3.5.17 RTOS:3.5.16 RTOS:3.5.15 RTOS:3.5.14 RTOS:3.5.12 RTOS:3.5.1 RTOS:3.5.0-alpha Imagelibrary:contrib/cpukit/uuid/1.45.5 Imagelibrary:contrib/cpukit/xz-embedded/2015-11-03-e75f4eb Imagelibrary:contrib/cpukit/zlib/1.3.1 Imagelibrary:contrib/cpukit/utf8proc/1.1.5 Imagelibrary:contrib/cpukit/fastlz/0.1.0 Imagelibrary:contrib/bsps/arm/stm32u5/stm32u5xx-hal-driver/1.5.0 Imagelibrary:contrib/bsps/arm/stm32h7/stm32h7xx_hal_driver/1.11.3 Imagelibrary:contrib/bsps/arm/stm32h7/cmsis-device-h7/1.10.4 Imagelibrary:6.1 Imagelibrary:base/6 Imagelibrary:5.3 Imagelibrary:5.2 Imagelibrary:5.1 Imagelibrary:4.11.3 Imagelibrary:4.11.2 Imagelibrary:4.11.0 Imagelibrary:4.11.1 Imagelibrary:4.10.2 Imagelibrary:4.9.6 Imagelibrary:4.10.1 Imagelibrary:4.10.0 Imagelibrary:4.9.5 Imagelibrary:4.8.2 Imagelibrary:4.9.4 Imagelibrary:4.9.3 Imagelibrary:4.9.2 Imagelibrary:4.9.1 Imagelibrary:4.9.0 Imagelibrary:4.8.1 Imagelibrary:4.8.0 Imagelibrary:4.7.3 Imagelibrary:4.7.2 Imagelibrary:4.7.1 Imagelibrary:4.7.0 Imagelibrary:4.6.6 Imagelibrary:4.6.5 Imagelibrary:4.6.4 Imagelibrary:4.6.3 Imagelibrary:4.6.2 Imagelibrary:4.6.1 Imagelibrary:4.6.0 Imagelibrary:4.5.1-pre3 Imagelibrary:4.5.1-pre2 Imagelibrary:4.5.1-pre1 Imagelibrary:4.5.0 Imagelibrary:4.0.0 Imagelibrary:3.6.0 Imagelibrary:3.5.17 Imagelibrary:3.5.16 Imagelibrary:3.5.15 Imagelibrary:3.5.14 Imagelibrary:3.5.12 Imagelibrary:3.5.1 Imagelibrary:3.5.0-alpha
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Imagelibrary:main Imagelibrary:6 Imagelibrary:5 Imagelibrary:4.11 Imagelibrary:4.10 Imagelibrary:4.9 Imagelibrary:4.8 RTOS:main RTOS:6 RTOS:5 RTOS:4.11 RTOS:4.10 RTOS:4.9 RTOS:4.8
Imagelibrary:contrib/cpukit/uuid/1.45.5 Imagelibrary:contrib/cpukit/xz-embedded/2015-11-03-e75f4eb Imagelibrary:contrib/cpukit/zlib/1.3.1 Imagelibrary:contrib/cpukit/utf8proc/1.1.5 Imagelibrary:contrib/cpukit/fastlz/0.1.0 Imagelibrary:contrib/bsps/arm/stm32u5/stm32u5xx-hal-driver/1.5.0 Imagelibrary:contrib/bsps/arm/stm32h7/stm32h7xx_hal_driver/1.11.3 Imagelibrary:contrib/bsps/arm/stm32h7/cmsis-device-h7/1.10.4 Imagelibrary:6.1 Imagelibrary:base/6 Imagelibrary:5.3 Imagelibrary:5.2 Imagelibrary:5.1 Imagelibrary:4.11.3 Imagelibrary:4.11.2 Imagelibrary:4.11.0 Imagelibrary:4.11.1 Imagelibrary:4.10.2 Imagelibrary:4.9.6 Imagelibrary:4.10.1 Imagelibrary:4.10.0 Imagelibrary:4.9.5 Imagelibrary:4.8.2 Imagelibrary:4.9.4 Imagelibrary:4.9.3 Imagelibrary:4.9.2 Imagelibrary:4.9.1 Imagelibrary:4.9.0 Imagelibrary:4.8.1 Imagelibrary:4.8.0 Imagelibrary:4.7.3 Imagelibrary:4.7.2 Imagelibrary:4.7.1 Imagelibrary:4.7.0 Imagelibrary:4.6.6 Imagelibrary:4.6.5 Imagelibrary:4.6.4 Imagelibrary:4.6.3 Imagelibrary:4.6.2 Imagelibrary:4.6.1 Imagelibrary:4.6.0 Imagelibrary:4.5.1-pre3 Imagelibrary:4.5.1-pre2 Imagelibrary:4.5.1-pre1 Imagelibrary:4.5.0 Imagelibrary:4.0.0 Imagelibrary:3.6.0 Imagelibrary:3.5.17 Imagelibrary:3.5.16 Imagelibrary:3.5.15 Imagelibrary:3.5.14 Imagelibrary:3.5.12 Imagelibrary:3.5.1 Imagelibrary:3.5.0-alpha RTOS:contrib/cpukit/uuid/1.45.5 RTOS:contrib/cpukit/xz-embedded/2015-11-03-e75f4eb RTOS:contrib/cpukit/zlib/1.3.1 RTOS:contrib/cpukit/utf8proc/1.1.5 RTOS:contrib/cpukit/fastlz/0.1.0 RTOS:contrib/bsps/arm/stm32u5/stm32u5xx-hal-driver/1.5.0 RTOS:contrib/bsps/arm/stm32h7/stm32h7xx_hal_driver/1.11.3 RTOS:contrib/bsps/arm/stm32h7/cmsis-device-h7/1.10.4 RTOS:6.1 RTOS:base/6 RTOS:5.3 RTOS:5.2 RTOS:5.1 RTOS:4.11.3 RTOS:4.11.2 RTOS:4.11.0 RTOS:4.11.1 RTOS:4.10.2 RTOS:4.9.6 RTOS:4.10.1 RTOS:4.10.0 RTOS:4.9.5 RTOS:4.8.2 RTOS:4.9.4 RTOS:4.9.3 RTOS:4.9.2 RTOS:4.9.1 RTOS:4.9.0 RTOS:4.8.1 RTOS:4.8.0 RTOS:4.7.3 RTOS:4.7.2 RTOS:4.7.1 RTOS:4.7.0 RTOS:4.6.6 RTOS:4.6.5 RTOS:4.6.4 RTOS:4.6.3 RTOS:4.6.2 RTOS:4.6.1 RTOS:4.6.0 RTOS:4.5.1-pre3 RTOS:4.5.1-pre2 RTOS:4.5.1-pre1 RTOS:4.5.0 RTOS:4.0.0 RTOS:3.6.0 RTOS:3.5.17 RTOS:3.5.16 RTOS:3.5.15 RTOS:3.5.14 RTOS:3.5.12 RTOS:3.5.1 RTOS:3.5.0-alpha

124 Commits
base/6 ... 5.2

Author SHA1 Message Date
Kinsey Moore
05461aa475 cpukit/fdt: Free index before container 
Ensure that the index is released before the structure containing it is
freed and NULLed.

Updates #4460
 2022-10-03 13:24:28 -05:00
Kinsey Moore
cab00c7035 cpukit/fdt: Check correct allocation 
The second allocation check was mistakenly rechecking the first
allocation. It now checks the correct allocation and ensures that names
is not NULL.

Updates #4462
 2022-10-03 13:24:28 -05:00
Chris Johns
c5b794227b cpukit/include: Fix including in C++ 
Closes #4709
 2022-08-27 10:36:27 +10:00
Sebastian Huber
b9de5b3bd6 score: Fix unlimited objects support 
Commit 21275b58a5 ("score: Static
Objects_Information initialization") introduced an off-by-one error in the
maintenance of inactive objects.

Close #4676.
 2022-07-18 09:36:34 +02:00
Sebastian Huber
fc7584d719 score: Fix _Objects_Active_count() 
With unlimited objects the object maximum may be larger than the sum of active
and inactive objects.

Update #4676.
 2022-07-18 09:36:09 +02:00
Sebastian Huber
8d54187a19 Synchronize all file descriptors in sync() 
Synchronize all file descriptors and not just the ones associated with a FILE
object.

Close #4655.
 2022-05-17 15:27:50 +02:00
Sebastian Huber
5d73509a34 posix: Fix use of clock for relative times 
Close #4429.
 2022-05-04 15:57:37 +02:00
Sebastian Huber
be5d2bc03d heap: Fix heap statistics with protection enabled 
Close #4643.
 2022-05-04 15:57:37 +02:00
Christian Mauderer
fc89cc7680 imfs: Fix index underrun when extending empty file 
Currently the following sequence causes a endless loop when extending an
IMFS file:

- Create a file with zero length and close it.
- Make sure nearly no allocatable memory is left.
- Open the file and write enough data into it that more than the
  remaining memory will be used.

In that case when extending the IMFS file, the file currently need zero
blocks. If allocating enough new blocks fails, the already allocated new
blocks will be freed again.

The comparison of block>=old_blocks that has been used prior to this
patch compared two unsigned numbers. If old_blocks was zero, the
comparison of these two numbers always evaluated to true.

This patch frees the last block in a separate step to avoid this
problem.

Fixes #4638
 2022-04-07 10:39:50 +02:00
Christian Mauderer
fc21b923ba bsp/atsam: Improve UART / USART tx performance 
Put the next character into the send buffer if the buffer is empty and
not when the last character has been sent out to the line. This improves
the performance slightly.

Before that patch, the receive path was faster than the transmit path.
Therefore a simple echo could drop characters on a busy connection.
With this patch sending and receiving has about the same performance so
that no characters are lost.

Fixes #4611
 2022-02-15 14:45:42 +01:00
Christian Mauderer
f7a204e3d7 bsp/atsam/i2c: Add error return and fix edge cases 
The driver didn't return with an error on (for example) a NACK on the
bus. This adds the expected error return. Due to the new case that a
transfer can be interrupted on an error, there were some new edge cases.
This patch therefore also fixes these edge cases by removing the
transfer_state that more or less duplicated the interrupt states.

Fixes #4591
 2022-02-10 09:03:19 +01:00
Christian Mauderer
f71c620f7e bsp/atsam/i2c: Simplify driver 
Do some clean ups. Remove superfluous variables. Eliminate some overly
complex logic (information about transfer and remaining bytes has been
tracked redundantly in multiple variables).

This patch doesn't change the behavior of the driver.

Update #4591
 2022-02-10 09:02:56 +01:00
Christian Mauderer
9942ff80c4 termios: Pass number of sent chars to l_start 
At the moment the line discipline start function (l_start) has no
possibility to get feedback about the number of characters that have
been sent. This patch passes that information via an additional
parameter.

The change might trigger a warning on existing code because of a pointer
mismatch but it shouldn't break it. An existing function with the old
API will just ignore the additional parameter.

Update #4494
 2022-02-10 09:02:03 +01:00
Christian Mauderer
779847a5ef bsp/atsam: Optionally use DMA for UART Rx 
If the system is busy with other interrupts and the UART is set to a
fast baud rate, it's possible to loose UART interrupts and therefore
characters. This allows to optionally enable a DMA for the UARTs so that
a number of lost interrupts can be tolerated.

The number of DMAs on this chip is limited and not not all applications
need that feature. Therefore the DMA is disabled by default.

Close #4577
 2022-01-18 08:50:06 +01:00
Christian Mauderer
d9c0dd3c32 bsp/atsam: Merge USART and UART driver 
If no extended features of the USART are used and if the comparison
feature of the UART is not used, the two modules are compatible. The
drivers were nearly identical except for some names of the defines.

This patch merges the two drivers into one.

Update #4577
 2022-01-18 08:50:04 +01:00
Christian Mauderer
ff3f3490df untar: Make behavior similar to GNU or BSD tar 
RTEMS untar implementation had problems with overwriting or integrating
archives into existing directory structures. This patch adapts the
behavior to mimic that of a GNU tar or BSD tar and extends the tar01
test to check for the behavior. That is:

* If a directory structure exists, the files from the archive will be
  integrated. Existing files are overwritten.

* If a file exists and the archive contains a directory with the same
  name, the file is removed and a directory is created. In the above
  example: if l1/l2 is a file it will be overwritten with a new
  directory.

* If a directory exists and the archive contains a file with the same
  name, the directory will be replaced if it is empty. If it contains
  files, the result is an error.

* An archive also can contain only a file without the parent
  directories. If in that case one of the parent directories exists as a
  file extracting the archive results in an error. In the example: if
  l1/l2 is a file and the archive doesn't contain the directories but
  only the file l1/l2/x.txt that would be an error.

* In case of an error, it is possible that the archive has been
  partially extracted.

Closes #4552
 2021-12-09 08:26:34 +01:00
Sebastian Huber
18bbfc729e score: Fix atomic stores for C++ 
Close #4567.
 2021-12-07 12:31:12 +01:00
Sebastian Huber
5382f617ff score: Add _Timecounter_Set_NTP_update_second() 
Allow the installation of an NTP update second handler which may be used by an
NTP service.

Update #4549.
 2021-11-16 10:13:03 +01:00
Sebastian Huber
780b468845 score: Optimize timehand updates for non-SMP 
In uniprocessor configurations, the timehand updates are done with
interrupts disabled.  So, it is impossible to observe a generation
number of zero.
 2021-11-16 09:48:22 +01:00
Sebastian Huber
1c378f1a98 score: Port large time delta support to RTEMS 2021-11-16 09:48:22 +01:00
Sebastian Huber
68a3658d44 score: Initialize timehand generation to UINT_MAX 
This leads to a timehand generation overflow right at the system start
and helps to get code coverage in test programs.
 2021-11-16 09:48:22 +01:00
Mark Johnston
1640657022 timecounter: Load the currently selected tc once in tc_windup() 
Reported by:	Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed by:	kib
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D32729
 2021-11-16 09:48:22 +01:00
Sebastian Huber
4f130929b8 kern_tc.c: Scaling/large delta recalculation 
This change is a slight performance optimization for systems with a slow
64-bit division.

The th->th_scale and th->th_large_delta values only depend on the
timecounter frequency and the th->th_adjustment. The timecounter
frequency of a timehand only changes when a new timecounter is activated
for the timehand. The th->th_adjustment is only changed by the NTP
second update. The NTP second update is not done for every call of
tc_windup().

Move the code block to recalculate the scaling factor and
the large delta of a timehand to the new helper function
recalculate_scaling_factor_and_large_delta().

Call recalculate_scaling_factor_and_large_delta() when a new timecounter
is activated and a NTP second update occurred.

MFC after:	1 week
 2021-11-16 09:48:22 +01:00
Mark Johnston
e27dc9d6ac timecounter: Lock the timecounter list 
Timecounter registration is dynamic, i.e., there is no requirement that
timecounters must be registered during single-threaded boot.  Loadable
drivers may in principle register timecounters (which can be switched to
automatically).  Timecounters cannot be unregistered, though this could
be implemented.

Registered timecounters belong to a global linked list.  Add a mutex to
synchronize insertions and the traversals done by (mpsafe) sysctl
handlers.  No functional change intended.

Reviewed by:	imp, kib
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D32511
 2021-11-16 09:48:22 +01:00
Mark Johnston
f03147f172 timecounter: Let kern.timecounter.stepwarnings be set as a tunable 
MFC after:	1 week
 2021-11-16 09:48:22 +01:00
Ed Maste
fc06357840 Remove "All Rights Reserved" from 
FreeBSD Foundation sys/ copyrights

These ones were unambiguous cases where the Foundation was the only
listed copyright holder (in the associated license block).

Sponsored by:	The FreeBSD Foundation
 2021-11-16 09:48:22 +01:00
Warner Losh
1ca98b274b kern: clarify boot time 
In FreeBSD, the current time is computed from uptime + boottime. Uptime
is a continuous, smooth function that's monotonically increasing. To
effect changes to the current time, boottime is adjusted.  boottime is
mutable and shouldn't be cached against future need. Document the
current implementation, with the caveat that we may stop stepping
boottime on resume in the future and will step uptime instead (noted in
the commit message, but not in the code).

Sponsored by:		Netflix
Reviewed by:		phk, rpokala
Differential Revision:	https://reviews.freebsd.org/D30116
 2021-11-16 09:48:22 +01:00
Konstantin Belousov
2cf37001fc Make kern.timecounter.hardware tunable 
Noted and reviewed by:	kevans
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D29122
 2021-11-16 09:48:22 +01:00
Konstantin Belousov
c3fc52ec06 Add ddb 'show timecounter' command. 
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
 2021-11-16 09:48:22 +01:00
Robert Watson
512e0b59af Changes that improve DTrace FBT reliability 
on freebsd/arm64:

- Implement a dtrace_getnanouptime(), matching the existing
  dtrace_getnanotime(), to avoid DTrace calling out to a potentially
  instrumentable function.

  (These should probably both be under KDTRACE_HOOKS.  Also, it's not clear
  to me that they are correct implementations for the DTrace thread time
  functions they are used in .. fixes for another commit.)

- Don't allow FBT to instrument functions involved in EL1 exception handling
  that are involved in FBT trap processing: handle_el1h_sync() and
  do_el1h_sync().

- Don't allow FBT to instrument DDB and KDB functions, as that makes it
  rather harder to debug FBT problems.

Prior to these changes, use of FBT on FreeBSD/arm64 rapidly led to kernel
panics due to recursion in DTrace.

Reliable FBT on FreeBSD/arm64 is reliant on another change from @andrew to
have the aarch64 instrumentor more carefully check that instructions it
replaces are against the stack pointer, which can otherwise lead to memory
corruption.  That change remains under review.

MFC after:	2 weeks
Reviewed by:	andrew, kp, markj (earlier version), jrtc27 (earlier version)
Differential revision:	https://reviews.freebsd.org/D27766
 2021-11-16 09:48:22 +01:00
Konstantin Belousov
62c428f241 Remove double-calls to tc_get_timecount() 
to warm timecounters.

It seems that second call does not add any useful state change for all
implemented timecounters.

Discussed with:	bde
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
 2021-11-16 09:48:22 +01:00
Pawel Biernacki
eb909371c7 Mark more nodes as CTLFLAG_MPSAFE 
or CTLFLAG_NEEDGIANT (17 of many)

r357614 added CTLFLAG_NEEDGIANT to make it easier to find nodes that are
still not MPSAFE (or already are but aren’t properly marked).
Use it in preparation for a general review of all nodes.

This is non-functional change that adds annotations to SYSCTL_NODE and
SYSCTL_PROC nodes using one of the soon-to-be-required flags.

Mark all obvious cases as MPSAFE.  All entries that haven't been marked
as MPSAFE before are by default marked as NEEDGIANT

Approved by:	kib (mentor, blanket)
Commented by:	kib, gallatin, melifaro
Differential Revision:	https://reviews.freebsd.org/D23718
 2021-11-16 09:48:22 +01:00
Konstantin Belousov
166a80c3d8 Consolidate read code for timecounters 
and fix possible overflow in bintime()/binuptime().

The algorithm to read the consistent snapshot of current timehand is
repeated in each accessor, including the details proper rollup
detection and synchronization with the writer.  In fact there are only
two different kind of readers: one for bintime()/binuptime() which has
to do the in-place calculation, and another kind which fetches some
member from struct timehand.

Extract the logic into type-checked macros, GETTHBINTIME() for bintime
calculation, and GETTHMEMBER() for safe read of a structure' member.
This way, the synchronization is only written in bintime_off() and
getthmember().

In bintime_off(), use overflow-safe calculation of th_scale *
delta(timecounter).  In tc_windup, pre-calculate the min delta value
which overflows and require slow algorithm, into the new timehands
th_large_delta member.

This part with overflow fix was written by Bruce Evans.

Reported by:	Mark Millard <marklmi@yahoo.com> (the overflow issue)
Tested by:	pho
Discussed with:	emaste
Sponsored by:	The FreeBSD Foundation (kib)
MFC after:	3 weeks
 2021-11-16 09:48:22 +01:00
Mateusz Guzik
265c2e620b Remove duplicated empty lines from kern/*.c 
No functional changes.
 2021-11-16 09:48:22 +01:00
Konstantin Belousov
bc9c0e00cc Initialize timehands linkage much earlier. 
Reported and tested by:	trasz
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
 2021-11-16 09:48:22 +01:00
Konstantin Belousov
402dafa495 Make timehands count selectable at boottime. 
Tested by:	O'Connor, Daniel <darius@dons.net.au>
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D21563

This patch was modified by Sebastian Huber
<sebastian.huber@embedded-brains.de> to adjust it for RTEMS.  See
comment in the patch.
 2021-11-16 09:48:22 +01:00
Olivier Houchard
a9ce44bf8f Instead of using an incomplete list of platforms 
that uses 64bits time_t in 32bits mode, special case amd64, as i386 is
the only arch that still uses 32bits time_t.
 2021-11-16 09:48:22 +01:00
Andrew Turner
975ecc1702 Create a new macro for static DPCPU data. 
On arm64 (and possible other architectures) we are unable to use static
DPCPU data in kernel modules. This is because the compiler will generate
PC-relative accesses, however the runtime-linker expects to be able to
relocate these.

In preparation to fix this create two macros depending on if the data is
global or static.

Reviewed by:	bz, emaste, markj
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D16140
 2021-11-16 09:48:22 +01:00
Mateusz Guzik
f43beb03c2 tc: bcopy -> memcpy 2021-11-16 09:48:22 +01:00
Brooks Davis
c54b13b072 Move most of the contents of opt_compat.h 
to opt_global.h.

opt_compat.h is mentioned in nearly 180 files. In-progress network
driver compabibility improvements may add over 100 more so this is
closer to "just about everywhere" than "only some files" per the
guidance in sys/conf/options.

Keep COMPAT_LINUX32 in opt_compat.h as it is confined to a subset of
sys/compat/linux/*.c.  A fake _COMPAT_LINUX option ensure opt_compat.h
is created on all architectures.

Move COMPAT_LINUXKPI to opt_dontuse.h as it is only used to control the
set of compiled files.

Reviewed by:	kib, cem, jhb, jtl
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D14941
 2021-11-16 09:48:22 +01:00
Sebastian Huber
f77b692e5c score: Remove FreeBSD identifier 2021-11-16 09:48:22 +01:00
Konstantin Belousov
7d3712fb26 Use atomic_load(9) to read ppsinfo sequence numbers. 
In this case volatile qualifiers enusre that a compiler does not
optimize the accesses out.

Reviewed by:	alc, jhb
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D13534
 2021-11-16 09:48:22 +01:00
Pedro F. Giffuni
73b77be719 SPDX: use the Beerware identifier. 2021-11-16 09:48:22 +01:00
Sebastian Huber
d5649e25f3 kern_tc.c: Remove unused code 
This fix relates to a Coverity issue (PW.DECLARED_BUT_NOT_REFERENCED).
 2021-11-16 09:48:22 +01:00
Joel Sherrill
c8a1060988 Add support for IDLE Thread stack allocator 
Add a stack allocator hook specifically for allocation of IDLE thread stacks.
This allows the user to decide if IDLE thread stacks are statically allocated
or handled by the same custom allocator mechanism as other thread stacks.

Closes #4520.
 2021-10-07 10:31:38 -05:00
Chris Johns
99698fb5a2 powerpc/motorola_powerpc: Map LibBSD bus space to the PCI base address 
Closes #4516
 2021-09-22 10:58:14 +10:00
Chris Johns
cfef84a007 powerpc/io: Make [out/in] le and be calls conditional 
- These calls clash with the Linux IO header in LibBSD. Making these
  conditional here means BSPs build and the imported Linux header is
  untouched.

Updates #4245
 2021-09-22 10:58:14 +10:00
Ryan Long
e9712e7890 pxcdevctl: Adjust for standard (5 branch) 
psxdevctl is supposed to return the value in errno. Before, it was
returning -1 and setting errno. Changed the tests to reflect these
changes. Added code from RRADE's posix_devctl.c.

Closes #4505
 2021-09-20 13:48:14 -05:00
Sebastian Huber
ff94ddcd84 rtems: Initialize count of postponed jobs 
The rtems_rate_monotonic_get_status() directive returns an arbitrary
number for the count of postponed jobs if it is called for a newly
created period object.  Set the count of postponed jobs to zero during
object creation.

Close #4512.
 2021-09-09 15:17:50 +02:00
Gedare Bloom
e5a1b15848 m68k/uC5282: linkcmds KEEP and SORT sections 
Fixes a problem with bad epilog code in _fini and to keep sections
necessary with the -ffunction/data-sections.

Closes #4465.
 2021-07-01 12:53:50 -06:00
Jan Sommer
4925ab4f52 bsps/i386: Update calibration of TSC to be more accurate 
Closes #4456
 2021-06-21 10:13:37 +02:00
Sebastian Huber
8d4382ba34 bsps/irq: Change license to BSD-2-Clause 
Change license to BSD-2-Clause according to file history and
re-licensing agreement.

Update #3053.
 2021-06-21 10:12:26 +02:00
Christian Mauderer
50a835393a cpukit: Add description of release version numbers 
The release version in the git sources doesn't change. Add a note why
that is the case.
 2021-05-28 08:24:05 +02:00
Sebastian Huber
06427c8df4 rtems: Check entry point in rtems_task_start() 
Close #4409.
 2021-05-14 09:22:17 +02:00
Sebastian Huber
d697769d46 bsps/arm: ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX 
Change the ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX value to be in line
with the workspace entry in ARMV7_CP15_START_DEFAULT_SECTIONS.

Close #4394.
 2021-04-29 13:39:36 +02:00
Moyano, Gabriel
bc806d41a5 grlib/genirq: Taking into account that it could be more than one ISR enabled/disabled 
Closes #4385
 2021-04-16 08:49:54 +02:00
Christian Mauderer
a274b6fdcb shell: Add i2c and spi commands 
This adds some commands that are usefull for debugging simple serial
interfaces.

Even if they are a complete re-implementation, the i2c* commands use a
simmilar call like the Linux i2c tools.

Closes #4371
 2021-03-31 10:43:48 +02:00
Jan Sommer
ec2660548e bsps/xilinx_zynq: Add Xilinx AXI SPI driver to build 
Closes #4370
 2021-03-31 10:22:42 +02:00
Jan Sommer
ce2b276803 bsps/xilinx_zynq: Add SPI driver for xilinx-axi-spi 
Updates #4370
 2021-03-31 10:15:49 +02:00
Jan Sommer
14e74e4312 bsps/xilinx_zynq: Add cadence SPI driver to build system 
Closes #4369
 2021-03-31 10:02:00 +02:00
Jan Sommer
c86d513664 bsps/xilinx_zynq: Add SPI driver for cadence-spi 
Updates #4369
 2021-03-31 10:00:12 +02:00
G S Niteesh Babu
08f807e64a rtems-fdt/rtems-fdt.c: Fix bug in loop termination 
The while loop, loops infinitely in case of raw FDT data.
The loop condition (size) is not modified during iterations.

Fixes #4350
 2021-03-21 12:39:14 +01:00
Sebastian Huber
3a66586c9e rtems: Allow RTEMS_PRIORITY for MrsP semaphores 
In order to improve the compatibility of RTEMS 5.2 with future version
of RTEMS which fixed #4346 allow MrsP semaphores to be created with
RTEMS_PRIORITY.

Close #4347.
 2021-03-16 15:00:08 +01:00
Jan Sommer
645dbc5fcc bsps/shared: Allow setting baud rate for zynq uart 
Closes #4236
 2021-03-09 09:28:43 +01:00
Kinsey Moore
2f323700b9 zynq-uart: Fix set_attributes implementation 
The zynq-uart set_attributes implementation was configured to always
return false which causes spconsole01 to fail. This restores the
disabled implementation which sets the baud rate registers
appropriately and allows spconsole01 to pass. This also expands the
set_attributes functionality to allow setting of the stop bits,
character width, and parity.

Updates #4236
 2021-03-09 09:28:43 +01:00
Daniel Hellstrom
2497a46a76 sparc,leon: avoid triggering LEON3FT errata TN-0009 
Update #4154.
 2021-03-07 16:08:27 +01:00
Daniel Hellstrom
3074eb0f37 sparc,leon: avoid triggering TN-0009 bad sequence 
Update #4154.
 2021-03-07 16:08:26 +01:00
Daniel Hellstrom
291267113b grlib,grspw_pkt: correct link state enum numbering 
Not used by the driver itself, but shuold be correct if used by
application.

Update #4316.
 2021-03-07 16:08:26 +01:00
Martin Aberg
8cfaa0eb76 leon, l2cache: prevent unused diagnostic access 
Update #4315.
 2021-03-07 16:08:26 +01:00
Martin Aberg
b0eb952427 leon, ahbstat: register definitions for AHBSTAT version 1 
Update #4314.
 2021-03-07 16:08:26 +01:00
Martin Aberg
1161e1fb92 leon, grspw_router: added router_port_link_div() 
Allows user to set SpaceWire run clock divisor for an individual port.

Update #4313.
 2021-03-07 16:08:26 +01:00
Daniel Hellstrom
d9d96f0608 sparc: fix bad register alignment for 64 bit store 
Update #4311.
 2021-03-07 16:08:25 +01:00
Daniel Hellstrom
cb8379dc09 leon: restart and load timer counter at initialization 
Without this smp05 and smpthreadlife01 tests may fail
depending on how the boot loader initialized the GPTIMER.
Before the time counter stopped counting when reaching
zero, but tests could work since it could take 2^32 us
before stopping.

The timer driver will potentially overwrite this, but it
happens later due to the initialization order having
RTEMS_SYSINIT_CPU_COUNTER very early.

Update #4312.
 2021-03-07 16:08:25 +01:00
Daniel Hellstrom
81e4a15b18 leon,ckinit: avoid assuming 1MHz timer pre-scaler clock 
Update #4310.
 2021-03-07 16:08:25 +01:00
Daniel Hellstrom
0ed294b6cc leon3: avoid dependency on apbuart/timer driver 
Moves drvmgr_drivers[] from amba.c to a separate file in order
to avoid the dependecy on APBUART/GPTIMER drivers. This has
an effect when user configured not to use timer or uart
in their project.

Update #4309.
 2021-03-07 16:08:25 +01:00
Daniel Hellstrom
c13205f691 leon,greth: added support for variable sized descriptor table sizes 
The descriptor table size is equal to its alignment and set when
configuring the HW IP through VHDL generics. This SW patch simply
probes the HW how large the RX/TX descriptor tables are and adjusts
accordingly.

The number of descriptors actual used are controlled by other
settings (rxDescs and txDescs) controlled by the user.

Update #4308.
 2021-03-07 16:08:25 +01:00
Daniel Hellstrom
23cc5a6090 leon,grcan: split out GRCAN non-FD specific support in separate file 
Update #4307.
 2021-03-07 16:08:24 +01:00
Daniel Hellstrom
e180f281ab leon,grcanfd: split out GRCANFD specific support in separate file 
Update #4307.
 2021-03-07 16:08:24 +01:00
Daniel Hellstrom
c41e7bae9c leon,grcan: added support for GRCANFD 
The new GRCAN_FD IP supports CAN FD standard and is mostly backwards
compatible with GRCAN SW interface. The GRCAN driver have been extended
to support the GRCANFD IP using the same driver.

Additional functions have been added that uses a new CAN FD frame
format and read/write/baud-rate functions that supports both GRCANFD
and GRCAN. To keep the SW API fully backwards compatible with GRCAN,
the old functions remain.

Update #4307.
 2021-03-07 16:08:24 +01:00
Daniel Hellstrom
e1062fae3c grlib: added 64-bit read no-cache function 
Update #4307.
 2021-03-07 16:08:24 +01:00
Daniel Hellstrom
7db032cf02 leon,occan: use common CAN baud-rate calculation routine 
Update #4306.
 2021-03-07 16:08:24 +01:00
Daniel Hellstrom
78b45cc561 leon,grcan: use common CAN baud-rate calculation routine 
Update #4306.
 2021-03-07 16:08:23 +01:00
Daniel Hellstrom
da7cb87b4d leon,can: introduce common CAN baud-rate calculation function 
Reimplemented the baud-rate algorithm from scratch to cope with
GRCAN, GRCANFD and OC_CAN devices.

Update #4306.
 2021-03-07 16:08:23 +01:00
Daniel Hellstrom
0ab993b04a grlib,ambapp: added new IP core IDs 
Update #4305.
 2021-03-07 16:08:23 +01:00
Daniel Hellstrom
84fb340ac4 leon,grspw: fix for SET_PACKET_SIZE 
When the DMA table has been allocated dynamically, the IOCTL_SET_PACKETSIZE
will trigger an issue where pDev->rx and pDev->tx are not updated with
the new DMA tables base address. Instead the old pointers are used.

There is no point in reallocting the DMA tables because there is no
configuration option to it. Therefore the DMA tables allocation is
moved to a separate function never called from SET_PACKETSIZE.

Update #4304.
 2021-03-07 16:08:23 +01:00
Arvid Bjorkengren
8004ffb649 leon,gr1553b: Only align allocated memory. Verify alignment of memory. 
Update #4303.
 2021-03-07 16:08:23 +01:00
Arvid Bjorkengren
14fcf38891 leon,gr1553b: set codec version 
This is enables the updated codec for GR740 and is backwards compatible
with all other versions of the IP.

Updates #4275.
 2021-03-07 16:08:22 +01:00
Arvid Bjorkengren
1223f5e402 leon,gr1553rt: Fixed spinlock unlock 
Update #4274.
 2021-03-07 16:08:22 +01:00
Arvid Bjorkengren
a97a4732f7 leon,gr1553rt: Fixed memory leak 
Update #4274.
 2021-03-07 16:08:22 +01:00
Daniel Cederman
980cdb82a7 sparc: Remove sequences that the B2BST scan script warns about 
Update #4154.
 2021-03-07 16:08:22 +01:00
Vijay Kumar Banerjee
f4d00aa538 powerpc/beatnik/net: Remove unused files 
Close #4293
 2021-03-03 19:45:00 -07:00
Chris Johns
d1bab986ca powerpc/motorola_power: Place any common data in the .bss section 
- It seems the compiler how defaults to -fcommon and this means
  some uninitialised data is ignored.

Closes #4266
 2021-02-27 10:59:25 +11:00
Chris Johns
3824960f24 powerpc/motorola_power: Link all text sections into the executable image 
- The change to building all code with code and data sections means
  we have a section per function. Make sure all functions are
  placed in the text section.

Closes #4266
 2021-02-24 17:04:36 +11:00
Chris Johns
2f56b7375a Update motorola_power to irq-generic interrupt management 
- Add support to the BSP to enable irq-generic management

- Update the powerpc shared irq code to support irq-generic. This
  is an opt in option for existing powerpc bsps. This change
  should be simpler now

- Fix a number of issues in ISA IRQ controller handling by porting
  fixes from the i386 (PC) BSP

Closes #4247
Closes #4248
 2021-02-16 15:24:33 +11:00
Chris Johns
388bd8054c bsp/motorola_powerp: Print RTEMS_VERSION from the bootloader 
Close #4234
 2021-02-10 17:35:30 +11:00
Chris Johns
6d9843e189 powerpc/shared: ISA bus bridge fails to enable the openpic irq 
- The call to enable the openpic irq for the ISA bridge fails
  because the IRQ used is offset by the ISA bus signals and
  the openpic call expects an IRQ relative to its signals.

- Add the MVME 2600/2700 to the list of boards with an ISA bridge.

Closes #4233
 2021-02-08 09:43:48 +11:00
Sebastian Huber
ef1ac8afff score: Add barrier thread queue operations 
This fixes a missing decrement of the number of waiting threads during a
barrier wait timeout.

Close #4232.
 2021-02-06 21:06:10 +01:00
Sebastian Huber
cc2a237129 score: Make FIFO thread queue ops public 
Update #4232.
 2021-02-06 21:06:05 +01:00
Sebastian Huber
5861e42567 score: Constify Thread_queue_First_operation 
Update #4232.
 2021-02-06 21:05:58 +01:00
Sebastian Huber
5ae7ec9477 Fix RTEMS_LINKER_ROSET_ITEM_ORDERED_DECLARE() 
Add "extern" similar to RTEMS_LINKER_RWSET_ITEM_ORDERED_DECLARE().

Close #4224.
 2021-01-25 06:46:09 +01:00
Christian Mauderer
0d44334ca1 bsp/imx: Fix system counter init for imx6 
For i.MX7 U-Boot initializes the system counter. On i.MX6 Barebox is
often used which doesn't initialize the counter. With this patch, we try
to auto-detect whether the counter is initialized or not and do the
initialization ourself if necessary.

Closes #4220
 2021-01-21 10:29:15 +01:00
Sebastian Huber
2a8f755107 bsps/arm: Fix MMU configuration 
Update #4185.
 2020-12-15 11:26:43 +01:00
Jan Sommer
21ed8d11c5 bsps/arm: Fix MMU small pages support 
- For small tables only round to the next 4kiB instead of 1MiB

Close #4185.
 2020-12-11 06:55:18 +01:00
Sebastian Huber
dedc3e1d49 rtems: Improve rtems_interrupt_server_create() 
Also start interrupt server tasks on processors which do not have a
scheduler.  Applications may dynamically manage processors using
rtems_scheduler_remove_processor() and rtems_scheduler_add_processor().

Close #4190.
 2020-11-25 08:32:24 +01:00
Sebastian Huber
1dbdf94e67 bsps: Fix rtems_interrupt_server_delete() 
The ISR lock must be destroyed to prevent memory corruption if RTEMS_PROFILING
and RTEMS_SMP is enabled.

Close #4189.
 2020-11-25 08:25:02 +01:00
Christian Mauderer
0af682cf5d bsp/atsam: Fix XDMAD status 
In "bsp/atsam: Simplify XDMAD_Handler()" (5f813694f6) the interrupt
callback has been made unconditional. That allowed to avoid some special
deadlock situations in error cases. But it removed part of the XDMAD
status handling.

This patch adds the ability to update the XDMAD status from the
callback if that is necessary for the driver.

Fixes #4172
 2020-11-12 08:31:41 +01:00
Jan Sommer
f84c4a5b81 confdefs: Add extern C guards to libpci.h 
Closes #4169
 2020-10-30 13:21:46 +11:00
Chris Johns
7021c01464 libfs/rfs: Check search bit map end on last bit 
- Do not write past the last location of the search bit map
  whe nit is being created.

Closes #4149
 2020-10-17 10:55:30 +11:00
Sebastian Huber
e71e271ce1 bsps/arm: Add workaround for Errata 794072 
Add a workaround for Cortex-A9 Errata 845369: A short loop including a DMB
instruction might cause a denial of service on another which executes a CP15
broadcast operation.

Close #4114.
 2020-10-16 06:41:32 +02:00
Sebastian Huber
3d7da43562 bsps/arm: Workaround for Errata 845369 
Add a workaround for Cortex-A9 Errata 845369: Under Very Rare Timing
Circumstances Transition into Streaming Mode Might Create Data Corruption.

Update #4114.
 2020-10-16 06:41:27 +02:00
Gedare Bloom
40f23ceae6 i386/score: fix assembly mnemonic 
This is a backport for assembler error observed in 6. Although the
assembler error does not appear in 5, the backport was requested.

Closes #4083.
 2020-10-02 10:38:49 -06:00
Ryan Long
fdbe9b7599 rtems-bsps: add ability to print architecture/bsp list 
Closes #4099.
 2020-09-29 07:59:31 -05:00
Frank Kühndel
18549295be Fixing bug in line editing of the shell with CTRL-U. 
This patch fixes a tiny bug in the command line editing of the RTEMS shell.
Typing CTRL-U in the shell should remove all characters left of the cursor.
After pressing CTRL-U, the current implementation does wrongly place the cursor
at the end of the line instead at its beginning.

To reproduce the bug, start the shell and type 'abc123' (no <RETURN>):

> ~/src/rtems $ qemu-system-arm -net none -nographic -M realview-pbx-a9 \
  -m 256M -kernel build/arm/realview_pbx_a9_qemu/testsuites/libtests/dl10.exe
> *** BEGIN OF TEST libdl (RTL) 10 ***
> *** TEST VERSION: 6.0.0.d9bdf166644f612dd628fe4951c12c6f8e94ba5f
> *** TEST STATE: USER_INPUT
> *** TEST BUILD: RTEMS_DEBUG RTEMS_NETWORKING RTEMS_POSIX_API RTEMS_SMP
> *** TEST TOOLS: 10.2.1 20200904 \
  (RTEMS 6, RSB 31f936a7b74d60bda609a9960c6e1a705ba54974, Newlib a0d7982)
> RTL (libdl) commands: dl, rtl
>
> RTEMS Shell on /dev/foobar. Use 'help' to list commands.
> SHLL [/] # abc123

Then move the cursor onto the '1' by hitting three times the <ARROW-LEFT> key.
Next type <CTRL>-U:

> SHLL [/] # 123

Note that the cursor is at the end of the line (after '3') instead of correctly
at the beginning (on the '1'), now.

Continuing typing 'echo ' incorrectly results in the output:

> SHLL [/] # 123echo 123

The patch changes this behavior so that the cursor in the second last step will
be on the '1' and typing 'echo ' will then correctly reflected as:

> SHLL [/] # echo 123

Close #4096.
 2020-09-28 14:20:35 +02:00
Jan Sommer
b11745148d bsps/pc386: Add missing license header 
Closes #4902.
 2020-09-23 08:24:05 -05:00
Jan Sommer
61ccb9c05d bsp/xilinx-zynq: Flush TX-Buffer before initializing uart 
Closes #4055
Closes #4056
 2020-08-22 17:30:12 +10:00
Sebastian Huber
7661402bc2 confdefs: Fix cyclic dependency 
Close #4060.
 2020-08-21 20:02:35 +02:00
Chris Johns
5284e812e2 powerpc/io: The eieio() function clashes with FreeBSD. Change. 
Closes #4021
 2020-08-12 13:02:14 +10:00
Kinsey Moore
e95c00a79e posix: Only check shm_unlink obj_err if necessary 
In the nominal case checked by spsysinit01, obj_err is unmodified if
_POSIX_Shm_Get_by_name returns non-NULL. In the case of shm_unlink, this means
an uninitialized value is passed into the switch and it appears tests using it
were passing by virtue of the stack having the right value on it in most cases.
This now checks obj_err only if _POSIX_Shm_Get_by_name returns NULL.

Close #4016
 2020-08-11 07:48:19 -05:00
Chris Johns
95036a4591 shell: Only clear std handles when the shell task exits 
Clearing the std file handles when the main loop exited crashes
telnetd as it reuses its session threads.

Closes #3859
 2020-08-08 18:07:32 +10:00
Sebastian Huber
534f9dbe13 arm/atsam: Make interrupt server configurable 
The external UART over SPI device SC16IS752 uses the interrupt server
for interrupt processing. The interrupt server is also heavily used by
libbsd. The interrupt processing for the SC16IS752 is time critical and
doesn't work if network traffic is processed at the same priority.
With #4033 custom interrupt servers are available. Change
atsam_sc16is752_spi_create() to support user-defined interrupt servers.
Introduced atsam_sc16is752_spi_config to cut down the argument count of
this function.

Close #4038.
 2020-08-05 06:59:10 +02:00
Christian Mauderer
4a2ac5ef8d dosfs: Fix memory leak on failed mounts. 
Currently if mount fails, a converter isn't destroyed. We have to take
care of two cases:

1. The user doesn't provide a converter.

In this case mounting a dosfs creates a default converter. This patch
makes sure that the converter is destroyed again if mount failes for
this case.

2. The user provides a converter.

In this case it's not sure that the dosfs specific routines are reached
because mount can fail before that. Therefore the user has to destroy
the converter himself again. This patch adds a documentation for that
and implements it in the media server.

Closes #4041.
 2020-08-04 08:26:58 +02:00
Sebastian Huber
5eb0773159 rtems: Add rtems_interrupt_server_create() 
Add rtems_interrupt_server_destroy().

Before this patch, the only way to create interrupt servers was
rtems_interrupt_server_initialize(). This function creates the default
interrupt server and in SMP configurations additional interrupt servers
for the additional processors. The interrupt server is heavily used by
libbsd. This includes the epoch based reclamation which performs time
consuming resource and memory deallocation work. This does not work well
with time critical services, for example an UART over SPI or I2C. One
approach to address this problem is to allow the application to create
custom interrupt servers with the right priority and task properties.
The interrupt server API accounted for this, however, it was not
implemented before this patch.

Close #4033.
 2020-08-03 08:43:45 +02:00
Jan Sommer
849d741832 i386: Fix possible race condition on first context restore 
Make sure that the esp is restored before the eflags register.

When the init task is initially restored, system interrupts are activated when the
eflags register is loaded.
If the esp register still points to an address in the interrupt stack
area (from early system initlization) the ISR might overwrite its own
stack.

Closes #4030
 2020-07-29 11:39:35 +02:00
Jan Sommer
a1f9265c03 bsps/pc386: Fix IPI for non-consecutive APICIDs 
- properly use the cpu <-> apic maps for IPIs

Closes #4028.
 2020-07-16 08:08:09 -05:00
12002 changed files with 396192 additions and 2135056 deletions
Expand all files Collapse all files

10
.gitignore vendored
View File

@@ -1,6 +1,6 @@
/build
aclocal.m4
autom4te.cache
configure
config.h.in
Makefile.in
doc
/*.ini
.lock*
*.pyc
.waf*

261
CODEOWNERS
View File

@@ -1,261 +0,0 @@
# Please keep users, directories and files sorted alphabetically.
# Directories first
#
# If there is more than 1 user in a section it must be promoted to a group in
# /approvers
[General Maintainer] @approvers/general/maintainer
*
[Documentation] @approvers/docs
*/README
*.md
*.rst
*.txt
# CPUKit
########
[CPUKit libdebugger] @approvers/cpukit/libdebugger
/cpukit/libdebugger
[CPUKit libdl] @approvers/cpukit/libdl
/cpukit/libdl
[CPUKit libdrvmgr] @approvers/cpukit/libdrvmgr
/cpukit/libdrvmgr
[CPUKit libgnat] @joel
/cpukit/libgnat
[CPUKit librtemscxx] @approvers/cpukit/librtemscxx
/cpukit/librtemscxx
[CPUKit libstdthreads] @approvers/cpukit/libstdthreads
/cpukit/libstdthreads
# Architectures
###############
[Arch AArch64] @approvers/arch/aarch64
/bsps/aarch64/
/cpukit/score/cpu/aarch64/
/spec/build/bsps/aarch64/
/cpukit/libdebugger/rtems-debugger-aarch64.v
/cpukit/libdl/rtl-mdreloc-aarch64.c
/spec/build/cpukit/*aarch64.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch ARM] @approvers/arch/arm
/bsps/arm/
/bsps/include/arm/
/bsps/include/xil/arm/
/bsps/shared/freebsd/sys/arm/
/bsps/shared/xil/arm/
/cpukit/score/cpu/arm/
/spec/build/bsps/arm/
/cpukit/libdebugger/rtems-debugger-arm.c
/cpukit/libdl/*arm*
/spec/build/cpukit/*arm.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Blackfin] @approvers/arch/bfin
/bsps/bfin/
/cpukit/score/cpu/bfin/
/spec/build/bsps/bfin/
/cpukit/libdl/rtl-mdreloc-bfin.c
/spec/build/cpukit/cpubfin.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch i386] @approvers/arch/i386
/bsps/i386/
/cpukit/score/cpu/i386/
/spec/build/bsps/i386/
/cpukit/libdebugger/rtems-debugger-i386.c
/cpukit/libdl/rtl-mdreloc-i386.c
/spec/build/cpukit/*i386*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch LatticeMico32] @approvers/arch/lm32
/bsps/lm32/
/cpukit/score/cpu/lm32/
/spec/build/bsps/lm32/
/cpukit/libdl/rtl-mdreloc-lm32.c
/spec/build/cpukit/cpulm32.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Motorola 68000] @approvers/arch/m68k
/bsps/m68k/
/cpukit/score/cpu/m68k/
/spec/build/bsps/m68k/
/cpukit/libdl/rtl-mdreloc-m68k.c
/spec/build/cpukit/*m68k*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch MicroBlaze] @approvers/arch/microblaze
/bsps/include/xil/microblaze/
/bsps/microblaze/
/cpukit/score/cpu/microblaze/
/spec/build/bsps/microblaze/
/cpukit/libdebugger/rtems-debugger-microblaze.c
/cpukit/libdl/rtl-mdreloc-microblaze.c
/spec/build/cpukit/*microblaze*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch MIPS] @approvers/arch/mips
/bsps/mips/
/cpukit/score/cpu/mips/
/spec/build/bsps/mips/
/cpukit/libdl/rtl-mdreloc-mips.c
/spec/build/cpukit/*mips.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Moxie] @approvers/arch/moxie
/bsps/moxie/
/cpukit/score/cpu/moxie/
/spec/build/bsps/moxie/
/cpukit/libdl/rtl-mdreloc-moxie.c
/spec/build/cpukit/*moxie.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Nios II] @approvers/arch/nios2
/bsps/nios2/
/cpukit/score/cpu/nios2/
/spec/build/bsps/nios2/
/spec/build/cpukit/*nios2.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch OpenRISC 1000] @approvers/arch/or1k
/bsps/or1k/
/cpukit/score/cpu/or1k/
/spec/build/bsps/or1k/
/spec/build/cpukit/*or1k.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch PowerPC] @approvers/arch/powerpc
/bsps/powerpc/
/cpukit/score/cpu/powerpc/
/spec/build/bsps/powerpc/
/cpukit/libdl/rtl-mdreloc-powerpc.c
/spec/build/cpukit/*powerpc.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch RISC-V] @approvers/arch/risc-v
/bsps/riscv
/cpukit/score/cpu/riscv
/spec/build/bsps/riscv
/cpukit/libdl/rtl-mdreloc-riscv.c
/spec/build/cpukit/*riscv.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch SuperH] @approvers/arch/superh
/bsps/sh/
/cpukit/score/cpu/sh/
/spec/build/bsps/sh/
/spec/build/cpukit/cpush.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch SPARC] @approvers/arch/sparc
/bsps/sparc/
/cpukit/score/cpu/sparc/
/spec/build/bsps/sparc/
/spec/build/cpukit/cpusparc.yml
/spec/build/cpukit/objdlsparc.yml
/spec/build/testsuites/validation/bsps/*-sparc-*
/testsuites/validation/bsps/*-sparc-*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch SPARC64] @approvers/arch/sparc64
/bsps/sparc64/
/cpukit/score/cpu/sparc64/
/spec/build/bsps/sparc64/
/spec/build/cpukit/*sparc64.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch V850] @approvers/arch/v850
/bsps/v850/
/cpukit/score/cpu/v850/
/spec/build/bsps/v850/
/cpukit/libdl/rtl-mdreloc-v850.c
/spec/build/cpukit/*v850.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch X86_64] @approvers/arch/x86_64
/bsps/x86_64/
/cpukit/score/cpu/x86_64/
/spec/build/bsps/x86_64/
/spec/build/cpukit/*x8664.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs

9
Doxyfile
View File

@@ -38,7 +38,7 @@ PROJECT_NAME = RTEMS
# could be handy for archiving the generated documentation or if some version
# control system is used.
PROJECT_NUMBER = 6.0.0
PROJECT_NUMBER = 5.0.0
# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a
@@ -812,10 +812,7 @@ WARN_LOGFILE =
# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
# Note: If this tag is empty the current directory is searched.
INPUT = bsps \
cpukit \
testsuites/fstests/tftpfs \
testsuites/validation
INPUT = bsps cpukit
# This tag can be used to specify the character encoding of the source files
# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
@@ -899,7 +896,7 @@ RECURSIVE = YES
# Note that relative paths are relative to the directory from which doxygen is
# run.
EXCLUDE = cpukit/libnetworking cpukit/libfs/src/nfsclient
EXCLUDE = cpukit/libnetworking
# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
# directories that are symbolic links (a Unix file system feature) are excluded

4
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@@ -0,0 +1,4 @@
Building RTEMS
==============
See the documentation referred to in the README.

20
LICENSE Normal file
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@@ -0,0 +1,20 @@
LICENSE INFORMATION
RTEMS is free software; you can redistribute it and/or modify it under
terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version. RTEMS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details. You should have received
a copy of the GNU General Public License along with RTEMS; see
file COPYING. If not, write to the Free Software Foundation, 675
Mass Ave, Cambridge, MA 02139, USA.
As a special exception, including RTEMS header files in a file,
instantiating RTEMS generics or templates, or linking other files
with RTEMS objects to produce an executable application, does not
by itself cause the resulting executable application to be covered
by the GNU General Public License. This exception does not
however invalidate any other reasons why the executable file might be
covered by the GNU Public License.

51
LICENSE.BSD-2-Clause Normal file
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@@ -0,0 +1,51 @@
https://spdx.org/licenses/BSD-2-Clause.html
This license file serves as a template for the license header in files.
You are the copyright holder. Copy the comment below the top of the file in
which you want to use this license for your contribution. Replace the
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The <FIRST NAME> is your first name (also known as given name), the
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If more than one copyright holder exists for a file, then sort the copyright
lines by the first year (earlier years are below later years) followed by the
copyright holder in alphabetical order (A is above B).
You must not alter anything else in the license comment.
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) <FIRST YEAR>, <LAST YEAR> <COPYRIGHT HOLDER>
*
* Redistribution and use in source and binary forms, with or without
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*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/

428
LICENSE.CC-BY-SA-4.0 Normal file
View File

@@ -0,0 +1,428 @@
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LICENSE.GPL-2.0 Normal file
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@@ -0,0 +1,339 @@
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GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:
a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.
b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.
c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.
Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.
In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.
3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:
a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,
b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,
c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)
The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

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LICENSE.JFFS2 Normal file
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The files in this directory and elsewhere which refer to this LICENCE
file are part of JFFS2, the Journalling Flash File System v2.
Copyright © 2001-2007 Red Hat, Inc. and others
JFFS2 is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 or (at your option) any later
version.
JFFS2 is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License along
with JFFS2; if not, write to the Free Software Foundation, Inc.,
59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
As a special exception, if other files instantiate templates or use
macros or inline functions from these files, or you compile these
files and link them with other works to produce a work based on these
files, these files do not by themselves cause the resulting work to be
covered by the GNU General Public License. However the source code for
these files must still be made available in accordance with section (3)
of the GNU General Public License.
This exception does not invalidate any other reasons why a work based on
this file might be covered by the GNU General Public License.

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The RTEMS TCP/IP stack is a port of the FreeBSD TCP/IP stack. The following
copyright and licensing information applies to this code.
This code is found under the c/src/libnetworking directory but does not
constitute the entire contents of that subdirectory.
=============================================================================
Copyright (c) 1980, 1983, 1988, 1993
The Regents of the University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. All advertising materials mentioning features or use of this software
must display the following acknowledgment:
This product includes software developed by the University of
California, Berkeley and its contributors.
4. Neither the name of the University nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGE.
-
Portions Copyright (c) 1993 by Digital Equipment Corporation.
Permission to use, copy, modify, and distribute this software for any
purpose with or without fee is hereby granted, provided that the above
copyright notice and this permission notice appear in all copies, and that
the name of Digital Equipment Corporation not be used in advertising or
publicity pertaining to distribution of the document or software without
specific, written prior permission.
THE SOFTWARE IS PROVIDED "AS IS" AND DIGITAL EQUIPMENT CORP. DISCLAIMS ALL
WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL DIGITAL EQUIPMENT
CORPORATION BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS
ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
SOFTWARE.
=============================================================================

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The RTEMS RPC/XDR support is a port of the freely distributed
Sun Microsystems implementation. The following copyright and
licensing information applies to this code.
This code is in the c/src/librpc directory.
=============================================================================
Copyright (C) 1984, Sun Microsystems, Inc.
Sun RPC is a product of Sun Microsystems, Inc. and is provided for
unrestricted use provided that this legend is included on all tape
media and as a part of the software program in whole or part. Users
may copy or modify Sun RPC without charge, but are not authorized
to license or distribute it to anyone else except as part of a product or
program developed by the user.
SUN RPC IS PROVIDED AS IS WITH NO WARRANTIES OF ANY KIND INCLUDING THE
WARRANTIES OF DESIGN, MERCHANTIBILITY AND FITNESS FOR A PARTICULAR
PURPOSE, OR ARISING FROM A COURSE OF DEALING, USAGE OR TRADE PRACTICE.
Sun RPC is provided with no support and without any obligation on the
part of Sun Microsystems, Inc. to assist in its use, correction,
modification or enhancement.
SUN MICROSYSTEMS, INC. SHALL HAVE NO LIABILITY WITH RESPECT TO THE
INFRINGEMENT OF COPYRIGHTS, TRADE SECRETS OR ANY PATENTS BY SUN RPC
OR ANY PART THEREOF.
In no event will Sun Microsystems, Inc. be liable for any lost revenue
or profits or other special, indirect and consequential damages, even if
Sun has been advised of the possibility of such damages.
Sun Microsystems, Inc.
2550 Garcia Avenue
Mountain View, California 94043
=============================================================================

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65
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Maintainers
===========
This file contains information about people who are permitted to make
changes to RTEMS and its associated components and add-ons. Please do
not contact the people in this file directly to report problems with RTEMS.
For general information about RTEMS, please visit: http://www.rtems.org
To report problems in RTEMS, please visit: http://www.rtems.org/bugs.html
RTEMS is maintained by collection of volunteers. RTEMS is a very
broad and diverse project which requires expertise in many areas.
This breadth of knowledge exceeds the capabilities of any
single person. Each volunteer has areas of expertise where they
are more comfortable but each is capable of making technical
decisions across the entirety of RTEMS.
Blanket Write Privileges are granted to experienced RTEMS developers
who can be trusted to distinguish between changes which require
others to review, require a problem report, or can be safely committed
with limited review.
Write After Approval is granted to experienced but also trusted
RTEMS developers. These developers may be less familiar with
the breadth of RTEMS. Developers with write after approval need
to submit their patches for review. Once the patches have been approved by a
developer with Blanket Write Privileges, the patches may be checked in.
A BSP-specific patch may be checked in three work days after sending it to
devel@rtems.org in case nobody explicitly rejected the patch.
Localized Write Permission is for developers who have primary
responsibility for a port and all associated BSPs, a BSP, or other
specific aspects of RTEMS. These folks are allowed to make changes to
areas they maintain and related documentation, web pages, and test cases
without approval from anyone else, and approve other people's changes
in those areas. They must get approval for changes elsewhere in RTEMS.
Blanket Write Privileges
========================
Jennifer Averett jennifer.averett@OARcorp.com
Thomas Doefler Thomas.Doerfler@embedded-brains.de
Sebastian Huber sebastian.huber@embedded-brains.de
Chris Johns chrisj@rtems.org
Joel Sherrill joel.sherrill@OARcorp.com
Gedare Bloom gedare@rtems.org
Write After Approval
====================
Daniel Hellstrom daniel@gaisler.com
Ben Gras beng@rtems.org
Pavel Pisa ppisa@pikron.com
Christian Mauderer christian.mauderer@embedded-brains.de
Hesham Almatary heshamelmatary@gmail.com
Amaan Cheval amaan@rtems.org
Vijay Kumar Banerjee vijay@rtems.org
Localized Write Permission
==========================
sparc Daniel Hellstrom (daniel@gaisler.com)
beagle Ben Gras (beng@rtems.org)
tms570 Pavel Pisa (pisa@cmp.felk.cvut.cz)
raspberrypi Pavel Pisa (pisa@cmp.felk.cvut.cz)
x86_64 Amaan Cheval (amaan@rtems.org)
beagle Vijay Kumar Banerjee (vijay@rtems.org)

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#
# top level directory for RTEMS build tree
#
ACLOCAL_AMFLAGS = -I aclocal
SUBDIRS = $(build_SUBDIRS) $(host_SUBDIRS) $(target_SUBDIRS)
DIST_SUBDIRS = $(SUBDIRS)
noinst_SCRIPTS = bootstrap
dist-hook:
@files=`(cd $(srcdir); find cpukit c testsuites \
-name configure.ac -print | sed 's,/configure.ac,,' | sort)`; \
for i in $$files; do \
if test -f $(distdir)/$$i/configure.ac; then : ; \
else \
d=`dirname $(distdir)/$$i`; \
$(MKDIR_P) $$d;\
echo "cp -pR $(srcdir)/$$i $(distdir)/$$i"; \
cp -pR $(srcdir)/$$i $(distdir)/$$i; \
fi; \
done
rm -rf `find $(distdir) -name 'autom4te*'`
rm -rf `find $(distdir) -name CVS`
rm -f `find $(distdir) \( -name .cvsignore \
-o -name config.status \
-o -name config.log \)`
rm -f `find $(distdir) \( -name '*.bak' \
-o -name 'changes' -o -name 'diff' -o -name 'tmp' -o -name 'log' \
-o -name '*~' -o -name '.*~' -o -name '.#*' \)`
find $(distdir) -name '*.in' -print | while read a; do \
f=`echo $$a | sed 's,\.in$$,,'`; \
if test -f $$f; then echo "rm $$f"; rm $$f; fi; done
rtems_makedir = $(prefix)/make
dist_rtems_make_DATA =
dist_rtems_make_DATA += make/main.cfg
dist_rtems_make_DATA += make/leaf.cfg
rtems_make_Templatesdir = $(pkgdatadir)/make/Templates
dist_rtems_make_Templates_DATA =
dist_rtems_make_Templates_DATA += make/Templates/Makefile.dir
dist_rtems_make_Templates_DATA += make/Templates/Makefile.leaf
dist_rtems_make_Templates_DATA += make/Templates/Makefile.lib
rtems_make_customdir = $(rtems_makedir)/custom
dist_rtems_make_custom_DATA = make/custom/default.cfg
include $(top_srcdir)/automake/subdirs.am
include $(top_srcdir)/automake/host.am

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#
# Maintainer Makefile
#
# WARNING:
# THIS IS EXPERIMENTAL - DO NOT USE (YET) !
# * This Makefile is only useful to RTEMS maintainers
# * You must have write access to RTEMS CVS
# * Running this Makefile modifies RTEMS CVS
# * Watch out for warning and error messages - Do NOT IGNORE them!
# MAINTAINER notes:
# Cutting a new release:
# 1. Perform a non-anonymous cvs checkout of the BRANCH
# you want to cut a release tarball from
# 2. Run "make -f Makefile.maint new-revision"
# (rsp. "make -f Makefile.maint new-minor").
# 3. Run "make -f Makefile.maint commit"
# 4. Run "make -f Makefile.maint tag"
# 5. Run "make -f Makefile.maint tarball"
# -----------------
# SECURITY: Append a string to tag to avoid accidentially screwing up cvs-tags
# For "hot runs" you will want to use "make -f Makefile.maint TAG_SUFFIX= <command>"
TAG_SUFFIX = -test1
rtems_version := $(shell cat VERSION | sed -n '/.* Version /{s/^.*Version[ ]*\([0-9\.]\+\)/\1/p};')
rtems_tag := $(shell echo "rtems-$(rtems_version)" | tr . -)
rtems_api := 4.10
PATH := /opt/rtems-$(rtems_api)/bin:$(PATH)
# -----------------
# Cleanup check out and cvs-tag the files inside
tag:
cvs -q -z9 up -dP
./bootstrap -p >/dev/null
cvs -q tag -c $(rtems_tag)$(TAG_SUFFIX)
# -----------------
# Different stages of cvs-exporting
rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX):
rm -rf rtems-$(rtems_version)
@cvs -q -z9 export -d rtems-$(rtems_version) -r $(rtems_tag)$(TAG_SUFFIX) rtems
@if ! test -f rtems-$(rtems_version)/VERSION; then \
echo "ERROR export failed"; \
echo " Did you run 'make -f Makefile.maint tag' ?"; exit 1; fi
echo "$(rtems_tag)$(TAG_SUFFIX)" > rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX)
rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2: rtems-$(rtems_version)/stamp.autofiles \
rtems-$(rtems_version)/excludes \
rtems-$(rtems_version)/TOOL_VERSIONS
tar -cj -X rtems-$(rtems_version)/excludes \
-f rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2 rtems-$(rtems_version)
## Touching the top pages in the various manuals results in the date
## on their title page matching the release date.
rtems-$(rtems_version)/stamp.cleanup: rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX)
find rtems-$(rtems_version) -name .cvsignore -exec rm -f {} \;
find rtems-$(rtems_version) -name preinstall.am -exec touch {} \;
rm -rf rtems-$(rtems_version)/contrib
touch rtems-$(rtems_version)/stamp.cleanup
rtems-$(rtems_version)/stamp.autofiles: rtems-$(rtems_version)/stamp.cleanup
cd rtems-$(rtems_version) && ./bootstrap -r
touch rtems-$(rtems_version)/stamp.autofiles
rtems-$(rtems_version)/excludes: Makefile.maint
@echo "Generating $@"
@echo "excludes" > $@
@echo "stamp.*" >> $@
@echo "autom4te.cache" >> $@
@echo "Makefile.maint" >> $@
tarball: rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2
rtems-$(rtems_version)/TOOL_VERSIONS: Makefile.maint
( \
date ; \
echo ; \
echo "This file contains configuration information on the " ; \
echo "primary computer used to test and make the $(rtems_version)" ; \
echo "version of RTEMS" ; \
echo ; \
echo "OS Version: " `head -1 /etc/issue` ; \
echo ; \
echo "The following RTEMS RPMs were installed on the machine" ; \
echo "where this release was made:" ; \
echo ; \
rpm -qa 'rtems-$(rtems_api)-*' | sort | sed -e 's/^/ /' ; \
echo \
) > $@
# -----------------
# Create a new minor release
# increments the 2nd digit of the version number
# set the 3rd digit of the version number to 0
# Example: 4.6.99.4 -> 4.7.0
new-minor:
@v=$$(echo $(rtems_version) | sed 's,^\([0-9]\+\).*,\1,'); \
r=$$(echo $(rtems_version) | sed 's,^[0-9]\+\.\([0-9]\+\).*,\1,'); \
r=$$(($$r + 1)); version="$$v.$$r.0"; \
echo "New minor release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
# Create a new revision release
# increments the last digit of the version number
# Examples: 4.6.99.4 -> 4.6.99.5
# 4.7.0 -> 4.7.1
new-revision:
@m=$$(echo $(rtems_version) | sed 's,^\(.*\)\.[0-9]\+,\1,'); \
n=$$(echo $(rtems_version) | sed 's,^.*\.\([0-9]\+\),\1,'); \
n=$$(($$n + 1)); version="$$m.$$n";\
echo "New revision release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
# -----------------
# Create a new branch
# increments the 2nd digit of the version number
# set the 3rd digit of the version number to 99
# set the 4rd digit of the version number to 0
# Example: 4.6.34.4 -> 4.7.99.0
new-branch:
v=$$(echo $(rtems_version) | sed 's,^\([0-9]\+\).*,\1,'); \
r=$$(echo $(rtems_version) | sed 's,^[0-9]\+\.\([0-9]\+\).*,\1,'); \
r=$$(($$r + 1)); version="$$v.$$r.99.0"; \
api="$$v.$$(($$r + 1))"; \
echo "New branch release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
-e "s|\[_RTEMS_API\],\[.*\]|\[_RTEMS_API\],\[$$api\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
VERSION_FILES += aclocal/version.m4
VERSION_FILES += cpukit/aclocal/version.m4
VERSION_FILES += c/src/aclocal/version.m4
VERSION_FILES += testsuites/aclocal/version.m4
CVS_RUN := $(shell if [ -n "$(TAG_SUFFIX)" ]; then echo "cvs -n"; else echo "cvs"; fi)
commit:
$(CVS_RUN) commit -m "Upgrade to $(rtems_version)" \
$(VERSION_FILES) VERSION
.PHONY: commit new-minor new-revision new-branch tag tarball

57
README Normal file
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@@ -0,0 +1,57 @@
Real-Time Executive for Multiprocessing Systems (RTEMS)
-------------------------------------------------------
RTEMS, Real-Time Executive for Multiprocessor Systems, is a real-time executive
(kernel) which provides a high performance environment for embedded
applications with the following features:
- standards based user interfaces
- multitasking capabilities
- homogeneous and heterogeneous multiprocessor systems
- event-driven, priority-based, preemptive scheduling
- optional rate monotonic scheduling
- intertask communication and synchronization
- priority inheritance
- responsive interrupt management
- dynamic memory allocation
- high level of user configurability
- open source with a friendly user license
Project git repositories are located at https://git.rtems.org/
RTEMS Kernel: : https://git.rtems.org/rtems/
RTEMS Source Builder : https://git.rtems.org/rtems-source-builder/
RTEMS Tools : https://git.rtems.org/rtems-tools/
RTEMS Documentation : https://git.rtems.org/rtems-docs/
RTEMS FreeBSD : https://git.rtems.org/rtems-libbsd/
Online documentation is available at https://docs.rtems.org/
RTEMS User Manual : https://docs.rtems.org/branches/master/user/index.html
RTEMS RSB Manual : https://docs.rtems.org/branches/master/rsb/index.html
RTEMS Classic API : https://docs.rtems.org/branches/master/c-user/index.html
RTEMS POSIX API : https://docs.rtems.org/branches/master/posix-users/index.html
RTEMS Doxygen for CPUKit : https://docs.rtems.org/doxygen/branches/master/
RTEMS POSIX 1003.1 Compliance Guide :
https://docs.rtems.org/branches/master/posix-compliance/index.html
- Details the standards base functionality and profiles RTEMS supportsXo
RTEMS Developers Wiki : http://devel.rtems.org
- Bug reporting, community knowledge and tutorials.
RTEMS Mailing Lists : https://lists.rtems.org/mailman/listinfo
- The RTEMS Project maintains mailing lists which are used for most
discussions:
* For general-purpose questions related to using RTEMS, use the rtems-users
ml: https://lists.rtems.org/mailman/listinfo/users
* For questions and discussion related to development of RTEMS, use the
rtems-devel ml: https://lists.rtems.org/mailman/listinfo/devel
The version number for this software is indicated in the VERSION file.

46
README.md
View File

@@ -1,46 +0,0 @@
Real-Time Executive for Multiprocessing Systems
===============================================
RTEMS is a real-time executive (kernel) which provides a high performance
environment for embedded applications with the following features:
* Standards based user interfaces.
* Multitasking capabilities.
* Homogeneous and heterogeneous multiprocessor systems.
* Event-driven, priority-based, preemptive scheduling.
* Optional rate monotonic scheduling.
* Intertask communication and synchronisation.
* Priority inheritance.
* Responsive interrupt management.
* Dynamic memory allocation.
* High level of user configurability.
* Open source with a friendly user license.
Project git repositories are located at:
* https://gitlab.rtems.org/rtems/
Online documentation is available at:
* https://docs.rtems.org/
RTEMS Doxygen for CPUKit:
* https://docs.rtems.org/doxygen/branches/master/
RTEMS POSIX 1003.1 Compliance Guide:
* https://docs.rtems.org/branches/master/posix-compliance/
RTEMS Mailing Lists for general purpose use the users list and for developers
use the devel list.
* https://lists.rtems.org/mailman/listinfo
The version number for this software is indicated in the VERSION file.

399
acinclude.m4 Normal file
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@@ -0,0 +1,399 @@
## All directories belong in one of 3 categories.
## ${HOST_CONFIGDIRS_LIST} is directories we build using the host tools.
## ${TARGET_CONFIGDIRS_LIST} is directories we build using the target tools.
## ${BUILD_CONFIGDIRS_LIST} is directories we build using the build tools
AC_PREREQ(2.60)
dnl RTEMS_ARG_VAR(VAR,HELP-STRING)
dnl An internal macros to have help strings pretty
dnl printed with configure --help, without letting autoconf spoil config subdir
dnl environments by trying to propagate them
dnl Stripped down version of autoconf-2.52's AC_ARG_VAR.
AC_DEFUN([_RTEMS_ARG_VAR],
[
m4_expand_once([m4_divert_once([HELP_VAR],
[AS_HELP_STRING([$1], [$2], [ ])])],
[$0($1)])dnl
])
AC_DEFUN([_RTEMS_SUBST_IFNOT],
[AS_IF([`echo " [$]$1 " | grep " $2 " > /dev/null`],
[],
[AC_SUBST([$1],["[$]$1 $2"])])
])
AC_DEFUN([_RTEMS_TOOLS],
[
m4_ifdef([_RTEMS_$2_CONFIGDIRS_LIST],
[
_RTEMS_ARG_VAR([CC_FOR_$2],
[c-compiler to be used for $1 subdirs (default: auto-detected)])
_RTEMS_ARG_VAR([CFLAGS_FOR_$2],
[c-flags to be used for $1 subdirs (default: provided by autoconf)])
_RTEMS_ARG_VAR([CXX_FOR_$2],
[c++-compiler to be used for $1 subdirs (default: auto-detected)])
_RTEMS_ARG_VAR([CXXFLAGS_FOR_$2],
[c++-flags to be used for $1 subdirs (default: provided by autoconf)])
])
])
AC_DEFUN([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS],
[
AC_CONFIG_COMMANDS_PRE([
if test -z "${build_alias}"; then
# build_alias is empty
if test -z "${host_alias}"; then
# host_alias is empty
if test -z "${target_alias}"; then
: target_alias is empty
else
: target_alias is not empty
fi
else
# host_alias is not empty
if test -z "${target_alias}"; then
: target_alias is empty
target_alias="${host_alias}"
else
: target_alias is not empty
fi
fi
else
# build_alias is not empty
if test -z "${host_alias}"; then
# host_alias is empty
if test -z "${target_alias}"; then
: target_alias is empty
else
: target_alias is not empty
fi
else
# host_alias is not empty
if test -z "${target_alias}"; then
: target_alias is empty
target_alias="${host_alias}"
else
: target_alias is not empty
fi
fi
fi
_RTEMS_BUILD_CONFIG_PREPARE
_RTEMS_HOST_CONFIG_PREPARE
_RTEMS_TARGET_CONFIG_PREPARE
build_subdir="."
build_SUBDIRS="${build_configdirs}"
build_configdirs="${build_configdirs}"
AS_IF([test $build != $host],
[dnl
host_subdir="${host_alias-$host}"
host_SUBDIRS=`echo "${host_configdirs}" | \
sed -e "s%\([[^ ]][[^ ]]*\)%$host_subdir/\1%g"`
host_configdirs="${host_configdirs}"
],[dnl
host_SUBDIRS="${host_configdirs}"
host_configdirs="${host_configdirs}"
])
AS_IF([test $build != $target],
[dnl
target_subdir="${target_alias-$target}"
target_SUBDIRS=`echo "${target_configdirs}" | \
sed -e "s%\([[^ ]][[^ ]]*\)%$target_subdir/\1%g"`
target_configdirs="${target_configdirs}"
],[dnl
target_SUBDIRS="${target_configdirs}"
target_configdirs="${target_configdirs}"
])
AC_SUBST(host_SUBDIRS)
AC_SUBST(target_SUBDIRS)
AC_SUBST(build_SUBDIRS)
])
AC_CONFIG_COMMANDS_POST([
_RTEMS_OUTPUT_SUBDIRS([build],[BUILD])
_RTEMS_OUTPUT_SUBDIRS([host],[HOST])
_RTEMS_OUTPUT_SUBDIRS([target],[TARGET])
])
])
dnl _RTEMS_SRCPATHS(BUILD-DIR-NAME)
dnl ----------------------------
dnl Inputs:
dnl - BUILD-DIR-NAME is `top-build -> build' and `top-src -> src'
dnl - `$srcdir' is `top-build -> top-src'
dnl
dnl Outputs:
dnl - `ac_builddir' is `.', for symmetry only.
dnl - `ac_top_builddir' is `build -> top_build'.
dnl If not empty, has a trailing slash.
dnl - `ac_srcdir' is `build -> src'.
dnl - `ac_top_srcdir' is `build -> top-src'.
dnl
dnl and `ac_buildpath' etc., the absolute paths.
m4_define([_RTEMS_SRCPATHS],
[
m4_if([$2],,
[dstdir=$1],
[case "$2" in
"." | "" ) # No subdir was given
dstdir=$1;;
* ) # A subdir was given
dstdir=$2/$1;;
esac])
ac_builddir=.
AS_IF([test $dstdir != .],
[ # Strip off leading ./
ac_builddir_suffix=/`echo $dstdir | sed 's,^\.[[\\/]],,'`
ac_srcdir_suffix=/`echo $1 | sed 's,^\.[[\\/]],,'`
# A "../" for each directory in $ac_dir_suffix.
ac_top_builddir=`echo "$ac_builddir_suffix" | sed 's,/[[^\\/]]*,../,g'`
],[
ac_dir_suffix= ac_top_builddir=
])
case $srcdir in
.) # No --srcdir option. We are building in place.
ac_srcdir=.
if test -z "$ac_top_builddir"; then
ac_top_srcdir=.
else
ac_top_srcdir=`echo $ac_top_builddir | sed 's,/$,,'`
fi ;;
[[\\/]]* | ?:[[\\/]]* ) # Absolute path.
ac_srcdir=$srcdir$ac_srcdir_suffix;
ac_top_srcdir=$srcdir;
;;
*) # Relative path.
ac_srcdir=$ac_top_builddir$srcdir$ac_srcdir_suffix;
ac_top_srcdir=$ac_top_builddir$srcdir;
;;
esac
dnl Don't blindly perform a `cd $1/$ac_foo && pwd` since $ac_foo can be
dnl absolute.
ac_buildpath=`cd $dstdir && cd $ac_builddir && pwd`
ac_top_buildpath=`cd $dstdir && cd $ac_top_builddir && pwd`
ac_srcpath=`cd $dstdir && cd $ac_srcdir && pwd`
ac_top_srcpath=`cd $dstdir && cd $ac_top_srcdir && pwd`
])# _AC_SRCPATHS
dnl _RTEMS_OUTPUT_SUBDIRS([host|target|build],[HOST|TARGET|BUILD])
AC_DEFUN([_RTEMS_OUTPUT_SUBDIRS],[
m4_ifdef([_RTEMS_$2_CONFIGDIRS_LIST],
[
if test "$no_recursion" != yes; then
if test -n "${$1_SUBDIRS}"; then
ac_sub_configure_args="[$]$1args"
# Always prepend --prefix to ensure using the same prefix
# in subdir configurations.
ac_sub_configure_args="'--prefix=$prefix' $ac_sub_configure_args"
# make sure that $1_subdir is not empty
test -n "$$1_subdir" || $1_subdir="."
case "$$1_subdir" in
"." ) ;;
* )
ac_sub_configure_args="$ac_sub_configure_args '--with-target-subdir=$$1_subdir'"
ac_sub_configure_args="$ac_sub_configure_args '--exec-prefix=${prefix}/$$1_subdir'"
ac_sub_configure_args="$ac_sub_configure_args '--includedir=${prefix}/$$1_subdir/include'"
;;
esac
ac_popdir=`pwd`
for ac_dir in : $$1_configdirs; do test "x$ac_dir" = x: && continue
# Do not complain, so a configure script can configure whichever
# parts of a large source tree are present.
test -d $srcdir/$ac_dir || continue
AC_MSG_NOTICE([configuring in $$1_subdir/$ac_dir])
AS_MKDIR_P(["$$1_subdir/$ac_dir"])
_RTEMS_SRCPATHS(["$ac_dir"],["$$1_subdir"])
cd $$1_subdir/$ac_dir
# Check for guested configure; otherwise get Cygnus style configure.
if test -f $ac_srcdir/configure.gnu; then
ac_sub_configure="$SHELL '$ac_srcdir/configure.gnu'"
elif test -f $ac_srcdir/configure; then
ac_sub_configure="$SHELL '$ac_srcdir/configure'"
elif test -f $ac_srcdir/configure.in; then
ac_sub_configure=$ac_configure
else
AC_MSG_WARN([no configuration information is in $ac_dir])
ac_sub_configure=
fi
# The recursion is here.
if test -n "$ac_sub_configure"; then
# Make the cache file name correct relative to the subdirectory.
case $cache_file in
[[\\/]]* | ?:[[\\/]]* ) ac_sub_cache_file=$cache_file ;;
*) # Relative path.
ac_sub_cache_file=$ac_top_builddir$cache_file ;;
esac
ac_sub_configure_vars=
ac_sub_configure_vars="$ac_sub_configure_vars '--cache-file=$ac_sub_cache_file'"
ac_sub_configure_vars="$ac_sub_configure_vars '--srcdir=$ac_srcdir'"
test -n "[$]CC_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CC=[$]CC_FOR_$2'"
test -n "[$]CXX_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CXX=[$]CXX_FOR_$2'"
test -n "[$]CFLAGS_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CFLAGS=[$]CFLAGS_FOR_$2'"
test -n "[$]CXXFLAGS_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CXXFLAGS=[$]CXXFLAGS_FOR_$2'"
# The eval makes quoting arguments work.
AC_MSG_NOTICE([running $ac_sub_configure $ac_sub_configure_args $ac_sub_configure_vars])
eval $ac_sub_configure $ac_sub_configure_args $ac_sub_configure_vars ||
AC_MSG_ERROR([$ac_sub_configure failed for $ac_dir])
fi
cd "$ac_popdir"
done
fi
fi
])
])
AC_DEFUN([_RTEMS_CONFIGURE_ARGS_PRUNE],
[
$1_prune()
{
$1=
for ac_arg
do
if test -n "$ac_prev"; then
ac_prev=
continue
fi
case $ac_arg in
-cache-file | --cache-file | --cache-fil | --cache-fi \
| --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
ac_prev=cache_file ;;
-cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
| --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* \
| --c=*)
;;
--config-cache | -C)
;;
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
ac_prev=srcdir ;;
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
;;
-host* | --host* );;
-host | --host )
ac_prev=host_alias;;
-target* | --target* );;
-target | --target )
ac_prev=target_alias;;
-build* | --build* );;
-build | --build )
ac_prev=build_alias;;
-prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
ac_prev=prefix ;;
-prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
;;
*_alias=* );;
m4_if([$2],,,[$2])
*) $1="$$1 '$ac_arg'" ;;
esac
done
export $1
}
])
## PUBLIC: RTEMS_BUILD_CONFIG_SUBDIRS(build_subdir)
# subdirs to be built for the build environment
AC_DEFUN([RTEMS_BUILD_CONFIG_SUBDIRS],[
m4_append([_RTEMS_BUILD_CONFIGDIRS_LIST],[ $1])
dnl Always append to build_configdirs
AC_SUBST(build_configdirs,"$build_configdirs $1")
m4_divert_text([DEFAULTS],
[ac_subdirs_all="$ac_subdirs_all m4_normalize([$1])"])
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
AC_DEFUN([_RTEMS_BUILD_CONFIG_PREPARE],[
## # Record the configure arguments in Makefile.
m4_ifdef([_RTEMS_BUILD_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([build],[BUILD])])
m4_expand_once([_RTEMS_CONFIGURE_ARGS_PRUNE([buildargs])])
eval buildargs_prune $ac_configure_args
buildargs="'--host=${build_alias-$build}' '--build=${build_alias-$build}' ${buildargs}"
buildargs="${buildargs} '--target=${target_alias-$target}'"
],[])
AC_SUBST(buildargs)
AC_SUBST(build_subdir)
])
## PUBLIC: RTEMS_HOST_CONFIG_SUBDIRS(host_subdir)
# subdirs to be build for the host environment
AC_DEFUN([RTEMS_HOST_CONFIG_SUBDIRS],[
m4_append([_RTEMS_HOST_CONFIGDIRS_LIST],[ $1])dnl
_RTEMS_SUBST_IFNOT([host_configdirs],[$1])
m4_divert_text([DEFAULTS],
[ac_subdirs_all="$ac_subdirs_all m4_normalize([$1])"])
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
AC_DEFUN([_RTEMS_HOST_CONFIG_PREPARE],[
m4_ifdef([_RTEMS_HOST_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([host],[HOST])])
m4_expand_once([_RTEMS_CONFIGURE_ARGS_PRUNE([hostargs])])
eval hostargs_prune $ac_configure_args
hostargs="'--host=${host_alias-$host}' '--build=${build_alias-$build}' '--target=${target_alias-$target}' ${hostargs}"
],[])
AC_SUBST(hostargs)
AC_SUBST(host_subdir)
])
## PUBLIC: RTEMS_TARGET_CONFIG_SUBDIRS(target_subdir)
# subdirs to be build for the target environment
AC_DEFUN([RTEMS_TARGET_CONFIG_SUBDIRS],[
AS_IF([test -d ${srcdir}/$1],[
m4_append([_RTEMS_TARGET_CONFIGDIRS_LIST],[ $1])
_RTEMS_SUBST_IFNOT([target_configdirs],[$1])
m4_divert_text([DEFAULTS],
[ac_subdirs_all="$ac_subdirs_all m4_normalize([$1])"])
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
])
AC_DEFUN([_RTEMS_TARGET_CONFIG_PREPARE],[
m4_ifdef([_RTEMS_TARGET_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([target],[TARGET])])
m4_expand_once([_RTEMS_CONFIGURE_ARGS_PRUNE([targetargs])])
eval targetargs_prune $ac_configure_args
targetargs="'--host=${target_alias-$target}' '--build=${build_alias-$build}' '--target=${target_alias-$target}' ${targetargs}"
],[])
AC_SUBST(targetargs)
AC_SUBST(target_subdir)
])

20
aclocal/bsp-alias.m4 Normal file
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@@ -0,0 +1,20 @@
dnl _RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
dnl Internal subroutine to RTEMS_BSP_ALIAS
AC_DEFUN([_RTEMS_BSP_ALIAS],[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])
AC_REQUIRE([RTEMS_SOURCE_TOP])
# account for "aliased" bsps which share source code
for bsp_cfgs in `ls "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}"/*/"config/$1.cfg" 2>/dev/null`; do
$2=`echo "$bsp_cfgs" | sed \
-e "s,^${RTEMS_SOURCE_ROOT}/bsps/$RTEMS_CPU/,," \
-e "s,/config/.*\.cfg$,,"`
break
done
])
dnl RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
dnl convert a bsp alias $1 into its bsp directory RTEMS_BSP_FAMILY
AC_DEFUN([RTEMS_BSP_ALIAS],
[_RTEMS_BSP_ALIAS(m4_if([$1],,[$RTEMS_BSP],[$1]),
m4_if([$2],,[RTEMS_BSP_FAMILY],[$2]))]
)

24
aclocal/canonical-target-name.m4 Normal file
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@@ -0,0 +1,24 @@
dnl canonicalize target cpu
dnl NOTE: Most rtems targets do not fulfil autoconf's
dnl target naming conventions "processor-vendor-os"
dnl Therefore autoconf's AC_CANONICAL_TARGET will fail for them
dnl and we have to fix it for rtems ourselves
AC_DEFUN([RTEMS_CANONICAL_TARGET_CPU],
[
AC_CANONICAL_TARGET
AC_MSG_CHECKING(rtems target cpu)
case "${target}" in
no_cpu-*rtems*)
RTEMS_CPU=no_cpu
;;
riscv*-*rtems*)
RTEMS_CPU=riscv
;;
*)
RTEMS_CPU=`echo $target | sed 's%^\([[^-]]*\)-\(.*\)$%\1%'`
;;
esac
AC_SUBST(RTEMS_CPU)
AC_MSG_RESULT($RTEMS_CPU)
])

25
aclocal/check-bsps.m4 Normal file
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@@ -0,0 +1,25 @@
dnl Report all available bsps for a target within the source tree
dnl
dnl RTEMS_CHECK_BSPS(bsp_list)
AC_DEFUN([RTEMS_CHECK_BSPS],
[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])dnl sets RTEMS_CPU, target
AC_REQUIRE([RTEMS_SOURCE_TOP])dnl sets RTEMS_SOURCE_ROOT
AC_MSG_CHECKING([for available BSPs])
$1=
for bsp_make in `echo "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}"/*/config 2>/dev/null`; do
bsp_family=`echo "$bsp_make" | sed \
-e "s,^${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}/,," \
-e "s,/config$,,"`
for bsp_cfgs in `ls "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}/$bsp_family/config/"*.cfg 2>/dev/null`; do
bsp_cfg=`echo "$bsp_cfgs" | sed \
-e "s,^${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}/$bsp_family/config/,," \
-e "s,\.cfg$,,"`
$1="[$]$1 $bsp_cfg"
done
done
AS_IF([test -z "[$]$1"],
[AC_MSG_RESULT([none])],
[AC_MSG_RESULT([$]$1)])
])dnl

20
aclocal/check-custom-bsp.m4 Normal file
View File

@@ -0,0 +1,20 @@
AC_DEFUN([_RTEMS_CHECK_CUSTOM_BSP],[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])dnl sets RTEMS_CPU, target
AC_REQUIRE([RTEMS_SOURCE_TOP])dnl sets RTEMS_SOURCE_ROOT
$2=
for i in \
`ls "${RTEMS_SOURCE_ROOT}/bsps/${RTEMS_CPU}"/*/config/$1 2>/dev/null`;
do
AS_IF([test -r $i],[
$2="$i"
break;
])
done
])
AC_DEFUN([RTEMS_CHECK_CUSTOM_BSP],[
_RTEMS_CHECK_CUSTOM_BSP([[$]$1.cfg],[BSP_FOUND])
AS_IF([test -z "$BSP_FOUND"],[
AC_MSG_ERROR([missing [$]$1.cfg])
])
])

9
aclocal/check-tool.m4 Normal file
View File

@@ -0,0 +1,9 @@
## Check for a cross tool, similar to AC_CHECK_TOOL, but do not fall back to
## the un-prefixed version of PROG-TO-CHECK-FOR.
dnl RTEMS_CHECK_TOOL(VARIABLE, PROG-TO-CHECK-FOR[, VALUE-IF-NOT-FOUND [, PATH]])
AC_DEFUN([RTEMS_CHECK_TOOL],
[
AS_IF([test "x$target_alias" != "x$host_alias"],
[rtems_tool_prefix=$target_alias-])
AC_CHECK_PROG($1, ${rtems_tool_prefix}$2, ${rtems_tool_prefix}$2, $3, $4)
])

11
aclocal/enable-cxx.m4 Normal file
View File

@@ -0,0 +1,11 @@
AC_DEFUN([RTEMS_ENABLE_CXX],
[
AC_ARG_ENABLE(cxx,
[AS_HELP_STRING([--enable-cxx],
[enable C++ support])],
[case "${enable_cxx}" in
yes) RTEMS_HAS_CPLUSPLUS=yes ;;
no) RTEMS_HAS_CPLUSPLUS=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-cxx option) ;;
esac], [RTEMS_HAS_CPLUSPLUS=yes])
])

12
aclocal/enable-drvmgr.m4 Normal file
View File

@@ -0,0 +1,12 @@
AC_DEFUN([RTEMS_ENABLE_DRVMGR],
[
## AC_BEFORE([$0], [RTEMS_CHECK_DRVMGR_STARTUP])dnl
AC_ARG_ENABLE(drvmgr,
[AS_HELP_STRING([--enable-drvmgr],[enable Driver Manager at Startup])],
[case "${enableval}" in
yes) RTEMS_DRVMGR_STARTUP=yes ;;
no) RTEMS_DRVMGR_STARTUP=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-drvmgr option) ;;
esac],[RTEMS_DRVMGR_STARTUP=yes])
])

14
aclocal/enable-multiprocessing.m4 Normal file
View File

@@ -0,0 +1,14 @@
AC_DEFUN([RTEMS_ENABLE_MULTIPROCESSING],
[
AC_ARG_ENABLE(multiprocessing,
[AS_HELP_STRING([--enable-multiprocessing],
[enable multiprocessing interface; the multiprocessing interface is a
communication interface between different RTEMS instances and allows
synchronization of objects via message passing])],
[case "${enable_multiprocessing}" in
yes) test -z $enable_rtemsbsp && AC_MSG_ERROR([Multiprocessing requires BSPs to be provided, none have, see --enable-rtemsbsp])
;;
no) ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-multiprocessing option) ;;
esac],[enable_multiprocessing=no])
])

13
aclocal/enable-networking.m4 Normal file
View File

@@ -0,0 +1,13 @@
AC_DEFUN([RTEMS_ENABLE_NETWORKING],
[
## AC_BEFORE([$0], [RTEMS_CHECK_NETWORKING])dnl
AC_ARG_ENABLE(networking,
[AS_HELP_STRING([--enable-networking],[enable TCP/IP stack])],
[case "${enableval}" in
yes) RTEMS_HAS_NETWORKING=yes ;;
no) RTEMS_HAS_NETWORKING=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-networking option) ;;
esac],[RTEMS_HAS_NETWORKING=yes])
AC_SUBST(RTEMS_HAS_NETWORKING)dnl
])

13
aclocal/enable-paravirt.m4 Normal file
View File

@@ -0,0 +1,13 @@
AC_DEFUN([RTEMS_ENABLE_PARAVIRT],
[
AC_ARG_ENABLE(paravirt,
[AS_HELP_STRING([--enable-paravirt],[enable support for paravirtualization
(default=no)])],
[case "${enableval}" in
yes) RTEMS_HAS_PARAVIRT=yes ;;
no) RTEMS_HAS_PARAVIRT=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-paravirt option) ;;
esac],[RTEMS_HAS_PARAVIRT=no])
])

21
aclocal/enable-posix.m4 Normal file
View File

@@ -0,0 +1,21 @@
AC_DEFUN([RTEMS_ENABLE_POSIX],
[
## AC_BEFORE([$0], [RTEMS_CHECK_POSIX_API])dnl
AC_ARG_ENABLE(posix,
[AS_HELP_STRING([--enable-posix],[enable posix interface])],
[case "${enableval}" in
yes) RTEMS_HAS_POSIX_API=yes ;;
no) RTEMS_HAS_POSIX_API=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-posix option) ;;
esac],[RTEMS_HAS_POSIX_API=yes])
case "${host}" in
no_cpu-*rtems*)
RTEMS_HAS_POSIX_API=no
;;
*)
;;
esac
AC_SUBST(RTEMS_HAS_POSIX_API)
])

10
aclocal/enable-rtems-debug.m4 Normal file
View File

@@ -0,0 +1,10 @@
AC_DEFUN([RTEMS_ENABLE_RTEMS_DEBUG],
[
AC_ARG_ENABLE(rtems-debug,
AS_HELP_STRING([--enable-rtems-debug],[enable RTEMS_DEBUG]),
[case "${enable_rtems_debug}" in
yes) enable_rtems_debug=yes ;;
no) enable_rtems_debug=no ;;
*) AC_MSG_ERROR([bad value ${enable_rtems_debug} for RTEMS_DEBUG]) ;;
esac],[enable_rtems_debug=no])
])

54
aclocal/enable-rtemsbsp.m4 Normal file
View File

@@ -0,0 +1,54 @@
dnl Override the set of BSPs to be built.
dnl used by the toplevel configure script
dnl RTEMS_ENABLE_RTEMSBSP(rtems_bsp_list)
AC_DEFUN([RTEMS_ENABLE_RTEMSBSP],
[
AC_BEFORE([$0], [RTEMS_ENV_RTEMSBSP])
AC_ARG_ENABLE(rtemsbsp,
[AS_HELP_STRING([--enable-rtemsbsp="bsp1 bsp2 .."],
[BSPs to include in build, required for SMP and MP builds])],
[case "${enable_rtemsbsp}" in
yes ) enable_rtemsbsp="" ;;
no ) enable_rtemsbsp="no" ;;
*) enable_rtemsbsp="$enable_rtemsbsp"
srctop=${srcdir}
while test x${srctop} != x/
do
if test -d ${srctop}/cpukit -a -d ${srctop}/c/src/lib/libbsp; then
break
fi
srctop=$(dirname ${srctop})
done
if test x${srctop} = x/; then
AC_MSG_ERROR([Cannot find the top of source tree, please report to devel@rtems.org])
fi
target_arch=$(echo ${target_alias} | sed -e "s/\-.*//g")
libbsp=${srctop}/bsps
libbsp_e=$(echo ${libbsp} | sed -e 's/\//\\\//g')
cfg_list=$(LANG=C LC_COLLATE=C find ${libbsp} -mindepth 1 -name \*.cfg)
for bsp in ${enable_rtemsbsp};
do
found=no
for bsp_path in ${cfg_list};
do
cfg_bsp=$(echo ${bsp_path} | sed -e "s/.*\///" -e 's/\.cfg//')
if test x$bsp = x$cfg_bsp; then
cfg_arch=$(echo ${bsp_path} | sed -e "s/${libbsp_e}*\///" -e 's/\/.*//')
case ${target_arch} in
${cfg_arch}* )
;;
* )
AC_MSG_ERROR([BSP '$bsp' architecture does not match the --target architecture, run 'rtems-bsps' (in the top of the source tree) for a valid BSP list])
;;
esac
found=yes
break
fi
done
if test $found = no; then
AC_MSG_ERROR([BSP '$bsp' not found, run 'rtems-bsps' (in the top of the source tree) for a valid BSP list])
fi
done
;;
esac],[enable_rtemsbsp=""])
])

18
aclocal/enable-smp.m4 Normal file
View File

@@ -0,0 +1,18 @@
AC_DEFUN([RTEMS_ENABLE_SMP],
[
## AC_BEFORE([$0], [RTEMS_CHECK_SMP])dnl
AC_ARG_ENABLE(smp,
[AS_HELP_STRING([--enable-smp],[enable support for symmetric multiprocessing
(SMP)])],
[case "${enableval}" in
yes) test -z $enable_rtemsbsp && AC_MSG_ERROR([SMP requires BSPs to be provided, none have, see --enable-rtemsbsp])
case "${RTEMS_CPU}" in
arm|powerpc|riscv*|sparc|i386) RTEMS_HAS_SMP=yes ;;
*) RTEMS_HAS_SMP=no ;;
esac
;;
no) RTEMS_HAS_SMP=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-smp option) ;;
esac],[RTEMS_HAS_SMP=no])
])

11
aclocal/enable-tests.m4 Normal file
View File

@@ -0,0 +1,11 @@
AC_DEFUN([RTEMS_ENABLE_TESTS],
[
AC_ARG_ENABLE(tests,
[AS_HELP_STRING([--enable-tests],[enable tests (default:samples)])],
[case "${enableval}" in
samples) enable_tests=samples;;
yes) enable_tests=yes ;;
no) enable_tests=no ;;
*) AC_MSG_ERROR([bad value ${enableval} for --enable-tests]) ;;
esac], [enable_tests=samples])
])

17
aclocal/multilib.m4 Normal file
View File

@@ -0,0 +1,17 @@
dnl This provides configure definitions used for multilib support
dnl parts of these macros are derived from newlib-1.8.2's multilib support
AC_DEFUN([RTEMS_ENABLE_MULTILIB],
[
AC_ARG_ENABLE(multilib,
AS_HELP_STRING([--enable-multilib],
[build many library versions (default=no)]),
[case "${enableval}" in
yes) multilib=yes ;;
no) multilib=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for multilib option) ;;
esac], [multilib=no])dnl
AM_CONDITIONAL(MULTILIB,test x"${multilib}" = x"yes")
])

12
aclocal/path-ksh.m4 Normal file
View File

@@ -0,0 +1,12 @@
AC_DEFUN([RTEMS_PATH_KSH],
[
dnl NOTE: prefer bash over ksh over sh
AC_PATH_PROGS(KSH,bash ksh sh)
if test -z "$KSH"; then
dnl NOTE: This cannot happen -- /bin/sh must always exist
AC_MSG_ERROR(
[***]
[ Cannot determine a usable shell bash/ksh/sh]
[ Please contact your system administrator] );
fi
])

17
aclocal/project-root.m4 Normal file
View File

@@ -0,0 +1,17 @@
dnl
dnl PROJECT_TOPdir .. relative path to the top of the build-tree
dnl PROJECT_ROOT .. relative path to the top of the temporary
dnl installation directory inside the build-tree
dnl RTEMS_TOPdir .. relative path of a subpackage's configure.ac to the
dnl toplevel configure.ac of the source-tree
dnl RTEMS_ROOT .. path to the top of a bsp's build directory
dnl [Applied by custom/*.cfg, deprecated otherwise]
dnl
AC_DEFUN([RTEMS_PROJECT_ROOT],
[dnl
AC_REQUIRE([RTEMS_TOP])
BIN2C=rtems-bin2c
AC_SUBST(BIN2C)
])

41
aclocal/quoting.m4 Normal file
View File

@@ -0,0 +1,41 @@
dnl RTEMS_CONFIGURE_ARGS_QUOTE(dnl RETURN_VAR, [ADDITIONAL_CASES], [VAR_TO_PROCESS]])
dnl
AC_DEFUN([_RTEMS_CONFIGURE_ARGS_QUOTE],
[
$1_prune()
{
# Remove --cache-file and --srcdir arguments so they do not pile up.
$1=
ac_prev=
for ac_arg
do
if test -n "$ac_prev"; then
ac_prev=
continue
fi
case $ac_arg in
-cache-file | --cache-file | --cache-fil | --cache-fi \
| --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
ac_prev=cache_file ;;
-cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
| --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* \
| --c=*)
;;
--config-cache | -C)
;;
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
ac_prev=srcdir ;;
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
;;
m4_if([$2],,,[$2])
*) $1="$$1 '$ac_arg'" ;;
esac
done
export $1
}
])
AC_DEFUN([RTEMS_CONFIGURE_ARGS_QUOTE],[
m4_expand_once([_RTEMS_CONFIGURE_ARGS_QUOTE([$1],[$2])])
eval $1_prune m4_if([$3],,[$ac_configure_args],[[$]$3])
])

20
aclocal/rpm.m4 Normal file
View File

@@ -0,0 +1,20 @@
AC_DEFUN([RTEMS_ENABLE_RPMPREFIX],[
AC_ARG_ENABLE([rpmprefix],
[ --enable-rpmprefix=<rpmprefix> prefix rpms],
[case $enable_rpmprefix in
yes ) rpmprefix="rtems-"]_RTEMS_API["-";;
no ) rpmprefix="%{nil}";;
* ) AS_IF([test -z "$enable_rpmprefix"],
[rpmprefix="%{nil}"],
[rpmprefix="$enable_rpmprefix"]);;
esac],
[rpmprefix="rtems-"]_RTEMS_API["-"])
AC_ARG_ENABLE([osversions],
[ --enable-osversions whether to use version numbers in os-tripples],
[case $enable_osversions in
yes ) osversion=_RTEMS_API;;
* ) osversion=;;
esac],
[osversion=_RTEMS_API])
])

13
aclocal/rtems-bsp-includes.m4 Normal file
View File

@@ -0,0 +1,13 @@
dnl
dnl RTEMS Include paths.
dnl
AC_DEFUN([RTEMS_BSP_INCLUDES],
[
AC_REQUIRE([RTEMS_SOURCE_TOP])
AC_REQUIRE([RTEMS_BUILD_TOP])
RTEMS_BSP_CPPFLAGS="-I${RTEMS_BUILD_ROOT}/lib/libbsp/\$(RTEMS_CPU)/\$(RTEMS_BSP_FAMILY)/include \
-I${RTEMS_SOURCE_ROOT}/bsps/include \
-I${RTEMS_SOURCE_ROOT}/bsps/\$(RTEMS_CPU)/include \
-I${RTEMS_SOURCE_ROOT}/bsps/\$(RTEMS_CPU)/\$(RTEMS_BSP_FAMILY)/include"
AC_SUBST([RTEMS_BSP_CPPFLAGS])
])

12
aclocal/rtems-build-top.m4 Normal file
View File

@@ -0,0 +1,12 @@
dnl
dnl RTEMS_BUILD_TOP($1)
dnl
AC_DEFUN([RTEMS_BUILD_TOP],
[dnl
#
# This is a copy of the horrible hack in rtems-top.m4 and it is simpler to
# copy it than attempt to clean this crap up.
#
RTEMS_BUILD_ROOT="${with_rtems_build_top}"
AC_SUBST([RTEMS_BUILD_ROOT])
])dnl

23
aclocal/rtems-includes.m4 Normal file
View File

@@ -0,0 +1,23 @@
dnl
dnl RTEMS Include paths.
dnl
AC_DEFUN([RTEMS_INCLUDES],
[
AC_REQUIRE([RTEMS_SOURCE_TOP])
AC_REQUIRE([RTEMS_BUILD_TOP])
# Was CFLAGS set?
rtems_cv_CFLAGS_set="${CFLAGS+set}"
RTEMS_INCLUDE_CPUKIT="-I${RTEMS_SOURCE_ROOT}/cpukit/include"
RTEMS_INCLUDE_CPUKIT_ARCH="-I${RTEMS_SOURCE_ROOT}/cpukit/score/cpu/\$(RTEMS_CPU)/include"
RTEMS_CPUKIT_INCLUDE="${RTEMS_INCLUDE_CPUKIT} ${RTEMS_INCLUDE_CPUKIT_ARCH}"
RTEMS_BUILD_INCLUDE="-I\$(top_builddir) -I${RTEMS_BUILD_ROOT}/include"
RTEMS_INCLUDE="${RTEMS_BUILD_INCLUDE} ${RTEMS_CPUKIT_INCLUDE}"
RTEMS_CPPFLAGS="${RTEMS_INCLUDE}"
AC_SUBST([RTEMS_CPPFLAGS])
])

8
aclocal/rtems-source-top.m4 Normal file
View File

@@ -0,0 +1,8 @@
dnl
dnl RTEMS_SOURCE_TOP
dnl
AC_DEFUN([RTEMS_SOURCE_TOP],
[dnl
RTEMS_SOURCE_ROOT="${with_rtems_source_top}"
AC_SUBST([RTEMS_SOURCE_ROOT])
])dnl

34
aclocal/rtems-top.m4 Normal file
View File

@@ -0,0 +1,34 @@
# AC_DISABLE_OPTION_CHECKING is not available before 2.62
AC_PREREQ(2.62)
dnl
dnl RTEMS_TOP($1)
dnl
dnl $1 .. relative path from this configure.ac to the toplevel configure.ac
dnl
AC_DEFUN([RTEMS_TOP],
[dnl
AC_REQUIRE([RTEMS_VERSIONING])
AC_REQUIRE([AC_DISABLE_OPTION_CHECKING])
AC_CONFIG_AUX_DIR([$1])
AC_CHECK_PROGS(MAKE, gmake make)
AC_BEFORE([$0], [AM_INIT_AUTOMAKE])dnl
AC_PREFIX_DEFAULT([/opt/rtems-][_RTEMS_API])
RTEMS_TOPdir="$1";
AC_SUBST(RTEMS_TOPdir)
dots=`echo $with_target_subdir|\
sed -e 's,^\.$,,' -e 's%^\./%%' -e 's%[[^/]]$%&/%' -e 's%[[^/]]*/%../%g'`
PROJECT_TOPdir=${dots}${RTEMS_TOPdir}/'$(top_builddir)'
AC_SUBST(PROJECT_TOPdir)
PROJECT_ROOT="${RTEMS_TOPdir}/\$(top_builddir)"
AC_SUBST(PROJECT_ROOT)
AC_MSG_CHECKING([for RTEMS Version])
AC_MSG_RESULT([_RTEMS_VERSION])
pkgdatadir="${datadir}"/rtems[]_RTEMS_API;
AC_SUBST([pkgdatadir])
])dnl

23
aclocal/tool-paths.m4 Normal file
View File

@@ -0,0 +1,23 @@
AC_DEFUN([RTEMS_TOOLPATHS],
[
# tooldir='$(exec_prefix)/'$target_alias
# Temporary work-around until building in source tree is supported
AC_REQUIRE([RTEMS_PROJECT_ROOT])
tooldir='$(PROJECT_ROOT)'
AC_SUBST(tooldir)
project_includedir='$(tooldir)'/include
AC_SUBST(project_includedir)
project_libdir='$(tooldir)/lib$(MULTISUBDIR)'
AC_SUBST(project_libdir)
project_bindir='$(tooldir)/bin'
AC_SUBST(project_bindir)
rtems_bspdir='$(prefix)/${RTEMS_BSP}'
AC_SUBST(rtems_bspdir)
rtems_makedir='$(prefix)/make'
AC_SUBST(rtems_makedir)
])

4
aclocal/version.m4 Normal file
View File

@@ -0,0 +1,4 @@
AC_DEFUN([RTEMS_VERSIONING],
m4_define([_RTEMS_VERSION],[5.0.0]))
m4_define([_RTEMS_API],[5])

5
automake/host.am Normal file
View File

@@ -0,0 +1,5 @@
## NOTE: This is a temporary work-around to keep
## RTEMS's non automake standard make targets working.
## Once automake is fully integrated these make targets
## and this file will probably be removed

7
automake/subdirs.am Normal file
View File

@@ -0,0 +1,7 @@
## Borrowed from automake-1.4 and adapted to RTEMS
## NOTE: This is a temporary work-around to keep
## RTEMS's non automake standard make targets working.
## Once automake is fully integrated these make targets
## and this file will probably be removed

326
bootstrap Executable file
View File

@@ -0,0 +1,326 @@
#!/bin/sh
#
# helps bootstrapping, when checked out from CVS
# requires GNU autoconf and GNU automake
#
# this is not meant to be exported outside the source tree
#
# NOTE: Inspired by libtool's autogen script
#
# to be run from the toplevel directory of RTEMS'
# source tree
progname=`basename $0`
top_srcdir=`dirname $0`
LC_ALL=C
export LC_ALL
verbose=""
quiet="false"
mode="autoreconf"
force=0
usage()
{
echo
echo "usage: ${progname} [-c|-h|-H] [-q][-v]"
echo
echo "options:"
echo " -c .. clean, remove all aclocal/autoconf/automake generated files"
echo " -h .. display this message and exit"
echo " -H .. regenerate headers.am files"
echo " -q .. quiet, don't display directories"
echo " -v .. verbose, pass -v to autotools"
echo
exit 1
}
if test ! -f $top_srcdir/aclocal/version.m4; then
echo "${progname}:"
echo " Installation problem: Can't find file aclocal/version.m4"
exit 1
fi
while test $# -gt 0; do
case $1 in
-h|--he|--hel|--help)
usage ;;
-q|--qu|--qui|--quie|--quiet)
quiet="true"
shift;;
-v|--ve|--ver|--verb|--verbo|--verbos|--verbose)
verbose="-v"
shift;;
-c|--cl|--cle|--clea|--clean)
mode="clean"
shift;;
-f|--fo|--for|--forc|--force)
force=`expr $force + 1`
shift;;
-H|--headers)
mode="headers"
shift;;
-r|--re|--rec|--reco|--recon|--reconf)
mode="autoreconf"
shift;;
-g|--ge|--gen|--gene|--gener|--genera|--generat|--generate)
mode="generate"
shift;;
-*) echo "unknown option $1"
usage ;;
*) echo "invalid parameter $1"
usage ;;
esac
done
case $mode in
headers)
if test "." != "$top_srcdir"; then
echo "To generate the headers.am you must call the script via \"./$progname -H\""
exit 1
fi
base="$PWD"
# Generate cpukit/header-dirs.am
tmp="$base/cpukit/header-dirs.am.new"
hdr_dirs=`for i in cpukit/include cpukit/libnetworking cpukit/score/cpu/*/include ; do
cd "$i"
find -mindepth 1 -type d
cd "$base"
done | sort -u | sed 's%^\./%%'`
echo '## This file was generated by "./boostrap -H".' > "$tmp"
echo 'include_HEADERS =' >> "$tmp"
for dir in $hdr_dirs ; do
am_dir=`echo $dir | sed 's%[/-]%_%g'`
echo "include_${am_dir}dir = \$(includedir)/$dir" >> "$tmp"
echo "include_${am_dir}_HEADERS =" >> "$tmp"
done
diff -q "$tmp" "cpukit/header-dirs.am" || mv "$tmp" "cpukit/header-dirs.am"
rm -f "$tmp"
# Generate cpukit/*/headers.am
tmp="$base/headers.am.new"
cpukit="$base/cpukit"
cd "$cpukit"
for inc in include score/cpu/*/include ; do
echo '## This file was generated by "./boostrap -H".' > "$tmp"
hdr=`dirname $inc`
am_dir=""
cd $inc
for b in `find -type d | sort` ; do
for j in `find $b -mindepth 1 -maxdepth 1 -name '*.h' | sed 's%^\.%%' | sed 's%^/%%' | sort` ; do
dir=`dirname $j`
if test x$dir != x. ; then
am_dir=`echo $dir | sed 's%[/-]%_%g'`
am_dir="_$am_dir"
else
am_dir=""
fi
echo "include${am_dir}_HEADERS += $inc/$j" >> "$tmp"
done
done
cd "$cpukit"
diff -q "$tmp" "${hdr}/headers.am" || mv "$tmp" "${hdr}/headers.am"
done
rm -f "$tmp"
cd "$base"
# Generate bsps/*/headers.am
tmp="$base/headers.am.new"
for i in bsps/include bsps/*/include bsps/*/*/include ; do
dir=""
am_dir=""
echo '## This file was generated by "./boostrap -H".' > "$tmp"
case $i in
bsps/*/*/include)
hdr="../"
inc="../../../../../../$i/"
;;
bsps/*/include)
hdr="../"
inc="../../../../../$i/"
;;
bsps/include)
hdr="../"
inc="../../$i/"
;;
*)
hdr=""
inc=""
;;
esac
cd $i
for b in `find -type d | sort` ; do
for j in `find $b -mindepth 1 -maxdepth 1 -name '*.h' -or -name '*.inc' | sed 's%^\.%%' | sed 's%^/%%' | sort` ; do
d=`dirname $j`
if test x$d != x$dir ; then
dir=$d
if test x$d != x. ; then
am_dir=`echo $dir | sed 's%[/-]%_%g'`
am_dir="_$am_dir"
printf "\ninclude%sdir = \$(includedir)/$dir\n" "$am_dir" >> "$tmp"
else
am_dir=""
echo "" >> "$tmp"
fi
echo "include${am_dir}_HEADERS =" >> "$tmp"
fi
echo "include${am_dir}_HEADERS += $inc$j" >> "$tmp"
if test $j = bsp.h ; then
echo "include_HEADERS += include/bspopts.h" >> "$tmp"
fi
done
done
cd "$base"
diff -q "$tmp" "$i/${hdr}headers.am" || mv "$tmp" "$i/${hdr}headers.am"
done
rm -f "$tmp"
;;
generate)
AUTOCONF=${AUTOCONF-autoconf}
if test -z "$AUTOCONF"; then
echo "You must have autoconf installed to run $program"
exit 1
fi
AUTOHEADER=${AUTOHEADER-autoheader}
if test -z "$AUTOHEADER"; then
echo "You must have autoconf installed to run $program"
exit 1
fi
AUTOMAKE=${AUTOMAKE-automake}
if test -z "$AUTOMAKE"; then
echo "You must have automake installed to run $program"
exit 1
fi
ACLOCAL=${ACLOCAL-aclocal}
if test -z "$ACLOCAL"; then
echo "You must have automake installed to run $program"
exit 1
fi
case $top_srcdir in
/* ) aclocal_dir=$top_srcdir
;;
*) aclocal_dir=`pwd`/$top_srcdir
;;
esac
confs=`find . \( -name 'configure.in' -o -name 'configure.ac' \) -print`
for i in $confs; do
dir=`dirname $i`
configure=`basename $i`
( test "$quiet" = "true" || echo "$dir"
cd $dir
pat="s,\$(RTEMS_TOPdir),${aclocal_dir},g"
aclocal_args=`grep '^[ ]*ACLOCAL_AMFLAGS' Makefile.am | \
sed -e 's%.*ACLOCAL_AMFLAGS.*\=[ ]*%%g' -e $pat `
test "$verbose" = "-v" && echo "${ACLOCAL} $aclocal_args"
${ACLOCAL} $aclocal_args
test -n "`grep CONFIG_HEADER ${configure}`" && ${AUTOHEADER} \
&& test "$verbose" = "-v" && echo "${AUTOHEADER}"
test -n "`grep RTEMS_BSP_CONFIGURE ${configure}`" && ${AUTOHEADER} \
&& test "$verbose" = "-v" && echo "${AUTOHEADER}"
test -f Makefile.am && ${AUTOMAKE} -a -c $verbose
${AUTOCONF}
test -f Makefile.am && test -n "`grep 'stamp-h\.in' Makefile.in`" \
&& echo timestamp > stamp-h.in
)
done
;;
autoreconf)
AUTORECONF=${AUTORECONF-autoreconf}
if test -z "$AUTORECONF"; then
echo "You must have autoreconf installed to run $program"
exit 1
fi
confs=`find . -name 'configure.ac' -print`
for i in $confs; do
dir=`dirname $i`
configure=`basename $i`
( test "$quiet" = "true" || echo "$dir"
cd $dir
${AUTORECONF} -i --no-recursive $verbose
test -f Makefile.am && test -n "`grep 'stamp-h\.in' Makefile.in`" \
&& echo timestamp > stamp-h.in
)
done
;;
clean)
test "$quiet" = "true" || echo "removing automake generated Makefile.in files"
files=`find . -name 'Makefile.am' -print | sed -e 's%\.am%\.in%g'`
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
test "$quiet" = "true" || echo "removing configure files"
files=`find . -name 'configure' -print`
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
if test $force -gt 0; then
needles=""
if test $force -gt 1; then
# Manually maintained
needles="$needles config.sub"
needles="$needles config.guess"
fi
if test $force -gt 0; then
# Inherited from automake
needles="$needles compile"
needles="$needles depcomp"
needles="$needles install-sh"
needles="$needles missing"
needles="$needles mdate-sh"
fi
for j in $needles; do
files=`find . -name "$j" -print`
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
done
fi
test "$quiet" = "true" || echo "removing aclocal.m4 files"
files=`find . -name 'aclocal.m4' -print`
test "$verbose" = "-v" && test -n "$files" && echo "$files"
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
find . -name '*~' -print | xargs rm -f
find . -name 'bspopts.h.in' -print | xargs rm -f
find . -name '*.orig' -print | xargs rm -f
find . -name '*.rej' -print | xargs rm -f
find . -name 'config.status' -print | xargs rm -f
find . -name 'config.log' -print | xargs rm -f
find . -name 'config.cache' -print | xargs rm -f
find . -name 'Makefile' -and -not -path ./testsuites/ada/sptests/sp19/Makefile -print | xargs rm -f
find . -name '.deps' -print | xargs rm -rf
find . -name '.libs' -print | xargs rm -rf
find . -name 'stamp-h.in' | xargs rm -rf
find . -name 'autom4te*.cache' | xargs rm -rf
;;
esac
exit 0

70
bsps/aarch64/a53/console/console.c
View File

@@ -1,70 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/bspIo.h>
#include <bsp.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/console-termios.h>
#include <bspopts.h>
arm_pl011_context a53_qemu_vpl011_context = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
.regs = (arm_pl011_uart *) BSP_A53_QEMU_VPL011_BASE,
.initial_baud = 115200,
.clock = 24000000
};
const console_device console_device_table[] = {
{
.device_file = "/dev/ttyS0",
.probe = console_device_probe_default,
.handler = &arm_pl011_fns,
.context = &a53_qemu_vpl011_context.base
}
};
const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
static void output_char( char c )
{
arm_pl011_write_polled(&a53_qemu_vpl011_context.base, c);
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = NULL;

74
bsps/aarch64/a53/include/bsp.h
View File

@@ -1,74 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief Core BSP definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A53_QEMU_BSP_H
#define LIBBSP_AARCH64_A53_QEMU_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0x08010000
#define BSP_ARM_GIC_DIST_BASE 0x08000000
#define BSP_ARM_GIC_REDIST_BASE 0x080A0000
#define BSP_A53_QEMU_VPL011_BASE 0x9000000
#define BSP_A53_QEMU_VPL011_LENGTH 0x1000
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_A53_QEMU_BSP_H */

66
bsps/aarch64/a53/include/bsp/irq.h
View File

@@ -1,66 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP IRQ definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A53_IRQ_H
#define LIBBSP_AARCH64_A53_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <dev/irq/arm-gic-irq.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_INTERRUPT_VECTOR_COUNT 256
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
#define BSP_VPL011_SPI 32
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_AARCH64_A53_IRQ_H */

46
bsps/aarch64/a53/include/tm27.h
View File

@@ -1,46 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP tm27 header
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

49
bsps/aarch64/a53/start/bspstart.c
View File

@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

52
bsps/aarch64/a53/start/bspstarthooks.c
View File

@@ -1,52 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup Hooks
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
/* Do nothing */
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
bsp_start_clear_bss();
}

70
bsps/aarch64/a72/console/console.c
View File

@@ -1,70 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/bspIo.h>
#include <bsp.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/console-termios.h>
#include <bspopts.h>
arm_pl011_context a72_qemu_vpl011_context = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
.regs = (arm_pl011_uart *) BSP_A72_QEMU_VPL011_BASE,
.initial_baud = 115200,
.clock = 24000000
};
const console_device console_device_table[] = {
{
.device_file = "/dev/ttyS0",
.probe = console_device_probe_default,
.handler = &arm_pl011_fns,
.context = &a72_qemu_vpl011_context.base
}
};
const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
static void output_char( char c )
{
arm_pl011_write_polled(&a72_qemu_vpl011_context.base, c);
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = NULL;

74
bsps/aarch64/a72/include/bsp.h
View File

@@ -1,74 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief Core BSP definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A72_QEMU_BSP_H
#define LIBBSP_AARCH64_A72_QEMU_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0x08010000
#define BSP_ARM_GIC_DIST_BASE 0x08000000
#define BSP_ARM_GIC_REDIST_BASE 0x080A0000
#define BSP_A72_QEMU_VPL011_BASE 0x9000000
#define BSP_A72_QEMU_VPL011_LENGTH 0x1000
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_A72_QEMU_BSP_H */

66
bsps/aarch64/a72/include/bsp/irq.h
View File

@@ -1,66 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief BSP IRQ definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A72_IRQ_H
#define LIBBSP_AARCH64_A72_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <dev/irq/arm-gic-irq.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_INTERRUPT_VECTOR_COUNT 1020
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
#define BSP_VPL011_SPI 32
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_AARCH64_A72_IRQ_H */

46
bsps/aarch64/a72/include/tm27.h
View File

@@ -1,46 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief BSP tm27 header
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

49
bsps/aarch64/a72/start/bspstart.c
View File

@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

52
bsps/aarch64/a72/start/bspstarthooks.c
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@@ -1,52 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup Hooks
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
/* Do nothing */
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
bsp_start_clear_bss();
}

271
bsps/aarch64/include/bsp/aarch64-mmu.h
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@@ -1,271 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_start
*
* @brief AArch64 MMU configuration.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_AARCH64_MMU_H
#define LIBBSP_AARCH64_SHARED_AARCH64_MMU_H
#include <bsp/fatal.h>
#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <bsp/utility.h>
#include <bspopts.h>
#include <libcpu/mmu-vmsav8-64.h>
#include <rtems/score/aarch64-system-registers.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
typedef struct {
uintptr_t begin;
uintptr_t end;
uint64_t flags;
} aarch64_mmu_config_entry;
#define AARCH64_MMU_DEFAULT_SECTIONS \
{ \
.begin = (uintptr_t) bsp_section_fast_text_begin, \
.end = (uintptr_t) bsp_section_fast_text_end, \
.flags = AARCH64_MMU_CODE_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_fast_data_begin, \
.end = (uintptr_t) bsp_section_fast_data_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_start_begin, \
.end = (uintptr_t) bsp_section_start_end, \
.flags = AARCH64_MMU_CODE_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_vector_begin, \
.end = (uintptr_t) bsp_section_vector_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_text_begin, \
.end = (uintptr_t) bsp_section_text_end, \
.flags = AARCH64_MMU_CODE_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_rodata_begin, \
.end = (uintptr_t) bsp_section_rodata_end, \
.flags = AARCH64_MMU_DATA_RO_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_data_begin, \
.end = (uintptr_t) bsp_section_data_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_bss_begin, \
.end = (uintptr_t) bsp_section_bss_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_rtemsstack_begin, \
.end = (uintptr_t) bsp_section_rtemsstack_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_noinit_begin, \
.end = (uintptr_t) bsp_section_noinit_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_work_begin, \
.end = (uintptr_t) bsp_section_work_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_stack_begin, \
.end = (uintptr_t) bsp_section_stack_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_nocache_begin, \
.end = (uintptr_t) bsp_section_nocache_end, \
.flags = AARCH64_MMU_DEVICE \
}, { \
.begin = (uintptr_t) bsp_section_nocachenoload_begin, \
.end = (uintptr_t) bsp_section_nocachenoload_end, \
.flags = AARCH64_MMU_DEVICE \
}, { \
.begin = (uintptr_t) bsp_translation_table_base, \
.end = (uintptr_t) bsp_translation_table_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
/*
* The vector table must be in writable and executable memory as it stores both
* exception code and the mutable pointer to which it jumps
*/ \
.begin = (uintptr_t) bsp_start_vector_table_begin, \
.end = (uintptr_t) bsp_start_vector_table_end, \
.flags = AARCH64_MMU_CODE_RW_CACHED \
}
/**
* @brief This is the AArch64 MMU configuration table.
*
* The default table is provided by the BSP. Applications may provide their
* own.
*/
extern const aarch64_mmu_config_entry aarch64_mmu_config_table[];
/**
* @brief This is the count of entries in the AArch64 MMU configuration table.
*
* The default table is provided by the BSP. Applications may provide their
* own.
*/
extern const size_t aarch64_mmu_config_table_size;
/**
* @brief This structure represents the state to maintain the MMU translation
* tables.
*/
typedef struct {
/**
* @brief This member references the translation table base.
*/
uint64_t *ttb;
/**
* @brief This member contains the count of used page tables.
*
* A maximum of ::AARCH64_MMU_TRANSLATION_TABLE_PAGES can be used.
*/
size_t used_page_tables;
} aarch64_mmu_control;
/**
* @brief This object is used to maintain the MMU translation tables.
*/
extern aarch64_mmu_control aarch64_mmu_instance;
/**
* @brief Sets the MMU translation table entries associated with the memory
* region.
*
* @param[in, out] control is a reference to the MMU control state.
*
* @param[in] config is the configuration entry with the memory region and
* region attributes.
*
* @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
*
* @retval ::RTEMS_INVALID_ADDRESS The begin address of the memory region
* cannot be mapped by the MMU.
*
* @retval ::RTEMS_INVALID_SIZE The end address of the memory region cannot be
* mapped by the MMU.
*
* @retval ::RTEMS_TOO_MANY There was no page table entry available to perform
* the mapping.
*/
rtems_status_code aarch64_mmu_set_translation_table_entries(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config
);
/**
* @brief Sets up the MMU translation table.
*
* The memory regions of the configuration table are mapped by the MMU. If a
* mapping is infeasible, then the BSP fatal error
* ::AARCH64_FATAL_MMU_CANNOT_MAP_BLOCK will be issued.
*
* @param[in, out] control is a reference to the MMU control state.
*
* @param[in] config_table is the configuration table with memory regions and
* region attributes.
*
* @param config_count is the count of configuration table entries.
*/
void aarch64_mmu_setup_translation_table(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config_table,
size_t config_count
);
BSP_START_TEXT_SECTION static inline void
aarch64_mmu_enable( const aarch64_mmu_control *control )
{
uint64_t sctlr;
/* CPUECTLR_EL1.SMPEN is already set on ZynqMP and is not writable */
/* Flush and invalidate cache */
rtems_cache_flush_entire_data();
_AArch64_Write_ttbr0_el1( (uintptr_t) control->ttb );
_AARCH64_Instruction_synchronization_barrier();
/* Enable MMU and cache */
sctlr = _AArch64_Read_sctlr_el1();
sctlr |= AARCH64_SCTLR_EL1_I | AARCH64_SCTLR_EL1_C | AARCH64_SCTLR_EL1_M;
_AArch64_Write_sctlr_el1( sctlr );
}
BSP_START_TEXT_SECTION static inline void
aarch64_mmu_disable( void )
{
uint64_t sctlr;
/*
* Flush data cache before disabling the MMU. While the MMU is disabled, all
* accesses are treated as uncached device memory.
*/
rtems_cache_flush_entire_data();
/* Disable MMU */
sctlr = _AArch64_Read_sctlr_el1();
sctlr &= ~(AARCH64_SCTLR_EL1_M);
_AArch64_Write_sctlr_el1( sctlr );
}
BSP_START_TEXT_SECTION static inline void aarch64_mmu_setup( void )
{
/* Set TCR */
/* 256TB/48 bits mappable (64-0x10) */
_AArch64_Write_tcr_el1(
AARCH64_TCR_EL1_T0SZ( 0x10 ) | AARCH64_TCR_EL1_IRGN0( 0x1 ) |
AARCH64_TCR_EL1_ORGN0( 0x1 ) | AARCH64_TCR_EL1_SH0( 0x3 ) |
AARCH64_TCR_EL1_TG0( 0x0 ) | AARCH64_TCR_EL1_IPS( 0x5ULL ) |
AARCH64_TCR_EL1_EPD1
);
/* Set MAIR */
_AArch64_Write_mair_el1(
AARCH64_MAIR_EL1_ATTR0( 0x0 ) | AARCH64_MAIR_EL1_ATTR1( 0x4 ) |
AARCH64_MAIR_EL1_ATTR2( 0x44 ) | AARCH64_MAIR_EL1_ATTR3( 0xFF )
);
}
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_AARCH64_MMU_H */

86
bsps/aarch64/include/bsp/linker-symbols-arch.h
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@@ -1,86 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsLinkerSymbolsAArch64
*
* @brief This header file provides interfaces to AArch64-specific linker
* symbols and sections.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H
#define LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup RTEMSBSPsLinkerSymbolsAArch64 AArch64 Linker Symbols
*
* @ingroup RTEMSBSPsLinkerSymbols
*
* @brief This group provides support for AArch64-specific linker symbols and
* sections.
*
* @{
*/
#ifndef ASM
#define LINKER_SYMBOL(sym) extern char sym [];
#else
#define LINKER_SYMBOL(sym) .extern sym
#endif
LINKER_SYMBOL(bsp_stack_exception_size)
LINKER_SYMBOL(bsp_stack_hyp_size)
LINKER_SYMBOL(bsp_section_vector_begin)
LINKER_SYMBOL(bsp_section_vector_end)
LINKER_SYMBOL(bsp_section_vector_size)
LINKER_SYMBOL(bsp_vector_table_begin)
LINKER_SYMBOL(bsp_vector_table_end)
LINKER_SYMBOL(bsp_vector_table_size)
LINKER_SYMBOL(bsp_start_vector_table_begin)
LINKER_SYMBOL(bsp_start_vector_table_end)
LINKER_SYMBOL(bsp_start_vector_table_size)
LINKER_SYMBOL(bsp_translation_table_base)
LINKER_SYMBOL(bsp_translation_table_end)
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H */

184
bsps/aarch64/include/bsp/start.h
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@@ -1,184 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_start
*
* @brief Aarch64 system low level start.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_START_H
#define LIBBSP_AARCH64_SHARED_START_H
#include <string.h>
#include <bsp/linker-symbols.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup aarch64_start System Start
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief Aarch64 system low level start.
*
* @{
*/
#define BSP_START_TEXT_SECTION __attribute__((section(".bsp_start_text")))
#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data")))
/**
* @brief System start entry.
*/
void _start(void);
/**
* @brief Start entry hook 0.
*
* This hook will be called from the start entry code after all modes and
* stack pointers are initialized but before the copying of the exception
* vectors.
*/
void bsp_start_hook_0(void);
/**
* @brief Start entry hook 1.
*
* This hook will be called from the start entry code after copying of the
* exception vectors but before the call to boot_card().
*/
void bsp_start_hook_1(void);
BSP_START_TEXT_SECTION static inline void
bsp_start_memcpy_libc(void *dest, const void *src, size_t n)
{
if (dest != src) {
memcpy(dest, src, n);
}
}
/**
* @brief Copies all standard sections from the load to the runtime area.
*/
BSP_START_TEXT_SECTION static inline void bsp_start_copy_sections(void)
{
/* Copy .text section */
bsp_start_memcpy_libc(
(int *) bsp_section_text_begin,
(const int *) bsp_section_text_load_begin,
(size_t) bsp_section_text_size
);
/* Copy .rodata section */
bsp_start_memcpy_libc(
(int *) bsp_section_rodata_begin,
(const int *) bsp_section_rodata_load_begin,
(size_t) bsp_section_rodata_size
);
/* Copy .data section */
bsp_start_memcpy_libc(
(int *) bsp_section_data_begin,
(const int *) bsp_section_data_load_begin,
(size_t) bsp_section_data_size
);
/* Copy .fast_text section */
bsp_start_memcpy_libc(
(int *) bsp_section_fast_text_begin,
(const int *) bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
/* Copy .fast_data section */
bsp_start_memcpy_libc(
(int *) bsp_section_fast_data_begin,
(const int *) bsp_section_fast_data_load_begin,
(size_t) bsp_section_fast_data_size
);
}
/**
* @brief Copies the .data, .fast_text and .fast_data sections from the load to
* the runtime area using the C library memcpy().
*
* Works only in case the .start, .text and .rodata sections reside in one
* memory region.
*/
BSP_START_TEXT_SECTION static inline void bsp_start_copy_sections_compact(void)
{
/* Copy .data section */
bsp_start_memcpy_libc(
bsp_section_data_begin,
bsp_section_data_load_begin,
(size_t) bsp_section_data_size
);
/* Copy .fast_text section */
bsp_start_memcpy_libc(
bsp_section_fast_text_begin,
bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
/* Copy .fast_data section */
bsp_start_memcpy_libc(
bsp_section_fast_data_begin,
bsp_section_fast_data_load_begin,
(size_t) bsp_section_fast_data_size
);
}
BSP_START_TEXT_SECTION static inline void bsp_start_clear_bss(void)
{
memset(bsp_section_bss_begin, 0, (size_t) bsp_section_bss_size);
}
BSP_START_TEXT_SECTION static inline void
AArch64_start_set_vector_base(void)
{
__asm__ volatile (
"msr VBAR_EL1, %[vtable]\n"
: : [vtable] "r" (bsp_start_vector_table_begin)
);
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_START_H */

88
bsps/aarch64/include/dev/irq/arm-gic-arch.h
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@@ -1,88 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup DevIRQGIC
*
* @brief This header file provides interfaces of the ARM Generic Interrupt
* Controller (GIC) support specific to the AArch64 architecture.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_DEV_IRQ_ARM_GIC_AARCH64_H
#define _RTEMS_DEV_IRQ_ARM_GIC_AARCH64_H
#include <rtems/score/cpu.h>
#include <rtems/score/cpu_irq.h>
#include <bsp/irq-generic.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup DevIRQGIC
*
* @{
*/
static inline uint32_t arm_interrupt_enable_interrupts(void)
{
uint32_t status = _CPU_ISR_Get_level();
/* Enable interrupts for nesting */
_CPU_ISR_Set_level(0);
return status;
}
static inline void arm_interrupt_restore_interrupts(uint32_t status)
{
/* Restore interrupts to previous level */
_CPU_ISR_Set_level(status);
}
static inline void arm_interrupt_facility_set_exception_handler(void)
{
AArch64_set_exception_handler(
AARCH64_EXCEPTION_SPx_IRQ,
_AArch64_Exception_interrupt_no_nest
);
AArch64_set_exception_handler(
AARCH64_EXCEPTION_SP0_IRQ,
_AArch64_Exception_interrupt_nest
);
}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* _RTEMS_DEV_IRQ_ARM_GIC_AARCH64_H */

176
bsps/aarch64/raspberrypi/console/console.c
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@@ -1,176 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
* Copyright (C) 2023 Utkarsh Verma
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/bspIo.h>
#include <bsp.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/irq.h>
#include <bsp/console.h>
#include <bsp/fatal.h>
#include <bsp/rpi-gpio.h>
#include <bspopts.h>
#include <rtems/console.h>
#include <rtems/rtems/status.h>
#include <rtems/termiosdevice.h>
#include <stdint.h>
#define CONSOLE_DEVICE_CONTEXT_NAME(port_no) uart##port_no##_context
#define CONSOLE_DEVICE_CONTEXT( \
port_no, _file_name, regs_base, _size, clock_freq, irq_no, \
context_type, ... \
) \
static context_type CONSOLE_DEVICE_CONTEXT_NAME(port_no) = { \
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART" #port_no), \
.regs = (volatile arm_pl011_uart *) regs_base, \
.clock = clock_freq, \
.initial_baud = 115200, \
.irq = irq_no, \
};
#define CONSOLE_DEVICE( \
port_no, file_name, _base, _size, _clock, _irq,_context_type, dev_handler, \
write_char_func, rx_pin, tx_pin, gpio_func, ... \
) \
[CONSOLE_DEVICE_PORT2ENUM(port_no)] = { \
.file = file_name, \
.context = &CONSOLE_DEVICE_CONTEXT_NAME(port_no).base, \
.gpio = {.rx = rx_pin, .tx = tx_pin, .function = gpio_func}, \
.handler = dev_handler, \
.write_char_polled = write_char_func, \
},
typedef struct {
const unsigned int rx;
const unsigned int tx;
const raspberrypi_gpio_function function;
} raspberrypi_console_device_gpio_config;
typedef struct {
const char* file;
rtems_termios_device_context* context;
const raspberrypi_console_device_gpio_config gpio;
const rtems_termios_device_handler* handler;
void (*write_char_polled)(rtems_termios_device_context*, char);
} raspberrypi_console_device;
/* Initialize all console device contexts */
CONSOLE_DEVICES(CONSOLE_DEVICE_CONTEXT)
/* Initialize all device configurations */
static const raspberrypi_console_device devices[CONSOLE_DEVICE_COUNT] = {
CONSOLE_DEVICES(CONSOLE_DEVICE)
};
static rtems_status_code console_device_init_gpio(
const raspberrypi_console_device_gpio_config *gpio
)
{
rtems_status_code status = raspberrypi_gpio_set_function(
gpio->rx,
gpio->function
);
if (status != RTEMS_SUCCESSFUL)
return status;
status = raspberrypi_gpio_set_function(gpio->tx, gpio->function);
if (status != RTEMS_SUCCESSFUL)
return status;
status = raspberrypi_gpio_set_pull(gpio->rx, GPIO_PULL_NONE);
if (status != RTEMS_SUCCESSFUL)
return status;
status = raspberrypi_gpio_set_pull(gpio->tx, GPIO_PULL_NONE);
return status;
}
static void output_char(const char ch) {
const raspberrypi_console_device* device = &devices[BSP_CONSOLE_PORT];
device->write_char_polled(device->context, ch);
}
static int poll_char(void) {
const raspberrypi_console_device* device = &devices[BSP_CONSOLE_PORT];
return device->handler->poll_read(device->context);
}
rtems_status_code raspberrypi_uart_init(
raspberrypi_console_device_port uart_num
)
{
const raspberrypi_console_device *device = &devices[uart_num];
rtems_status_code status = console_device_init_gpio(&device->gpio);
if (status != RTEMS_SUCCESSFUL) {
return status;
}
status = rtems_termios_device_install(
device->file, device->handler, NULL, device->context
);
return status;
}
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
const raspberrypi_console_device* device = &devices[BSP_CONSOLE_PORT];
rtems_status_code status = raspberrypi_uart_init(BSP_CONSOLE_PORT);
if (status != RTEMS_SUCCESSFUL) {
bsp_fatal(BSP_FATAL_CONSOLE_INSTALL_0);
}
rtems_termios_initialize();
if (link(device->file, CONSOLE_DEVICE_NAME) != 0) {
bsp_fatal(BSP_FATAL_CONSOLE_INSTALL_1);
}
return RTEMS_SUCCESSFUL;
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = poll_char;

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bsps/aarch64/raspberrypi/gpio/gpio.c
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@@ -1,110 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief GPIO Driver
*/
/*
* Copyright (C) 2023 Utkarsh Verma
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/rtems/status.h>
#include <stdint.h>
#include <bsp/rpi-gpio.h>
#include <bsp/raspberrypi.h>
#define BSP_GPIO_BASE BCM2711_GPIO_BASE
#define BSP_GPIO_SIZE BCM2711_GPIO_SIZE
#define BSP_GPIO_PIN_COUNT BCM2711_GPIO_PIN_COUNT
#define GPFSEL0 BCM2835_REG(BSP_GPIO_BASE + 0x00)
#define GPSET0 BCM2835_REG(BSP_GPIO_BASE + 0x1c)
#define GPCLR0 BCM2835_REG(BSP_GPIO_BASE + 0x28)
#define GPIO_PUP_PDN_CTRL_REG0 BCM2835_REG(BSP_GPIO_BASE + 0xe4)
#define FSELn_SIZE 3
#define CLRn_SIZE 1
#define SETn_SIZE 1
#define REG_SET 1
static rtems_status_code raspberrypi_gpio_set_reg(
volatile uint32_t *base_reg,
const unsigned int pin,
const uint32_t value,
const unsigned int field_size
)
{
unsigned int field_mask, n_fields, shift, tmp;
volatile uint32_t *reg;
if (pin > BSP_GPIO_PIN_COUNT)
return RTEMS_INVALID_NUMBER;
field_mask = (1 << field_size) - 1;
if (value > field_mask)
return RTEMS_INVALID_NUMBER;
/* GPIO registers are uniformly subdivided */
n_fields = sizeof(uint32_t) * 8 / field_size;
/* Registers are sequentially mapped for each `n_field` GPIOs */
reg = base_reg + pin / n_fields;
shift = (pin % n_fields) * field_size;
tmp = *reg;
tmp &= ~(field_mask << shift); /* Clear the field */
tmp |= value << shift; /* Set value to the field */
*reg = tmp;
return RTEMS_SUCCESSFUL;
}
rtems_status_code raspberrypi_gpio_set_function(
const unsigned int pin,
const raspberrypi_gpio_function value
)
{
return raspberrypi_gpio_set_reg(&GPFSEL0, pin, value, FSELn_SIZE);
}
rtems_status_code raspberrypi_gpio_clear_pin(const unsigned int pin)
{
return raspberrypi_gpio_set_reg(&GPCLR0, pin, REG_SET, CLRn_SIZE);
}
rtems_status_code raspberrypi_gpio_set_pin(const unsigned int pin)
{
return raspberrypi_gpio_set_reg(&GPSET0, pin, REG_SET, SETn_SIZE);
}
rtems_status_code raspberrypi_gpio_set_pull(
const unsigned int pin,
const raspberrypi_gpio_pull value
)
{
return raspberrypi_gpio_set_reg(&GPIO_PUP_PDN_CTRL_REG0, pin, value, 2);
}

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bsps/aarch64/raspberrypi/include/bsp.h
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@@ -1,73 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief Core BSP definitions
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H
#define LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
/*Raspberry pi MMU initialization */
BSP_START_TEXT_SECTION void raspberrypi_4_setup_mmu_and_cache(void);
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0xFF842000
#define BSP_ARM_GIC_DIST_BASE 0xFF841000
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H */

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bsps/aarch64/raspberrypi/include/bsp/console.h
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@@ -1,71 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2023 Utkarsh Verma
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_CONSOLE_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_CONSOLE_H
#include <bspopts.h>
#include <bsp/raspberrypi-uart.h>
#define CONSOLE_DEVICES RASPBERRYPI_CONSOLE_DEVICES
#define CONSOLE_DEVICE_PORT2ENUM(port_no) UART##port_no
#define CONSOLE_DEVICE_ENUM(port_no, ...) CONSOLE_DEVICE_PORT2ENUM(port_no),
typedef enum {
CONSOLE_DEVICES(CONSOLE_DEVICE_ENUM)
CONSOLE_DEVICE_COUNT,
} raspberrypi_console_device_port;
/**
* @brief Initialize gpio of UART and install UART to the dev directory.
*
* @param uart_num The optional devices are UART0, UART2, UART3, UART4, UART5.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
* @retval RTEMS_NO_MEMORY Not enough memory to create a device node.
* @retval RTEMS_UNSATISFIED Creation of the device file failed.
* @retval RTEMS_INCORRECT_STATE Termios is not initialized.
*/
rtems_status_code raspberrypi_uart_init(
raspberrypi_console_device_port uart_num
);
#undef CONSOLE_DEVICE_ENUM
#endif /* LIBBSP_AARCH64_RASPBERRYPI_BSP_CONSOLE_H */

93
bsps/aarch64/raspberrypi/include/bsp/irq.h
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@@ -1,93 +0,0 @@
/**
* @file
*
* @ingroup raspberrypi_interrupt
*
* @brief Interrupt definitions.
*/
/**
* Copyright (c) 2013 Alan Cudmore
* Copyright (c) 2022 Mohd Noor Aman
* Copyright (c) 2024 Ning Yang
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.org/license/LICENSE
*
*/
#ifndef LIBBSP_ARM_RASPBERRYPI_IRQ_H
#define LIBBSP_ARM_RASPBERRYPI_IRQ_H
#ifndef ASM
#include <rtems.h>
#include <dev/irq/arm-gic-irq.h>
/**
* @defgroup raspberrypi_interrupt Interrrupt Support
*
* @ingroup RTEMSBSPsARMRaspberryPi
*
* @brief Interrupt support.
*/
#define BCM2835_INTC_TOTAL_IRQ 216
#define BCM2835_IRQ_SET1_MIN 0
#define BCM2835_IRQ_SET2_MIN 32
#define BCM2711_IRQ_VC_PERIPHERAL_BASE 96
/* Interrupt Vectors: System Timer */
#define BCM2835_IRQ_ID_GPU_TIMER_M0 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 0)
#define BCM2835_IRQ_ID_GPU_TIMER_M1 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 1)
#define BCM2835_IRQ_ID_GPU_TIMER_M2 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 2)
#define BCM2835_IRQ_ID_GPU_TIMER_M3 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 3)
/* Interrupt Vectors: SPI */
#define BCM2711_IRQ_SPI (BCM2711_IRQ_VC_PERIPHERAL_BASE + 54)
/* Interrupt Vectors: Videocore */
#define BCM2711_IRQ_VC_PERIPHERAL_BASE 96
#define BCM2711_IRQ_AUX (BCM2711_IRQ_VC_PERIPHERAL_BASE + 29)
#define BCM2711_IRQ_PL011_UART (BCM2711_IRQ_VC_PERIPHERAL_BASE + 57)
#define BCM2835_IRQ_ID_USB 9
#define BCM2835_IRQ_ID_AUX 29
#define BCM2835_IRQ_ID_SPI_SLAVE 43
#define BCM2835_IRQ_ID_PWA0 45
#define BCM2835_IRQ_ID_PWA1 46
#define BCM2835_IRQ_ID_SMI 48
#define BCM2835_IRQ_ID_GPIO_0 49
#define BCM2835_IRQ_ID_GPIO_1 50
#define BCM2835_IRQ_ID_GPIO_2 51
#define BCM2835_IRQ_ID_GPIO_3 52
#define BCM2835_IRQ_ID_I2C 53
#define BCM2835_IRQ_ID_SPI 54
#define BCM2835_IRQ_ID_PCM 55
#define BCM2835_IRQ_ID_UART 57
#define BCM2835_IRQ_ID_SD 62
#define BCM2835_IRQ_ID_BASIC_BASE_ID 64
#define BCM2835_IRQ_ID_TIMER_0 64
#define BCM2835_IRQ_ID_MAILBOX_0 65
#define BCM2835_IRQ_ID_DOORBELL_0 66
#define BCM2835_IRQ_ID_DOORBELL_1 67
#define BCM2835_IRQ_ID_GPU0_HALTED 68
#define BCM2835_IRQ_ID_GPU1_HALTED 69
#define BCM2835_IRQ_ID_ILL_ACCESS_1 70
#define BCM2835_IRQ_ID_ILL_ACCESS_0 71
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
#define BSP_VPL011_SPI 32
#define BSP_INTERRUPT_VECTOR_COUNT BCM2835_INTC_TOTAL_IRQ
#define BSP_INTERRUPT_VECTOR_INVALID (UINT32_MAX)
#define BSP_IRQ_COUNT (BCM2835_INTC_TOTAL_IRQ)
#endif /* ASM */
#endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */

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@@ -1,122 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup raspberrypi_4_spi
*
* @brief Raspberry Pi specific SPI definitions.
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H
#define LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H
#include <bsp/utility.h>
#include <bsp/rpi-gpio.h>
typedef struct
{
uint32_t spics;
#define RPI_SPICS_LEN_LONG BSP_BIT32(25)
#define RPI_SPICS_DMA_LEN BSP_BIT32(24)
#define RPI_SPICS_CSPOL2 BSP_BIT32(23)
#define RPI_SPICS_CSPOL1 BSP_BIT32(22)
#define RPI_SPICS_CSPOL0 BSP_BIT32(21)
#define RPI_SPICS_RXF BSP_BIT32(20)
#define RPI_SPICS_RXR BSP_BIT32(19)
#define RPI_SPICS_TXD BSP_BIT32(18)
#define RPI_SPICS_RXD BSP_BIT32(17)
#define RPI_SPICS_DONE BSP_BIT32(16)
#define RPI_SPICS_LEN BSP_BIT32(13)
#define RPI_SPICS_REN BSP_BIT32(12)
#define RPI_SPICS_ADCS BSP_BIT32(11)
#define RPI_SPICS_INTR BSP_BIT32(10)
#define RPI_SPICS_INTD BSP_BIT32(9)
#define RPI_SPICS_DMAEN BSP_BIT32(8)
#define RPI_SPICS_TA BSP_BIT32(7)
#define RPI_SPICS_CSPOL BSP_BIT32(6)
#define RPI_SPICS_CLEAR_TX BSP_BIT32(5)
#define RPI_SPICS_CLEAR_RX BSP_BIT32(4)
#define RPI_SPICS_CPOL BSP_BIT32(3)
#define RPI_SPICS_CPHA BSP_BIT32(2)
#define RPI_SPICS_CS(val) BSP_FLD32(val, 0, 1)
#define RPI_SPICS_CS_SET(reg,val) BSP_FLD32SET(reg, val, 0, 1)
uint32_t spififo;
#define RPI_SPIFIFO_DATA(val) BSP_FLD32(val, 0, 31)
#define RPI_SPIFIFO_DATA_GET(reg) BSP_FLD32GET(reg, 0, 31)
#define RPI_SPIFIFO_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 31)
uint32_t spiclk;
#define RPI_SPICLK_CDIV(val) BSP_FLD32(val, 0, 15)
#define RPI_SPICLK_CDIV_GET(reg) BSP_FLD32GET(reg, 0, 15)
#define RPI_SPICLK_CDIV_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
uint32_t spidlen;
#define RPI_SPIDLEN_LEN(val) BSP_FLD32(val, 0, 15)
#define RPI_SPIDLEN_LEN_GET(reg) BSP_FLD32GET(reg, 0, 15)
#define RPI_SPIDLEN_LEN_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
uint32_t spiltoh;
#define RPI_SPILTOH_TOH(val) BSP_FLD32(val, 0, 3)
#define RPI_SPILTOH_TOH_GET(reg) BSP_FLD32GET(reg, 0, 3)
#define RPI_SPILTOH_TOH_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
uint32_t spidc;
#define RPI_SPIDC_RPANIC(val) BSP_FLD32(val, 24, 31)
#define RPI_SPIDC_RPANIC_GET(reg) BSP_FLD32GET(reg, 24, 31)
#define RPI_SPIDC_RPANIC_SET(reg, val) BSP_FLD32SET(reg, val, 24, 31)
#define RPI_SPIDC_RDREQ(val) BSP_FLD32(val, 16, 23)
#define RPI_SPIDC_RDREQ_GET(reg) BSP_FLD32GET(reg, 16, 23)
#define RPI_SPIDC_RDREQ_SET(reg, val) BSP_FLD32SET(reg, val, 16, 23)
#define RPI_SPIDC_TPANIC(val) BSP_FLD32(val, 8, 15)
#define RPI_SPIDC_TPANIC_GET(reg) BSP_FLD32GET(reg, 8, 15)
#define RPI_SPIDC_TPANIC_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
#define RPI_SPIDC_TDREQ(val) BSP_FLD32(val, 0, 7)
#define RPI_SPIDC_TDREQ_GET(reg) BSP_FLD32GET(reg, 0, 7)
#define RPI_SPIDC_TDREQ_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
} raspberrypi_spi;
typedef enum {
raspberrypi_SPI0,
raspberrypi_SPI3,
raspberrypi_SPI4,
raspberrypi_SPI5,
raspberrypi_SPI6
} raspberrypi_spi_device;
/**
* @brief Register a spi device.
*
* @param device The optional devices are raspberrypi_SPI0, raspberrypi_SPI3,
* raspberrypi_SPI4, raspberrypi_SPI5, raspberrypi_SPI6.
*
* @retval RTEMS_SUCCESSFUL Successfully registered SPI device.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
* @retval RTEMS_UNSATISFIED This status code indicates that the request was
* not satisfied.
*/
rtems_status_code raspberrypi_spi_init(raspberrypi_spi_device device);
#endif /* LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H */

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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Raspberry Pi 4B Console Device Definitions
*/
/*
* Copyright (C) 2023 Utkarsh Verma
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_RASPBERRYPI_UART_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_RASPBERRYPI_UART_H
#include <bspopts.h>
#include <bsp/irq.h>
#include <bsp/raspberrypi.h>
#include <bsp/rpi-gpio.h>
#include <dev/serial/arm-pl011.h>
/*
* This macro exists to serve as a common point of definition for the
* parameters of the UARTs present in the Raspberry Pi 4. It is used in
* multiple locations with different rendering macros to prevent duplication
* of information.
*/
#define RASPBERRYPI_CONSOLE_DEVICES(CONSOLE_DEVICE_DEFINITION_RENDERER) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
0, "/dev/ttyAMA0", BCM2711_UART0_BASE,BCM2711_UART0_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 15, 14, GPIO_AF0) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
2, "/dev/ttyAMA1", BCM2711_UART2_BASE, BCM2711_UART2_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 1, 0, GPIO_AF4) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
3, "/dev/ttyAMA2", BCM2711_UART3_BASE, BCM2711_UART3_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 5, 4, GPIO_AF4) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
4, "/dev/ttyAMA3", BCM2711_UART4_BASE, BCM2711_UART4_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 9, 8, GPIO_AF4) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
5, "/dev/ttyAMA4", BCM2711_UART5_BASE, BCM2711_UART5_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 13, 12, GPIO_AF4)
#endif /* LIBBSP_AARCH64_RASPBERRYPI_BSP_RASPBERRYPI_UART_H */

527
bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
View File

@@ -1,527 +0,0 @@
/**
* @file
*
* @ingroup raspberrypi_4_regs
*
* @brief Register definitions.
*/
/*
* Copyright (c) 2022 Mohd Noor Aman
* Copyright (c) 2024 Ning Yang
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.org/license/LICENSE
*
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_RASPBERRYPI_4_H
#define LIBBSP_AARCH64_RASPBERRYPI_RASPBERRYPI_4_H
#include <bspopts.h>
#include <stdint.h>
#include <bsp/utility.h>
/**
* @defgroup raspberrypi_reg Register Definitions
*
* @ingroup RTEMSBSPsARMRaspberryPi
*
* @brief Register Definitions
*
* @{
*/
/**
* @name Register Macros
*
* @{
*/
#define BCM2711_REG(x) (*(volatile uint64_t *)(x))
#define BCM2711_BIT(n) (1 << (n))
#define BCM2835_REG(addr) (*(volatile uint32_t*)(addr))
/** @} */
/**
* @name Peripheral Base Register Address
*
* @{
*/
#define RPI_PERIPHERAL_BASE 0xFE000000
#define BASE_OFFSET 0xFE000000
#define RPI_PERIPHERAL_SIZE 0x01800000
/**
* @name Bus to Physical address translation
* Macro.
* @{
*/
#define BUS_TO_PHY(x) ((x) - BASE_OFFSET)
/** @} */
/**
* @name Internal ARM Timer Registers
*
* @{
*/
#define BCM2711_CLOCK_FREQ 250000000
#define BCM2711_TIMER_BASE (RPI_PERIPHERAL_BASE + 0xB400)
#define BCM2711_TIMER_LOD (BCM2711_TIMER_BASE + 0x00)
#define BCM2711_TIMER_VAL (BCM2711_TIMER_BASE + 0x04)
#define BCM2711_TIMER_CTL (BCM2711_TIMER_BASE + 0x08)
#define BCM2711_TIMER_CLI (BCM2711_TIMER_BASE + 0x0C)
#define BCM2711_TIMER_RIS (BCM2711_TIMER_BASE + 0x10)
#define BCM2711_TIMER_MIS (BCM2711_TIMER_BASE + 0x14)
#define BCM2711_TIMER_RLD (BCM2711_TIMER_BASE + 0x18)
#define BCM2711_TIMER_DIV (BCM2711_TIMER_BASE + 0x1C)
#define BCM2711_TIMER_CNT (BCM2711_TIMER_BASE + 0x20)
#define BCM2711_TIMER_PRESCALE 0xF9
/** @} */
/**
* @name Power Management and Watchdog Registers
*
* @{
*/
#define BCM2711_PM_PASSWD_MAGIC 0x5a000000
#define BCM2711_PM_BASE (RPI_PERIPHERAL_BASE + 0x100000)
#define BCM2711_PM_GNRIC (BCM2711_PM_BASE + 0x00)
#define BCM2711_PM_GNRIC_POWUP 0x00000001
#define BCM2711_PM_GNRIC_POWOK 0x00000002
#define BCM2711_PM_GNRIC_ISPOW 0x00000004
#define BCM2711_PM_GNRIC_MEMREP 0x00000008
#define BCM2711_PM_GNRIC_MRDONE 0x00000010
#define BCM2711_PM_GNRIC_ISFUNC 0x00000020
#define BCM2711_PM_GNRIC_RSTN 0x00000fc0
#define BCM2711_PM_GNRIC_ENAB 0x00001000
#define BCM2711_PM_GNRIC_CFG 0x007f0000
#define BCM2711_PM_AUDIO (BCM2711_PM_BASE + 0x04)
#define BCM2711_PM_AUDIO_APSM 0x000fffff
#define BCM2711_PM_AUDIO_CTRLEN 0x00100000
#define BCM2711_PM_AUDIO_RSTN 0x00200000
#define BCM2711_PM_STATUS (BCM2711_PM_BASE + 0x18)
#define BCM2711_PM_RSTC (BCM2711_PM_BASE + 0x1c)
#define BCM2711_PM_RSTC_DRCFG 0x00000003
#define BCM2711_PM_RSTC_WRCFG 0x00000030
#define BCM2711_PM_RSTC_WRCFG_FULL 0x00000020
#define BCM2711_PM_RSTC_WRCFG_CLR 0xffffffcf
#define BCM2711_PM_RSTC_SRCFG 0x00000300
#define BCM2711_PM_RSTC_QRCFG 0x00003000
#define BCM2711_PM_RSTC_FRCFG 0x00030000
#define BCM2711_PM_RSTC_HRCFG 0x00300000
#define BCM2711_PM_RSTC_RESET 0x00000102
#define BCM2711_PM_RSTS (BCM2711_PM_BASE + 0x20)
#define BCM2711_PM_RSTS_HADDRQ 0x00000001
#define BCM2711_PM_RSTS_HADDRF 0x00000002
#define BCM2711_PM_RSTS_HADDRH 0x00000004
#define BCM2711_PM_RSTS_HADWRQ 0x00000010
#define BCM2711_PM_RSTS_HADWRF 0x0000002
#define BCM2711_PM_RSTS_HADWRH 0x00000040
#define BCM2711_PM_RSTS_HADSRQ 0x00000100
#define BCM2711_PM_RSTS_HADSRF 0x00000200
#define BCM2711_PM_RSTS_HADSRH 0x00000400
#define BCM2711_PM_RSTS_HADPOR 0x00001000
#define BCM2711_PM_WDOG (BCM2711_PM_BASE + 0x24)
#define BCM2711_PM_WDOG_MASK 0x000fffff
/** @} */
/** @} */
/**
* @name AUX Registers
*
* @{
*/
#define BCM2711_AUX_BASE (RPI_PERIPHERAL_BASE + 0x215000)
#define AUX_ENABLES (BCM2711_AUX_BASE + 0x04)
#define AUX_MU_IO_REG (BCM2711_AUX_BASE + 0x40)
#define AUX_MU_IER_REG (BCM2711_AUX_BASE + 0x44)
#define AUX_MU_IIR_REG (BCM2711_AUX_BASE + 0x48)
#define AUX_MU_LCR_REG (BCM2711_AUX_BASE + 0x4C)
#define AUX_MU_MCR_REG (BCM2711_AUX_BASE + 0x50)
#define AUX_MU_LSR_REG (BCM2711_AUX_BASE + 0x54)
#define AUX_MU_MSR_REG (BCM2711_AUX_BASE + 0x58)
#define AUX_MU_SCRATCH (BCM2711_AUX_BASE + 0x5C)
#define AUX_MU_CNTL_REG (BCM2711_AUX_BASE + 0x60)
#define AUX_MU_STAT_REG (BCM2711_AUX_BASE + 0x64)
#define AUX_MU_BAUD_REG (BCM2711_AUX_BASE + 0x68)
/** @} */
/**
* @name PL011 UARTs
*
* @{
*/
#define BCM2711_PL011_BASE (RPI_PERIPHERAL_BASE + 0x201000)
#define BCM2711_PL011_SIZE 0xc00
#define BCM2711_PL011_DEVICE_SIZE 0x200
#define BCM2711_UART0_BASE (BCM2711_PL011_BASE + 0x000)
#define BCM2711_UART0_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART2_BASE (BCM2711_PL011_BASE + 0x400)
#define BCM2711_UART2_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART3_BASE (BCM2711_PL011_BASE + 0x600)
#define BCM2711_UART3_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART4_BASE (BCM2711_PL011_BASE + 0x800)
#define BCM2711_UART4_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART5_BASE (BCM2711_PL011_BASE + 0xa00)
#define BCM2711_UART5_SIZE BCM2711_PL011_DEVICE_SIZE
/** @} */
/**
* @name GPU Timer Registers
*
* @{
*/
/**
* NOTE: The GPU uses Compare registers 0 and 2 for
* it's own RTOS. 1 and 3 are available for use in
* RTEMS.
*/
#define BCM2711_GPU_TIMER_BASE (RPI_PERIPHERAL_BASE + 0x3000)
#define BCM2711_GPU_TIMER_CS (BCM2711_GPU_TIMER_BASE + 0x00)
#define BCM2711_GPU_TIMER_CS_M0 0x00000001
#define BCM2711_GPU_TIMER_CS_M1 0x00000002
#define BCM2711_GPU_TIMER_CS_M2 0x00000004
#define BCM2711_GPU_TIMER_CS_M3 0x00000008
#define BCM2711_GPU_TIMER_CLO (BCM2711_GPU_TIMER_BASE + 0x04)
#define BCM2711_GPU_TIMER_CHI (BCM2711_GPU_TIMER_BASE + 0x08)
#define BCM2711_GPU_TIMER_C0 (BCM2711_GPU_TIMER_BASE + 0x0C)
#define BCM2711_GPU_TIMER_C1 (BCM2711_GPU_TIMER_BASE + 0x10)
#define BCM2711_GPU_TIMER_C2 (BCM2711_GPU_TIMER_BASE + 0x14)
#define BCM2711_GPU_TIMER_C3 (BCM2711_GPU_TIMER_BASE + 0x18)
/**
* NOTE: compatible with the BCM2835 system timer
*/
#define BCM2835_GPU_TIMER_CS_M3 BCM2711_GPU_TIMER_CS_M3
#define BCM2835_GPU_TIMER_C3 BCM2711_GPU_TIMER_C3
#define BCM2835_GPU_TIMER_CLO BCM2711_GPU_TIMER_CLO
#define BCM2835_GPU_TIMER_CS BCM2711_GPU_TIMER_CS
/** @} */
/**
* @name GPIO Registers
*
* @{
*/
#define BCM2711_GPIO_BASE (RPI_PERIPHERAL_BASE + 0x200000)
#define BCM2711_GPIO_SIZE 0xf4
#define BCM2711_GPIO_PIN_COUNT 58
/** @} */
/**
* @name EMMC Registers
*
* @{
*/
/**
* NOTE: Since the SD controller follows the SDHCI standard,
* the rtems-libbsd tree already provides the remaining registers.
*/
#define BCM2711_EMMC_BASE (RPI_PERIPHERAL_BASE + 0x300000)
/** @} */
/**
* @name SPI Registers
*
* @{
*/
#define BCM2711_SPI0_BASE (RPI_PERIPHERAL_BASE + 0x204000)
#define BCM2711_SPI3_BASE (RPI_PERIPHERAL_BASE + 0x204600)
#define BCM2711_SPI4_BASE (RPI_PERIPHERAL_BASE + 0x204800)
#define BCM2711_SPI5_BASE (RPI_PERIPHERAL_BASE + 0x204A00)
#define BCM2711_SPI6_BASE (RPI_PERIPHERAL_BASE + 0x204C00)
/** @} */
/**
* @name Mailbox Registers
*
* @{
*/
#define BCM2711_MBOX_BASE (RPI_PERIPHERAL_BASE+0xB880)
#define BCM2711_MBOX_READ (BCM2711_MBOX_BASE+0x00)
#define BCM2711_MBOX_PEEK (BCM2711_MBOX_BASE+0x10)
#define BCM2711_MBOX_SENDER (BCM2711_MBOX_BASE+0x14)
#define BCM2711_MBOX_STATUS (BCM2711_MBOX_BASE+0x18)
#define BCM2711_MBOX_WRITE (BCM2711_MBOX_BASE+0x20)
#define BCM2711_MBOX_CONFIG (BCM2711_MBOX_BASE+0x1C)
#define BCM2711_MBOX_RESPONSE 0x80000000
#define BCM2711_MBOX_FULL 0x80000000
#define BCM2711_MBOX_EMPTY 0x40000000
/** @} */
/**
* @name Mailbox Channels
*
* @{
*/
/* Power Manager channel */
#define BCM2711_MBOX_CHANNEL_PM 0
/* Framebuffer channel */
#define BCM2711_MBOX_CHANNEL_FB 1
/* Virtual UART channel */
#define BCM2711_MBOX_CHANNEL_VUART 2
/* VCHIQ channel */
#define BCM2711_MBOX_CHANNEL_VCHIQ 3
/* LEDs channel */
#define BCM2711_MBOX_CHANNEL_LED 4
/* Button channel */
#define BCM2711_MBOX_CHANNEL_BUTTON 5
/* Touch screen channel */
#define BCM2711_MBOX_CHANNEL_TOUCHS 6
#define BCM2711_MBOX_CHANNEL_COUNT 7
/* Property tags (ARM <-> VC) channel */
#define BCM2711_MBOX_CHANNEL_PROP_AVC 8
/* Property tags (VC <-> ARM) channel */
#define BCM2711_MBOX_CHANNEL_PROP_VCA 9
/** @} */
/**
* @name Raspberry Pi 2 Interrupt Register Defines
*
* @{
*/
/* Timers interrupt control registers */
#define BCM2711_CORE0_TIMER_IRQ_CTRL_BASE 0xFF800040
#define BCM2711_CORE1_TIMER_IRQ_CTRL_BASE 0xFF800044
#define BCM2711_CORE2_TIMER_IRQ_CTRL_BASE 0xFF800048
#define BCM2711_CORE3_TIMER_IRQ_CTRL_BASE 0xFF80004C
#define BCM2711_CORE_TIMER_IRQ_CTRL(cpuidx) \
(BCM2711_CORE0_TIMER_IRQ_CTRL_BASE + 0x4 * (cpuidx))
/**
* @name Raspberry Pi 4 ARM_LOCAL registers
*
* @{
*/
#define BCM2711_LOCAL_REGS_BASE 0x4C0000000
#define BCM2711_LOCAL_REGS_SIZE 0x100
#define BCM2711_LOCAL_ARM_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x00)
#define BCM2711_LOCAL_CORE_IRQ_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x0c)
#define BCM2711_LOCAL_PMU_CONTROL_SET (BCM2711_LOCAL_REGS_BASE + 0x10)
#define BCM2711_LOCAL_PMU_CONTROL_CLR (BCM2711_LOCAL_REGS_BASE + 0x14)
#define BCM2711_LOCAL_PERI_IRQ_ROUTE0 (BCM2711_LOCAL_REGS_BASE + 0x24)
#define BCM2711_LOCAL_AXI_QUIET_TIME (BCM2711_LOCAL_REGS_BASE + 0x30)
#define BCM2711_LOCAL_LOCAL_TIMER_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x34)
#define BCM2711_LOCAL_LOCAL_TIMER_IRQ (BCM2711_LOCAL_REGS_BASE + 0x38)
#define BCM2711_LOCAL_TIMER_CNTRL0 (BCM2711_LOCAL_REGS_BASE + 0x40)
#define BCM2711_LOCAL_TIMER_CNTRL1 (BCM2711_LOCAL_REGS_BASE + 0x44)
#define BCM2711_LOCAL_TIMER_CNTRL2 (BCM2711_LOCAL_REGS_BASE + 0x48)
#define BCM2711_LOCAL_TIMER_CNTRL3 (BCM2711_LOCAL_REGS_BASE + 0x4c)
#define BCM2711_LOCAL_MAILBOX_CNTRL0 (BCM2711_LOCAL_REGS_BASE + 0x50)
#define BCM2711_LOCAL_MAILBOX_CNTRL1 (BCM2711_LOCAL_REGS_BASE + 0x54)
#define BCM2711_LOCAL_MAILBOX_CNTRL2 (BCM2711_LOCAL_REGS_BASE + 0x58)
#define BCM2711_LOCAL_MAILBOX_CNTRL3 (BCM2711_LOCAL_REGS_BASE + 0x5c)
#define BCM2711_LOCAL_IRQ_SOURCE0 (BCM2711_LOCAL_REGS_BASE + 0x60)
#define BCM2711_LOCAL_IRQ_SOURCE1 (BCM2711_LOCAL_REGS_BASE + 0x64)
#define BCM2711_LOCAL_IRQ_SOURCE2 (BCM2711_LOCAL_REGS_BASE + 0x68)
#define BCM2711_LOCAL_IRQ_SOURCE3 (BCM2711_LOCAL_REGS_BASE + 0x6c)
#define BCM2711_LOCAL_FIQ_SOURCE0 (BCM2711_LOCAL_REGS_BASE + 0x70)
#define BCM2711_LOCAL_FIQ_SOURCE1 (BCM2711_LOCAL_REGS_BASE + 0x74)
#define BCM2711_LOCAL_FIQ_SOURCE2 (BCM2711_LOCAL_REGS_BASE + 0x78)
#define BCM2711_LOCAL_FIQ_SOURCE3 (BCM2711_LOCAL_REGS_BASE + 0x7c)
/**
* @name Raspberry Pi 4 Mailbox registers
*
* @{
*/
#define BCM2711_MAILBOX_00_WRITE_SET_BASE 0x4C000080
#define BCM2711_MAILBOX_01_WRITE_SET_BASE 0x4C000084
#define BCM2711_MAILBOX_02_WRITE_SET_BASE 0x4C000088
#define BCM2711_MAILBOX_03_WRITE_SET_BASE 0x4C00008C
#define BCM2711_MAILBOX_04_WRITE_SET_BASE 0x4C000090
#define BCM2711_MAILBOX_05_WRITE_SET_BASE 0x4C000094
#define BCM2711_MAILBOX_06_WRITE_SET_BASE 0x4C000098
#define BCM2711_MAILBOX_07_WRITE_SET_BASE 0x4C00009C
#define BCM2711_MAILBOX_08_WRITE_SET_BASE 0x4C0000A0
#define BCM2711_MAILBOX_09_WRITE_SET_BASE 0x4C0000A4
#define BCM2711_MAILBOX_10_WRITE_SET_BASE 0x4C0000A8
#define BCM2711_MAILBOX_11_WRITE_SET_BASE 0x4C0000AC
#define BCM2711_MAILBOX_12_WRITE_SET_BASE 0x4C0000B0
#define BCM2711_MAILBOX_13_WRITE_SET_BASE 0x4C0000B4
#define BCM2711_MAILBOX_14_WRITE_SET_BASE 0x4C0000B8
#define BCM2711_MAILBOX_15_WRITE_SET_BASE 0x4C0000BC
#define BCM2711_MAILBOX_00_READ_CLEAR_BASE 0x4C0000C0
#define BCM2711_MAILBOX_01_READ_CLEAR_BASE 0x4C0000C4
#define BCM2711_MAILBOX_02_READ_CLEAR_BASE 0x4C0000C8
#define BCM2711_MAILBOX_03_READ_CLEAR_BASE 0x4C0000CC
#define BCM2711_MAILBOX_04_READ_CLEAR_BASE 0x4C0000D0
#define BCM2711_MAILBOX_05_READ_CLEAR_BASE 0x4C0000D4
#define BCM2711_MAILBOX_06_READ_CLEAR_BASE 0x4C0000D8
#define BCM2711_MAILBOX_07_READ_CLEAR_BASE 0x4C0000DC
#define BCM2711_MAILBOX_08_READ_CLEAR_BASE 0x4C0000E0
#define BCM2711_MAILBOX_09_READ_CLEAR_BASE 0x4C0000E4
#define BCM2711_MAILBOX_10_READ_CLEAR_BASE 0x4C0000E8
#define BCM2711_MAILBOX_11_READ_CLEAR_BASE 0x4C0000EC
#define BCM2711_MAILBOX_12_READ_CLEAR_BASE 0x4C0000F0
#define BCM2711_MAILBOX_13_READ_CLEAR_BASE 0x4C0000F4
#define BCM2711_MAILBOX_14_READ_CLEAR_BASE 0x4C0000F8
#define BCM2711_MAILBOX_15_READ_CLEAR_BASE 0x4C0000FC
/**
* @name Raspberry Pi 4 ARM_C FIQ and IRQ registers
*
* @{
*/
#define BCM2711_ARMC_REGS_BASE (RPI_PERIPHERAL_BASE + 0xB200)
#define BCM2711_ARMC_REGS_SIZE 0x200
#define BCM2711_ARMC_IRQ0_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x00)
#define BCM2711_ARMC_IRQ0_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x04)
#define BCM2711_ARMC_IRQ0_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x08)
#define BCM2711_ARMC_IRQ0_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x10)
#define BCM2711_ARMC_IRQ0_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x14)
#define BCM2711_ARMC_IRQ0_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x18)
#define BCM2711_ARMC_IRQ0_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x20)
#define BCM2711_ARMC_IRQ0_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x24)
#define BCM2711_ARMC_IRQ0_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x28)
#define BCM2711_ARMC_IRQ_STATUS0 (BCM2711_ARMC_REGS_BASE + 0x30)
#define BCM2711_ARMC_IRQ_STATUS1 (BCM2711_ARMC_REGS_BASE + 0x34)
#define BCM2711_ARMC_IRQ_STATUS2 (BCM2711_ARMC_REGS_BASE + 0x38)
#define BCM2711_ARMC_IRQ1_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x40)
#define BCM2711_ARMC_IRQ1_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x44)
#define BCM2711_ARMC_IRQ1_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x48)
#define BCM2711_ARMC_IRQ1_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x50)
#define BCM2711_ARMC_IRQ1_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x54)
#define BCM2711_ARMC_IRQ1_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x58)
#define BCM2711_ARMC_IRQ1_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x60)
#define BCM2711_ARMC_IRQ1_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x64)
#define BCM2711_ARMC_IRQ1_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x68)
#define BCM2711_ARMC_IRQ2_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x80)
#define BCM2711_ARMC_IRQ2_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x84)
#define BCM2711_ARMC_IRQ2_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x88)
#define BCM2711_ARMC_IRQ2_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x90)
#define BCM2711_ARMC_IRQ2_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x94)
#define BCM2711_ARMC_IRQ2_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x98)
#define BCM2711_ARMC_IRQ2_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0xA0)
#define BCM2711_ARMC_IRQ2_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0xA4)
#define BCM2711_ARMC_IRQ2_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0xA8)
#define BCM2711_ARMC_IRQ3_PENDING0 (BCM2711_ARMC_REGS_BASE + 0xC0)
#define BCM2711_ARMC_IRQ3_PENDING1 (BCM2711_ARMC_REGS_BASE + 0xC4)
#define BCM2711_ARMC_IRQ3_PENDING2 (BCM2711_ARMC_REGS_BASE + 0xC8)
#define BCM2711_ARMC_IRQ3_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0xD0)
#define BCM2711_ARMC_IRQ3_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0xD4)
#define BCM2711_ARMC_IRQ3_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0xD8)
#define BCM2711_ARMC_IRQ3_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0xE0)
#define BCM2711_ARMC_IRQ3_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0xE4)
#define BCM2711_ARMC_IRQ3_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0xE8)
#define BCM2711_ARMC_FIQ0_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x100)
#define BCM2711_ARMC_FIQ0_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x104)
#define BCM2711_ARMC_FIQ0_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x108)
#define BCM2711_ARMC_FIQ0_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x110)
#define BCM2711_ARMC_FIQ0_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x114)
#define BCM2711_ARMC_FIQ0_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x118)
#define BCM2711_ARMC_FIQ0_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x120)
#define BCM2711_ARMC_FIQ0_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x124)
#define BCM2711_ARMC_FIQ0_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x128)
#define BCM2711_ARMC_FIQ1_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x140)
#define BCM2711_ARMC_FIQ1_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x144)
#define BCM2711_ARMC_FIQ1_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x148)
#define BCM2711_ARMC_FIQ1_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x150)
#define BCM2711_ARMC_FIQ1_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x154)
#define BCM2711_ARMC_FIQ1_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x158)
#define BCM2711_ARMC_FIQ1_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x160)
#define BCM2711_ARMC_FIQ1_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x164)
#define BCM2711_ARMC_FIQ1_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x168)
#define BCM2711_ARMC_FIQ2_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x180)
#define BCM2711_ARMC_FIQ2_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x184)
#define BCM2711_ARMC_FIQ2_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x188)
#define BCM2711_ARMC_FIQ2_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x190)
#define BCM2711_ARMC_FIQ2_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x194)
#define BCM2711_ARMC_FIQ2_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x198)
#define BCM2711_ARMC_FIQ2_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1A0)
#define BCM2711_ARMC_FIQ2_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1A4)
#define BCM2711_ARMC_FIQ2_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1A8)
#define BCM2711_ARMC_FIQ3_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x1C0)
#define BCM2711_ARMC_FIQ3_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x1C4)
#define BCM2711_ARMC_FIQ3_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x1C8)
#define BCM2711_ARMC_FIQ3_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1D0)
#define BCM2711_ARMC_FIQ3_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1D4)
#define BCM2711_ARMC_FIQ3_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1D8)
#define BCM2711_ARMC_FIQ3_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1E0)
#define BCM2711_ARMC_FIQ3_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1E4)
#define BCM2711_ARMC_FIQ3_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1E8)
#define BCM2711_ARMC_SWIRQ_SET (BCM2711_ARMC_REGS_BASE + 0x1F0)
#define BCM2711_ARMC_SWIRQ_CLEAR (BCM2711_ARMC_REGS_BASE + 0x1F4)
/** @} */
#endif /* LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H */

118
bsps/aarch64/raspberrypi/include/bsp/rpi-gpio.h
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@@ -1,118 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Raspberry Pi 4B specific GPIO definitions.
*/
/*
* Copyright (C) 2023 Utkarsh Verma
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_GPIO_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_GPIO_H
#include <bspopts.h>
#include <rtems/rtems/status.h>
/**
* @brief Raspberry Pi GPIO functions.
*/
typedef enum {
GPIO_INPUT,
GPIO_OUTPUT,
GPIO_AF5,
GPIO_AF4,
GPIO_AF0,
GPIO_AF1,
GPIO_AF2,
GPIO_AF3,
} raspberrypi_gpio_function;
typedef enum {
GPIO_PULL_NONE,
GPIO_PULL_UP,
GPIO_PULL_DOWN,
} raspberrypi_gpio_pull;
/**
* @brief Set the operation of the general-purpose I/O pins. Each of the 58
* GPIO pins has at least two alternative functions as defined.
*
* @param pin The GPIO pin.
* @param value The optional functions are GPIO_INPUT, GPIO_OUTPUT, GPIO_AF5,
* GPIO_AF4, GPIO_AF0, GPIO_AF1, GPIO_AF2, GPIO_AF3.
*
* @retval RTEMS_SUCCESSFUL GPIO function successfully configured.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_set_function(
const unsigned int pin,
const raspberrypi_gpio_function value
);
/**
* @brief Set a GPIO pin.
*
* @param pin The GPIO pin.
*
* @retval RTEMS_SUCCESSFUL GPIO pin set successfully.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_set_pin(const unsigned int pin);
/**
* @brief Clear a GPIO pin.
*
* @param pin The GPIO pin.
*
* @retval RTEMS_SUCCESSFUL GPIO pin clear successfully.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_clear_pin(const unsigned int pin);
/**
* @brief Control the actuation of the internal pull-up/down resistors.
*
* @param pin The GPIO pin.
* @param value The optional value are GPIO_PULL_NONE, GPIO_PULL_UP,
* GPIO_PULL_DOWN.
*
* @retval RTEMS_SUCCESSFUL GPIO pull set successfully.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_set_pull(
const unsigned int pin,
const raspberrypi_gpio_pull value
);
#endif /* LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_GPIO_H */

97
bsps/aarch64/raspberrypi/include/bsp/watchdog.h
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@@ -1,97 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief API of the Watchdog driver for the raspberrypi4 bsp in RTEMS.
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_WATCHDOG_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_WATCHDOG_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @note a brief example of expected usage.
*
* void raspberrypi_watchdog_example()
* {
* raspberrypi_watchdog_init();
* raspberrypi_watchdog_start(15000);
*
* raspberrypi_watchdog_reload();
* ...
* raspberrypi_watchdog_reload();
*
* raspberrypi_watchdog_stop();
* }
*
*/
/**
* @brief Initialize BSP watchdog routines.
*/
void raspberrypi_watchdog_init(void);
/**
* @brief Turn on the watchdog / begin the counter at the desired value.
*
* @param timeout Watchdog timeout value in ms.
* The watchdog device has 20 bits of timeout, so it only
* supports a maximum of 15999 ms for its timeout.
* This value should be between 0 and 15999.
*/
void raspberrypi_watchdog_start(uint32_t timeout_ms);
/**
* @brief Turn off the watchdog.
*/
void raspberrypi_watchdog_stop(void);
/**
* @brief Reload watchdog.
*/
void raspberrypi_watchdog_reload(void);
/**
* @brief Get the remaining time of the watchdog.
* The return value is still valid when the watchdog has been stopped.
*
* @retval Watchdog remaining time in ms.
*/
uint32_t raspberrypi_watchdog_get_remaining_time(void);
#ifdef __cplusplus
}
#endif
#endif

46
bsps/aarch64/raspberrypi/include/tm27.h
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@@ -1,46 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief BSP tm27 header
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

582
bsps/aarch64/raspberrypi/spi/raspberrypi-spi.c
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@@ -1,582 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief SPI Driver
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/irq.h>
#include <bsp/raspberrypi.h>
#include <bsp/raspberrypi-spi.h>
#include <bsp/rpi-gpio.h>
#include <dev/spi/spi.h>
#include <bspopts.h>
typedef struct {
spi_bus base;
volatile raspberrypi_spi *regs;
const spi_ioc_transfer *msg;
uint32_t msg_todo;
uint8_t *rx_buf;
const uint8_t *tx_buf;
uint32_t todo;
uint8_t num_cs;
uint32_t in_transfer;
rtems_id task_id;
rtems_vector_number irq;
}raspberrypi_spi_bus;
static int raspberrypi_spi_check_msg(
raspberrypi_spi_bus *bus,
const spi_ioc_transfer *msg,
uint32_t n
)
{
while (n > 0) {
if (msg->bits_per_word != 8) {
return -EINVAL;
}
if ((msg->mode &
~(SPI_CPHA | SPI_CPOL | SPI_NO_CS)) != 0) {
return -EINVAL;
}
if (msg->cs >= bus->num_cs) {
return -EINVAL;
}
++msg;
--n;
}
return 0;
}
/* Calculates a clock divider to be used with the GPU core clock rate
* to set a SPI clock rate the closest (<=) to a desired frequency. */
static rtems_status_code rpi_spi_calculate_clock_divider(
uint32_t clock_hz,
uint16_t *clock_divider
)
{
uint16_t divider;
uint32_t clock_rate;
/* Calculates an initial clock divider. */
divider = GPU_CORE_CLOCK_RATE / clock_hz;
/* Because the divider must be a power of two (as per the BCM2835 datasheet),
* calculate the next greater power of two. */
--divider;
divider |= (divider >> 1);
divider |= (divider >> 2);
divider |= (divider >> 4);
divider |= (divider >> 8);
++divider;
clock_rate = GPU_CORE_CLOCK_RATE / divider;
/* If the resulting clock rate is greater than the desired frequency,
* try the next greater power of two divider. */
while (clock_rate > clock_hz) {
divider = (divider << 1);
clock_rate = GPU_CORE_CLOCK_RATE / divider;
}
*clock_divider = divider;
return RTEMS_SUCCESSFUL;
}
static int raspberrypi_spi_config(
raspberrypi_spi_bus *bus,
volatile raspberrypi_spi *regs,
uint32_t speed_hz,
uint32_t mode,
uint8_t cs
)
{
spi_bus *base = &bus->base;
uint32_t spics = regs->spics;
rtems_status_code sc;
uint16_t clock_divider;
/* Calculate the most appropriate clock divider. */
sc = rpi_spi_calculate_clock_divider(speed_hz, &clock_divider);
if (sc != RTEMS_SUCCESSFUL) {
return sc;
}
/* Set the bus clock divider. */
regs->spiclk = RPI_SPICLK_CDIV_SET(regs->spiclk, clock_divider);
if ((mode & SPI_CPHA) != 0) {
spics |= RPI_SPICS_CPHA;
} else {
spics &= ~RPI_SPICS_CPHA;
}
if ((mode & SPI_CPOL) != 0) {
spics |= RPI_SPICS_CPOL;
} else {
spics &= ~RPI_SPICS_CPOL;
}
if ((mode & SPI_CS_HIGH) != 0) {
spics |= RPI_SPICS_CSPOL;
} else {
spics &= ~RPI_SPICS_CSPOL;
}
spics = RPI_SPICS_CS_SET(spics, cs);
regs->spics = spics;
base->speed_hz = speed_hz;
base->mode = mode;
base->cs = cs;
return 0;
}
#ifdef BSP_SPI_USE_INTERRUPTS
static void raspberrypi_spi_done(raspberrypi_spi_bus *bus)
{
volatile raspberrypi_spi *regs;
regs = bus->regs;
regs->spics = regs->spics & ~RPI_SPICS_TA;
rtems_event_transient_send(bus->task_id);
}
static bool raspberrpi_spi_TX_FULL(volatile raspberrypi_spi *regs)
{
return !(regs->spics & RPI_SPICS_TXD);
}
static void raspberrypi_spi_push(
raspberrypi_spi_bus *bus,
volatile raspberrypi_spi *regs
)
{
uint8_t val;
while (bus->todo > 0 && !raspberrpi_spi_TX_FULL(regs)) {
val = 0;
if (bus->tx_buf != NULL) {
val = *bus->tx_buf;
++bus->tx_buf;
}
--bus->todo;
regs->spififo = val;
++bus->in_transfer;
}
}
static void raspberrypi_spi_next_msg(raspberrypi_spi_bus *bus)
{
const spi_ioc_transfer *msg;
spi_bus *base;
volatile raspberrypi_spi *regs;
regs=bus->regs;
if (bus->msg_todo > 0) {
base = &bus->base;
msg = bus->msg;
if (
msg->speed_hz != base->speed_hz
|| msg->mode != base->mode
|| msg->cs != base->cs
) {
raspberrypi_spi_config(
bus,
regs,
msg->speed_hz,
msg->mode,
msg->cs
);
}
bus->todo = msg->len;
bus->rx_buf = msg->rx_buf;
bus->tx_buf = msg->tx_buf;
raspberrypi_spi_push(bus, regs);
} else {
raspberrypi_spi_done(bus);
}
}
static void raspberrypi_spi_start(raspberrypi_spi_bus *bus)
{
volatile raspberrypi_spi *regs;
regs = bus->regs;
regs->spics = regs->spics | RPI_SPICS_INTR | RPI_SPICS_INTD;
/*
* Set TA = 1. This will immediately trigger a first interrupt with
* DONE = 1.
*/
regs->spics = regs->spics | RPI_SPICS_TA;
}
static bool raspberrypi_spi_irq(volatile raspberrypi_spi *regs)
{
/* Check whether the interrupt is generated by this SPI device */
if(regs->spics & RPI_SPICS_INTD && regs->spics & RPI_SPICS_DONE) {
return 1;
}
if(regs->spics & RPI_SPICS_INTR && regs->spics & RPI_SPICS_RXR) {
return 1;
}
return 0;
}
static void raspberrypi_spi_interrupt(void *arg)
{
raspberrypi_spi_bus *bus;
volatile raspberrypi_spi *regs;
uint32_t val;
bus = arg;
regs = bus->regs;
if (raspberrypi_spi_irq(regs)) {
if (bus->todo > 0) {
raspberrypi_spi_push(bus, regs);
} else {
--bus->msg_todo;
++bus->msg;
raspberrypi_spi_next_msg(bus);
}
while (regs->spics & RPI_SPICS_RXD && bus->in_transfer > 0) {
/* RX FIFO contains at least 1 byte. */
val = regs->spififo;
if (bus->rx_buf != NULL) {
*bus->rx_buf = (uint8_t)val;
++bus->rx_buf;
}
--bus->in_transfer;
}
}
}
#else
static void raspberrypi_spi_polling_tx_rx(raspberrypi_spi_bus *bus)
{
volatile raspberrypi_spi *regs = bus->regs;
const unsigned char *sbuffer = bus->tx_buf;
unsigned char *rbuffer;
unsigned int size;
unsigned int read_count, write_count;
unsigned int data;
while (bus->msg_todo) {
rbuffer = bus->rx_buf;
size = bus->todo;
regs->spics = regs->spics | RPI_SPICS_CLEAR_RX | RPI_SPICS_CLEAR_TX
| RPI_SPICS_TA;
read_count = 0;
write_count = 0;
while (read_count < size || write_count < size) {
if (write_count < size && regs->spics & RPI_SPICS_TXD) {
if (sbuffer) {
regs->spififo = *sbuffer++;
} else {
regs->spififo = 0;
}
write_count++;
}
if (read_count < size && regs->spics & RPI_SPICS_RXD) {
data = regs->spififo;
if (rbuffer) {
*rbuffer++ = data;
}
read_count++;
}
}
while (!(regs->spics & RPI_SPICS_DONE)) {
/*wait*/
}
regs->spics = (regs->spics & ~RPI_SPICS_TA);
bus->msg_todo--;
bus->msg++;
bus->rx_buf = bus->msg->rx_buf;
bus->tx_buf = bus->msg->tx_buf;
bus->todo = bus->msg->len;
}
}
static void raspberrypi_spi_transfer_msg(
raspberrypi_spi_bus *bus
)
{
volatile raspberrypi_spi *regs = bus->regs;
uint32_t msg_todo = bus->msg_todo;
const spi_ioc_transfer *msg = bus->msg;
if (msg_todo > 0) {
if (
msg->speed_hz != bus->base.speed_hz
|| msg->mode != bus->base.mode
|| msg->cs != bus->base.cs
) {
raspberrypi_spi_config(
bus,
regs,
msg->speed_hz,
msg->mode,
msg->cs
);
}
bus->todo = msg->len;
bus->rx_buf = msg->rx_buf;
bus->tx_buf = msg->tx_buf;
raspberrypi_spi_polling_tx_rx(bus);
}
}
#endif
static int raspberrypi_spi_transfer(
spi_bus *base,
const spi_ioc_transfer *msgs,
uint32_t msg_count
)
{
int rv = 0;
raspberrypi_spi_bus *bus;
bus = (raspberrypi_spi_bus *) base;
rv = raspberrypi_spi_check_msg(bus, msgs, msg_count);
if (rv == 0) {
bus->msg_todo = msg_count;
bus->msg = msgs;
#ifdef BSP_SPI_USE_INTERRUPTS
bus->task_id = rtems_task_self();
raspberrypi_spi_start(bus);
rtems_event_transient_receive(RTEMS_WAIT, RTEMS_NO_TIMEOUT);
#else
raspberrypi_spi_transfer_msg(bus);
#endif
}
return rv;
}
static void raspberrypi_spi_destroy(spi_bus *base)
{
raspberrypi_spi_bus *bus;
bus = (raspberrypi_spi_bus *) base;
#ifdef BSP_SPI_USE_INTERRUPTS
rtems_interrupt_handler_remove(
bus->irq,
raspberrypi_spi_interrupt,
bus
);
#endif
spi_bus_destroy_and_free(&bus->base);
}
static int raspberrypi_spi_setup(spi_bus *base)
{
raspberrypi_spi_bus *bus;
uint32_t mode = base->mode;
bus = (raspberrypi_spi_bus *) base;
if (mode & SPI_LOOP) {
return -EINVAL;
}
return raspberrypi_spi_config(
bus,
bus->regs,
bus->base.speed_hz,
bus->base.mode,
bus->base.cs
);
}
static rtems_status_code raspberrypi_spi_init_gpio(
raspberrypi_spi_device device
)
{
switch (device) {
case raspberrypi_SPI0:
raspberrypi_gpio_set_function(7, GPIO_AF0); /* CS1 */
raspberrypi_gpio_set_pull(7, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(8, GPIO_AF0); /* CS0 */
raspberrypi_gpio_set_pull(8, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(9, GPIO_AF0); /* MISO */
raspberrypi_gpio_set_function(10, GPIO_AF0); /* MOSI */
raspberrypi_gpio_set_function(11, GPIO_AF0); /* SCLK */
break;
case raspberrypi_SPI3:
raspberrypi_gpio_set_function(24, GPIO_AF5);
raspberrypi_gpio_set_pull(24, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(0, GPIO_AF3);
raspberrypi_gpio_set_pull(0, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(1, GPIO_AF3);
raspberrypi_gpio_set_function(2, GPIO_AF3);
raspberrypi_gpio_set_function(3, GPIO_AF3);
break;
case raspberrypi_SPI4:
raspberrypi_gpio_set_function(25, GPIO_AF5);
raspberrypi_gpio_set_pull(25, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(4, GPIO_AF3);
raspberrypi_gpio_set_pull(4, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(5, GPIO_AF3);
raspberrypi_gpio_set_function(6, GPIO_AF3);
raspberrypi_gpio_set_function(7, GPIO_AF3);
break;
case raspberrypi_SPI5:
raspberrypi_gpio_set_function(26, GPIO_AF5);
raspberrypi_gpio_set_pull(26, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(12, GPIO_AF3);
raspberrypi_gpio_set_pull(12, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(13, GPIO_AF3);
raspberrypi_gpio_set_function(14, GPIO_AF3);
raspberrypi_gpio_set_function(15, GPIO_AF3);
break;
case raspberrypi_SPI6:
raspberrypi_gpio_set_function(27, GPIO_AF5);
raspberrypi_gpio_set_pull(27, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(18, GPIO_AF3);
raspberrypi_gpio_set_pull(18, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(19, GPIO_AF3);
raspberrypi_gpio_set_function(20, GPIO_AF3);
raspberrypi_gpio_set_function(21, GPIO_AF3);
break;
default:
return RTEMS_INVALID_NUMBER;
break;
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code raspberrypi_spi_init(raspberrypi_spi_device device)
{
raspberrypi_spi_bus *bus;
int eno;
volatile raspberrypi_spi *regs;
const char *bus_path;
bus = (raspberrypi_spi_bus *) spi_bus_alloc_and_init(sizeof(*bus));
if (bus == NULL) {
return RTEMS_UNSATISFIED;
}
switch (device) {
case raspberrypi_SPI0:
regs = (volatile raspberrypi_spi *) BCM2711_SPI0_BASE;
bus_path = "/dev/spidev0";
break;
case raspberrypi_SPI3:
regs = (volatile raspberrypi_spi *) BCM2711_SPI3_BASE;
bus_path = "/dev/spidev3";
break;
case raspberrypi_SPI4:
regs = (volatile raspberrypi_spi *) BCM2711_SPI4_BASE;
bus_path = "/dev/spidev4";
break;
case raspberrypi_SPI5:
regs = (volatile raspberrypi_spi *) BCM2711_SPI5_BASE;
bus_path = "/dev/spidev5";
break;
case raspberrypi_SPI6:
regs = (volatile raspberrypi_spi *) BCM2711_SPI6_BASE;
bus_path = "/dev/spidev6";
break;
default:
spi_bus_destroy_and_free(&bus->base);
return RTEMS_INVALID_NUMBER;
break;
}
bus->regs = regs;
bus->num_cs = 2;
bus->base.transfer = raspberrypi_spi_transfer;
bus->base.destroy = raspberrypi_spi_destroy;
bus->base.setup = raspberrypi_spi_setup;
bus->base.bits_per_word = 8;
bus->base.max_speed_hz = 250000000;
bus->base.cs = 0;
#ifdef BSP_SPI_USE_INTERRUPTS
bus->irq = BCM2711_IRQ_SPI;
eno = rtems_interrupt_handler_install(
bus->irq,
"SPI",
RTEMS_INTERRUPT_SHARED,
raspberrypi_spi_interrupt,
bus
);
if (eno != RTEMS_SUCCESSFUL) {
return EAGAIN;
}
#endif
eno = spi_bus_register(&bus->base, bus_path);
if (eno != 0) {
spi_bus_destroy_and_free(&bus->base);
return RTEMS_UNSATISFIED;
}
eno = raspberrypi_spi_init_gpio(device);
if (eno != 0) {
spi_bus_destroy_and_free(&bus->base);
return RTEMS_INVALID_NUMBER;
}
return RTEMS_SUCCESSFUL;
}

49
bsps/aarch64/raspberrypi/start/bspstart.c
View File

@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief BSP Startup
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

55
bsps/aarch64/raspberrypi/start/bspstarthooks.c
View File

@@ -1,55 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief BSP Startup Hooks
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/irq-generic.h>
#include <bsp/start.h>
#include <rtems/score/cpu.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
/* Do nothing */
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
raspberrypi_4_setup_mmu_and_cache();
bsp_start_clear_bss();
}

87
bsps/aarch64/raspberrypi/start/bspstartmmu.c
View File

@@ -1,87 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief This source file contains the default MMU tables and setup.
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/aarch64-mmu.h>
#include <bsp/raspberrypi.h>
#include <libcpu/mmu-vmsav8-64.h>
BSP_START_DATA_SECTION static const aarch64_mmu_config_entry
raspberrypi_4_mmu_config_table[] = {
AARCH64_MMU_DEFAULT_SECTIONS,
{ /* RPI peripheral address */
.begin = (unsigned)RPI_PERIPHERAL_BASE,
.end = (unsigned)RPI_PERIPHERAL_BASE + (unsigned)RPI_PERIPHERAL_SIZE,
.flags = AARCH64_MMU_DEVICE
},
{ /* RPI ARM local registers */
.begin = (unsigned)BCM2711_LOCAL_REGS_BASE,
.end = (unsigned)BCM2711_LOCAL_REGS_BASE + (unsigned)BCM2711_LOCAL_REGS_SIZE,
.flags = AARCH64_MMU_DEVICE
},
{ /* RPI GIC Interface address */
.begin = 0xFF800000U,
.end = 0xFFA00000U,
.flags = AARCH64_MMU_DEVICE
}
};
/*
* Make weak and let the user override.
*/
BSP_START_TEXT_SECTION void
raspberrypi_4_setup_mmu_and_cache( void ) __attribute__ ((weak));
BSP_START_TEXT_SECTION void
raspberrypi_4_setup_mmu_and_cache( void )
{
aarch64_mmu_control *control = &aarch64_mmu_instance;
aarch64_mmu_setup();
aarch64_mmu_setup_translation_table(
control,
&raspberrypi_4_mmu_config_table[ 0 ],
RTEMS_ARRAY_SIZE( raspberrypi_4_mmu_config_table )
);
aarch64_mmu_enable( control );
}

73
bsps/aarch64/raspberrypi/start/watchdog.c
View File

@@ -1,73 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Watchdog Driver
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/raspberrypi.h>
#include <bsp/watchdog.h>
#define PM_WDOG BCM2835_REG(BCM2711_PM_WDOG)
#define PM_RSTC BCM2835_REG(BCM2711_PM_RSTC)
uint32_t raspberrypi_watchdog_timeout;
void raspberrypi_watchdog_init()
{
raspberrypi_watchdog_timeout = 0;
}
void raspberrypi_watchdog_start(uint32_t timeout_ms)
{
raspberrypi_watchdog_timeout = timeout_ms;
PM_WDOG = BCM2711_PM_PASSWD_MAGIC |
((timeout_ms * 65536 / 1000) & BCM2711_PM_WDOG_MASK);
PM_RSTC &= BCM2711_PM_RSTC_WRCFG_CLR;
PM_RSTC = (BCM2711_PM_PASSWD_MAGIC | BCM2711_PM_RSTC_WRCFG_FULL);
}
void raspberrypi_watchdog_stop()
{
PM_RSTC = BCM2711_PM_PASSWD_MAGIC | BCM2711_PM_RSTC_RESET;
}
void raspberrypi_watchdog_reload()
{
raspberrypi_watchdog_start(raspberrypi_watchdog_timeout);
}
uint32_t raspberrypi_watchdog_get_remaining_time()
{
return (PM_WDOG & BCM2711_PM_WDOG_MASK)*1000/65536;
}

415
bsps/aarch64/shared/cache/cache.c vendored
View File

@@ -1,415 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64 cache defines and implementation.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems.h>
#include <bsp.h>
#include <rtems/score/aarch64-system-registers.h>
#define CPU_DATA_CACHE_ALIGNMENT 64
#define CPU_INSTRUCTION_CACHE_ALIGNMENT 64
#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
#define AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ( (size_t) 64 )
#define AARCH64_CACHE_PREPARE_MVA(mva) (const void *) \
RTEMS_ALIGN_DOWN ( (size_t) mva, AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT )
static inline
void AArch64_data_cache_clean_and_invalidate_line(const void *d_addr)
{
d_addr = AARCH64_CACHE_PREPARE_MVA(d_addr);
__asm__ volatile (
"dc civac, %[d_addr]"
:
: [d_addr] "r" (d_addr)
: "memory"
);
}
static inline void
_CPU_cache_flush_data_range(
const void *d_addr,
size_t n_bytes
)
{
_AARCH64_Data_synchronization_barrier();
if ( n_bytes != 0 ) {
size_t adx = (size_t) AARCH64_CACHE_PREPARE_MVA ( d_addr );
const size_t ADDR_LAST = (size_t) d_addr + n_bytes - 1;
for (; adx <= ADDR_LAST; adx += AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ) {
/* Store and invalidate the Data cache line */
AArch64_data_cache_clean_and_invalidate_line( (void*)adx );
}
/* Wait for L1 store to complete */
_AARCH64_Data_synchronization_barrier();
}
_AARCH64_Data_synchronization_barrier();
}
static inline void AArch64_data_cache_invalidate_line(const void *d_addr)
{
d_addr = AARCH64_CACHE_PREPARE_MVA(d_addr);
__asm__ volatile (
"dc ivac, %[d_addr]"
:
: [d_addr] "r" (d_addr)
: "memory"
);
}
static inline void
_CPU_cache_invalidate_data_range(
const void *d_addr,
size_t n_bytes
)
{
if ( n_bytes != 0 ) {
size_t adx = (size_t) AARCH64_CACHE_PREPARE_MVA ( d_addr );
const size_t end = (size_t)d_addr + n_bytes -1;
/* Back starting address up to start of a line and invalidate until end */
for (;
adx <= end;
adx += AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ) {
/* Invalidate the Instruction cache line */
AArch64_data_cache_invalidate_line( (void*)adx );
}
/* Wait for L1 invalidate to complete */
_AARCH64_Data_synchronization_barrier();
}
}
static inline void _CPU_cache_freeze_data(void)
{
/* TODO */
}
static inline void _CPU_cache_unfreeze_data(void)
{
/* TODO */
}
static inline void AArch64_instruction_cache_invalidate_line(const void *i_addr)
{
/* __builtin___clear_cache is explicitly only for instruction cacche */
__builtin___clear_cache((void *)i_addr, ((char *)i_addr) + sizeof(void*) - 1);
}
static inline void
_CPU_cache_invalidate_instruction_range( const void *i_addr, size_t n_bytes)
{
if ( n_bytes != 0 ) {
__builtin___clear_cache((void *)i_addr, ((char *)i_addr) + n_bytes - 1);
}
_AARCH64_Instruction_synchronization_barrier();
}
static inline void _CPU_cache_freeze_instruction(void)
{
/* TODO */
}
static inline void _CPU_cache_unfreeze_instruction(void)
{
/* TODO */
}
static inline uint64_t AArch64_get_ccsidr_for_level(
uint64_t level, bool instruction
)
{
uint64_t csselr = AARCH64_CSSELR_EL1_LEVEL(level - 1);
csselr |= instruction ? AARCH64_CSSELR_EL1_IND : 0;
_AArch64_Write_csselr_el1(csselr);
_AARCH64_Instruction_synchronization_barrier();
return _AArch64_Read_ccsidr_el1();
}
static inline uint64_t
AArch64_ccsidr_get_line_power(uint64_t ccsidr)
{
return AARCH64_CCSIDR_EL1_LINESIZE_GET(ccsidr) + 4;
}
static inline uint64_t
AArch64_ccsidr_get_associativity(uint64_t ccsidr)
{
return AARCH64_CCSIDR_EL1_ASSOCIATIVITY_GET_0(ccsidr) + 1;
}
static inline uint64_t
AArch64_ccsidr_get_num_sets(uint64_t ccsidr)
{
return AARCH64_CCSIDR_EL1_NUMSETS_GET_0(ccsidr) + 1;
}
static inline void
AArch64_data_cache_clean_and_invalidate_level(uint64_t level)
{
uint64_t ccsidr;
uint64_t line_power;
uint64_t associativity;
uint64_t way;
uint64_t way_shift;
ccsidr = AArch64_get_ccsidr_for_level(level, false);
line_power = AArch64_ccsidr_get_line_power(ccsidr);
associativity = AArch64_ccsidr_get_associativity(ccsidr);
way_shift = __builtin_clz(associativity - 1);
for (way = 0; way < associativity; ++way) {
uint64_t num_sets = AArch64_ccsidr_get_num_sets(ccsidr);
uint64_t set;
for (set = 0; set < num_sets; ++set) {
uint64_t set_and_way = (way << way_shift)
| (set << line_power)
| ((level - 1) << 1);
__asm__ volatile (
"dc cisw, %[set_and_way]"
:
: [set_and_way] "r" (set_and_way)
: "memory"
);
}
}
}
static inline
uint64_t AArch64_clidr_get_cache_type(uint64_t clidr, uint64_t level)
{
return (clidr >> (3 * level)) & 0x7;
}
static inline uint64_t AArch64_clidr_get_level_of_coherency(uint64_t clidr)
{
return AARCH64_CLIDR_EL1_LOC_GET(clidr);
}
static inline void AArch64_data_cache_clean_and_invalidate_all_levels(void)
{
uint64_t clidr = _AArch64_Read_clidr_el1();
uint64_t loc = AArch64_clidr_get_level_of_coherency(clidr);
uint64_t level = 0;
for (level = 1; level <= loc; ++level) {
/* Assume that all levels have a data cache */
AArch64_data_cache_clean_and_invalidate_level(level);
}
}
static inline void _CPU_cache_flush_entire_data(void)
{
rtems_interrupt_level isr_level;
rtems_interrupt_local_disable(isr_level);
_AARCH64_Data_synchronization_barrier();
AArch64_data_cache_clean_and_invalidate_all_levels();
_AARCH64_Data_synchronization_barrier();
rtems_interrupt_local_enable(isr_level);
}
static inline void AArch64_cache_invalidate_level(uint64_t level)
{
uint64_t ccsidr;
uint64_t line_power;
uint64_t associativity;
uint64_t way;
uint64_t way_shift;
ccsidr = AArch64_get_ccsidr_for_level(level, false);
line_power = AArch64_ccsidr_get_line_power(ccsidr);
associativity = AArch64_ccsidr_get_associativity(ccsidr);
way_shift = __builtin_clz(associativity - 1);
for (way = 0; way < associativity; ++way) {
uint64_t num_sets = AArch64_ccsidr_get_num_sets(ccsidr);
uint64_t set;
for (set = 0; set < num_sets; ++set) {
uint64_t set_and_way = (way << way_shift)
| (set << line_power)
| ((level - 1) << 1);
__asm__ volatile (
"dc isw, %[set_and_way]"
:
: [set_and_way] "r" (set_and_way)
: "memory"
);
}
}
}
static inline void AArch64_data_cache_invalidate_all_levels(void)
{
uint64_t clidr = _AArch64_Read_clidr_el1();
uint64_t loc = AArch64_clidr_get_level_of_coherency(clidr);
uint64_t level = 0;
for (level = 1; level <= loc; ++level) {
/* Assume that all levels have a data cache */
AArch64_cache_invalidate_level(level);
}
}
static inline void _CPU_cache_invalidate_entire_data(void)
{
rtems_interrupt_level isr_level;
rtems_interrupt_local_disable(isr_level);
_AARCH64_Data_synchronization_barrier();
AArch64_data_cache_invalidate_all_levels();
_AARCH64_Data_synchronization_barrier();
rtems_interrupt_local_enable(isr_level);
}
static inline void _CPU_cache_enable_data(void)
{
rtems_interrupt_level isr_level;
uint64_t sctlr;
rtems_interrupt_local_disable(isr_level);
sctlr = _AArch64_Read_sctlr_el1();
sctlr |= AARCH64_SCTLR_EL1_C;
_AArch64_Write_sctlr_el1(sctlr);
rtems_interrupt_local_enable(isr_level);
}
static RTEMS_NO_RETURN inline void _CPU_cache_disable_data(void)
{
_Internal_error( INTERNAL_ERROR_CANNOT_DISABLE_DATA_CACHE );
}
static inline void _CPU_cache_invalidate_entire_instruction(void)
{
/*
* There is no way to manage branch prediction in AArch64. See D4.4.12 in
* the ARM Architecture Reference Manual, ARMv8, for ARMv8-A architecture
* profile (ARM DDI 0487D.a).
*/
__asm__ volatile (
#ifdef RTEMS_SMP
/*
* Invalidate all instruction caches up to
* Point of Unification, Inner Shareable.
*/
"ic ialluis\n"
#else
/* Invalidate all instruction caches up to Point of Unification */
"ic iallu\n"
#endif
"isb"
:
:
: "memory"
);
}
static inline void _CPU_cache_enable_instruction(void)
{
rtems_interrupt_level isr_level;
uint64_t sctlr;
rtems_interrupt_local_disable(isr_level);
sctlr = _AArch64_Read_sctlr_el1();
sctlr |= AARCH64_SCTLR_EL1_I;
_AArch64_Write_sctlr_el1(sctlr);
rtems_interrupt_local_enable(isr_level);
}
static inline void _CPU_cache_disable_instruction(void)
{
rtems_interrupt_level isr_level;
uint64_t sctlr;
rtems_interrupt_local_disable(isr_level);
sctlr = _AArch64_Read_sctlr_el1();
sctlr &= ~AARCH64_SCTLR_EL1_I;
_AArch64_Write_sctlr_el1(sctlr);
rtems_interrupt_local_enable(isr_level);
}
static inline size_t AArch64_get_cache_size(
uint64_t level,
bool instruction
)
{
rtems_interrupt_level isr_level;
uint64_t clidr;
uint64_t loc;
uint64_t ccsidr;
clidr = _AArch64_Read_clidr_el1();
loc = AArch64_clidr_get_level_of_coherency(clidr);
if (level > loc) {
return 0;
}
rtems_interrupt_local_disable(isr_level);
ccsidr = AArch64_get_ccsidr_for_level(level, instruction);
rtems_interrupt_local_enable(isr_level);
return (1U << (AArch64_ccsidr_get_line_power(ccsidr)+4))
* AArch64_ccsidr_get_associativity(ccsidr)
* AArch64_ccsidr_get_num_sets(ccsidr);
}
static inline size_t _CPU_cache_get_data_cache_size(uint64_t level)
{
return AArch64_get_cache_size(level, false);
}
static inline size_t _CPU_cache_get_instruction_cache_size(uint64_t level)
{
return AArch64_get_cache_size(level, true);
}
#include "../../shared/cache/cacheimpl.h"

116
bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
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@@ -1,116 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64-specific ARM GPT system register accessors.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <dev/clock/arm-generic-timer.h>
#include <bsp/irq.h>
uint64_t arm_gt_clock_get_compare_value(void)
{
uint64_t val;
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"mrs %[val], cntv_cval_el0"
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
"mrs %[val], cntps_cval_el1"
#else
"mrs %[val], cntp_cval_el0"
#endif
: [val] "=&r" (val)
);
return val;
}
void arm_gt_clock_set_compare_value(uint64_t cval)
{
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_cval_el0, %[cval]"
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
"msr cntps_cval_el1, %[cval]"
#else
"msr cntp_cval_el0, %[cval]"
#endif
:
: [cval] "r" (cval)
);
}
uint64_t arm_gt_clock_get_count(void)
{
uint64_t val;
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"mrs %[val], cntvct_el0"
#else
"mrs %[val], cntpct_el0"
#endif
: [val] "=&r" (val)
);
return val;
}
void arm_gt_clock_set_control(uint32_t ctl)
{
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_ctl_el0, %[ctl]"
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
"msr cntps_ctl_el1, %[ctl]"
#else
"msr cntp_ctl_el0, %[ctl]"
#endif
:
: [ctl] "r" (ctl)
);
}
void arm_generic_timer_get_config( uint32_t *frequency, uint32_t *irq )
{
uint64_t val;
__asm__ volatile (
"mrs %[val], cntfrq_el0"
: [val] "=&r" (val)
);
*frequency = val;
#ifdef ARM_GENERIC_TIMER_USE_VIRTUAL
*irq = BSP_TIMER_VIRT_PPI;
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
*irq = BSP_TIMER_PHYS_S_PPI;
#else
*irq = BSP_TIMER_PHYS_NS_PPI;
#endif
}

23
bsps/aarch64/shared/doxygen.h
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@@ -1,23 +0,0 @@
/**
* @file
*
* @ingroup RTEMSImplDoxygen
*
* @brief This header file defines BSP-specific groups.
*/
/**
* @defgroup RTEMSBSPsAArch64 AArch64
*
* @ingroup RTEMSBSPs
*
* @brief This group contains AArch64 Board Support Packages.
*/
/**
* @defgroup RTEMSBSPsAArch64Shared Shared
*
* @ingroup RTEMSBSPsAArch64
*
* @brief This group contains support shared by AArch64 Board Support Packages.
*/

319
bsps/aarch64/shared/mmu/mmu-setup.c
View File

@@ -1,319 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_start
*
* @brief AArch64 MMU configuration.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/aarch64-mmu.h>
#include <bsp/fatal.h>
#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <rtems/score/aarch64-system-registers.h>
#include <rtems/score/assert.h>
aarch64_mmu_control aarch64_mmu_instance = {
.ttb = (uint64_t *) bsp_translation_table_base,
/* One page table is used for the initial setup at the base */
.used_page_tables = 1
};
/* AArch64 uses levels 0, 1, 2, and 3 */
#define MMU_MAX_SUBTABLE_PAGE_BITS ( 3 * MMU_BITS_PER_LEVEL + MMU_PAGE_BITS )
/* setup straight mapped block entries */
BSP_START_TEXT_SECTION static inline void aarch64_mmu_page_table_set_blocks(
uint64_t *page_table,
uint64_t base,
uint32_t bits_offset,
uint64_t default_attr
)
{
uint64_t page_flag = 0;
if ( bits_offset == MMU_PAGE_BITS ) {
page_flag = MMU_DESC_TYPE_PAGE;
}
for ( uint64_t i = 0; i < ( 1 << MMU_BITS_PER_LEVEL ); i++ ) {
page_table[i] = base | ( i << bits_offset );
page_table[i] |= default_attr | page_flag;
}
}
BSP_START_TEXT_SECTION static inline uint64_t *
aarch64_mmu_page_table_alloc( aarch64_mmu_control *control )
{
size_t used_page_tables = control->used_page_tables;
if ( used_page_tables >= AARCH64_MMU_TRANSLATION_TABLE_PAGES ) {
return NULL;
}
control->used_page_tables = used_page_tables + 1;
return (uint64_t *)
( (uintptr_t) control->ttb + ( used_page_tables << MMU_PAGE_BITS ) );
}
BSP_START_TEXT_SECTION static inline uintptr_t aarch64_mmu_get_index(
uintptr_t root_address,
uintptr_t vaddr,
uint32_t shift
)
{
uintptr_t mask = ( 1 << ( MMU_BITS_PER_LEVEL + 1 ) ) - 1;
return ( ( vaddr - root_address ) >> shift ) & mask;
}
BSP_START_TEXT_SECTION static uint64_t *
aarch64_mmu_get_sub_table(
aarch64_mmu_control *control,
uint64_t *page_table_entry,
uintptr_t physical_root_address,
uint32_t shift
)
{
/* check if the index already has a page table */
if ( ( *page_table_entry & MMU_DESC_TYPE_TABLE ) == MMU_DESC_TYPE_TABLE ) {
/* extract page table address */
uint64_t table_pointer = *page_table_entry & MMU_DESC_PAGE_TABLE_MASK;
/* This cast should be safe since the address was inserted in this mode */
return (uint64_t *) (uintptr_t) table_pointer;
}
/* allocate new page table and set block */
uint64_t *sub_table = aarch64_mmu_page_table_alloc( control );
if ( sub_table == NULL ) {
return NULL;
}
aarch64_mmu_page_table_set_blocks(
sub_table,
physical_root_address,
shift - MMU_BITS_PER_LEVEL,
*page_table_entry & ~MMU_DESC_PAGE_TABLE_MASK
);
*page_table_entry = (uintptr_t) sub_table;
*page_table_entry |= MMU_DESC_TYPE_TABLE | MMU_DESC_VALID;
return sub_table;
}
BSP_START_TEXT_SECTION static inline rtems_status_code aarch64_mmu_map_block(
aarch64_mmu_control *control,
uint64_t *page_table,
uint64_t root_address,
uint64_t addr,
uint64_t size,
int8_t level,
uint64_t flags
)
{
uint32_t shift = ( 2 - level ) * MMU_BITS_PER_LEVEL + MMU_PAGE_BITS;
uint64_t granularity = 1LLU << shift;
do {
uintptr_t index = aarch64_mmu_get_index( root_address, addr, shift );
uint64_t block_bottom = RTEMS_ALIGN_DOWN( addr, granularity );
uint64_t chunk_size = granularity;
/* check for perfect block match */
if ( block_bottom == addr ) {
if ( size >= chunk_size ) {
/* level -1 can't contain block descriptors, fall through to subtable */
if ( level != -1 ) {
uint64_t page_flag = 0;
if ( level == 2 ) {
page_flag = MMU_DESC_TYPE_PAGE;
}
/* when page_flag is set the last level must be a page descriptor */
if ( page_flag || ( page_table[index] & MMU_DESC_TYPE_TABLE ) != MMU_DESC_TYPE_TABLE ) {
/* no sub-table, apply block properties */
page_table[index] = addr | flags | page_flag;
size -= chunk_size;
addr += chunk_size;
continue;
}
}
} else {
/*
* Block starts on a boundary, but is short.
*
* The size is >= MMU_PAGE_SIZE since
* aarch64_mmu_set_translation_table_entries() aligns the memory region
* to page boundaries. The minimum chunk_size is MMU_PAGE_SIZE.
*/
_Assert( level < 2 );
chunk_size = size;
}
} else {
uintptr_t block_top = RTEMS_ALIGN_UP( addr, granularity );
chunk_size = block_top - addr;
if ( chunk_size > size ) {
chunk_size = size;
}
}
/* Deal with any subtable modification */
uint64_t new_root_address = root_address + index * granularity;
rtems_status_code sc;
uint64_t *sub_table = aarch64_mmu_get_sub_table(
control,
&page_table[index],
new_root_address,
shift
);
if ( sub_table == NULL ) {
return RTEMS_TOO_MANY;
}
sc = aarch64_mmu_map_block(
control,
sub_table,
new_root_address,
addr,
chunk_size,
level + 1,
flags
);
if ( sc != RTEMS_SUCCESSFUL ) {
return sc;
}
size -= chunk_size;
addr += chunk_size;
} while ( size > 0 );
return RTEMS_SUCCESSFUL;
}
/* Get the maximum number of bits supported by this hardware */
BSP_START_TEXT_SECTION static inline uint64_t
aarch64_mmu_get_cpu_pa_bits( void )
{
#ifdef AARCH64_MMU_PHYSICAL_ADDRESS_RANGE_BITS
return AARCH64_MMU_PHYSICAL_ADDRESS_RANGE_BITS;
#else
uint64_t id_reg = _AArch64_Read_id_aa64mmfr0_el1();
switch ( AARCH64_ID_AA64MMFR0_EL1_PARANGE_GET( id_reg ) ) {
case 0:
return 32;
case 1:
return 36;
case 2:
return 40;
case 3:
return 42;
case 4:
return 44;
case 5:
return 48;
case 6:
return 52;
default:
return 48;
}
return 48;
#endif
}
BSP_START_TEXT_SECTION rtems_status_code
aarch64_mmu_set_translation_table_entries(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config
)
{
uint64_t max_mappable = 1LLU << aarch64_mmu_get_cpu_pa_bits();
/* Align to page boundaries */
uintptr_t begin = RTEMS_ALIGN_DOWN( config->begin, MMU_PAGE_SIZE );
uintptr_t end = RTEMS_ALIGN_UP( config->end, MMU_PAGE_SIZE );
uintptr_t size = end - begin;
if ( config->begin == config->end ) {
return RTEMS_SUCCESSFUL;
}
if ( begin >= max_mappable ) {
return RTEMS_INVALID_ADDRESS;
}
if ( size > max_mappable - begin ) {
return RTEMS_INVALID_SIZE;
}
return aarch64_mmu_map_block(
control,
control->ttb,
0x0,
begin,
size,
-1,
config->flags
);
}
BSP_START_TEXT_SECTION void aarch64_mmu_setup_translation_table(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config_table,
size_t config_count
)
{
size_t i;
aarch64_mmu_page_table_set_blocks(
control->ttb,
(uintptr_t) NULL,
MMU_MAX_SUBTABLE_PAGE_BITS,
0
);
/* Configure entries required for each memory section */
for ( i = 0; i < config_count; ++i ) {
rtems_status_code sc;
sc = aarch64_mmu_set_translation_table_entries( control, &config_table[i] );
if ( sc != RTEMS_SUCCESSFUL ) {
bsp_fatal( AARCH64_FATAL_MMU_CANNOT_MAP_BLOCK );
}
}
}

49
bsps/aarch64/shared/mmu/vmsav8-64-nommu.c
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@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64 MMU dummy implementation.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <libcpu/mmu-vmsav8-64.h>
/*
* This must have a non-header implementation because it is used by libdebugger.
*/
rtems_status_code aarch64_mmu_map(
uintptr_t addr,
uint64_t size,
uint64_t flags
)
{
return RTEMS_SUCCESSFUL;
}

78
bsps/aarch64/shared/mmu/vmsav8-64.c
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@@ -1,78 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64 MMU implementation.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/aarch64-mmu.h>
#include <rtems/score/cpu.h>
/*
* This must have a non-header implementation because it is used by libdebugger.
*/
rtems_status_code aarch64_mmu_map(
uintptr_t addr,
uint64_t size,
uint64_t flags
)
{
aarch64_mmu_config_entry config = {
.begin = addr,
.end = addr + size,
.flags = flags
};
rtems_status_code sc;
ISR_Level level;
aarch64_mmu_control *control = &aarch64_mmu_instance;
/*
* Disable interrupts so they don't run while the MMU tables are being
* modified.
*/
_ISR_Local_disable( level );
sc = aarch64_mmu_set_translation_table_entries(
control,
&config
);
_AARCH64_Data_synchronization_barrier();
__asm__ volatile(
"tlbi vmalle1\n"
);
_AARCH64_Data_synchronization_barrier();
_AARCH64_Instruction_synchronization_barrier();
_ISR_Local_enable( level );
return sc;
}

87
bsps/aarch64/shared/start/aarch64-smp.c
View File

@@ -1,87 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief SMP startup and interop code.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/score/smpimpl.h>
#include <bsp/irq.h>
static void bsp_inter_processor_interrupt( void *arg )
{
_SMP_Inter_processor_interrupt_handler( _Per_CPU_Get() );
}
uint32_t _CPU_SMP_Initialize( void )
{
return arm_gic_irq_processor_count();
}
static rtems_interrupt_entry aarch64_ipi_entry;
void _CPU_SMP_Finalize_initialization( uint32_t cpu_count )
{
rtems_status_code sc;
rtems_interrupt_entry_initialize(
&aarch64_ipi_entry,
bsp_inter_processor_interrupt,
NULL,
"IPI"
);
sc = rtems_interrupt_entry_install(
ARM_GIC_IRQ_SGI_0,
RTEMS_INTERRUPT_UNIQUE,
&aarch64_ipi_entry
);
_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
}
void _CPU_SMP_Prepare_start_multitasking( void )
{
/* Do nothing */
}
void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
{
arm_gic_trigger_sgi(
ARM_GIC_IRQ_SGI_0,
1U << target_processor_index
);
}
uint32_t _CPU_SMP_Get_current_processor( void )
{
return _Per_CPU_Get_index( _CPU_Get_current_per_CPU_control() );
}

443
bsps/aarch64/shared/start/linkcmds.base
View File

@@ -1,443 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup bsp_linker
*
* @brief Linker command base file.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
ENTRY (_start)
STARTUP (start.o)
/*
* Global symbols that may be defined externally
*/
bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 16;
bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 0;
bsp_stack_exception_size = ALIGN (bsp_stack_exception_size, bsp_stack_align);
bsp_vector_table_size = DEFINED (bsp_vector_table_size) ? bsp_vector_table_size : 64;
bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_xbarrier_align : 1;
bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1;
bsp_stack_hyp_size = DEFINED (bsp_stack_hyp_size) ? bsp_stack_hyp_size : 0;
bsp_stack_hyp_size = ALIGN (bsp_stack_hyp_size, bsp_stack_align);
MEMORY {
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffffffffffff, LENGTH = 0
}
SECTIONS {
.start : ALIGN_WITH_INPUT {
bsp_section_start_begin = .;
KEEP (*(.bsp_start_text))
KEEP (*(.bsp_start_data))
bsp_section_start_end = .;
} > REGION_START AT > REGION_START
bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin;
.xbarrier : ALIGN_WITH_INPUT {
. = ALIGN (bsp_section_xbarrier_align);
} > REGION_VECTOR AT > REGION_VECTOR
.text : ALIGN_WITH_INPUT {
bsp_section_text_begin = .;
*(.text.unlikely .text.*_unlikely)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
} > REGION_TEXT AT > REGION_TEXT_LOAD
.init : ALIGN_WITH_INPUT {
KEEP (*(.init))
} > REGION_TEXT AT > REGION_TEXT_LOAD
.fini : ALIGN_WITH_INPUT {
KEEP (*(.fini))
bsp_section_text_end = .;
} > REGION_TEXT AT > REGION_TEXT_LOAD
bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin;
bsp_section_text_load_begin = LOADADDR (.text);
bsp_section_text_load_end = bsp_section_text_load_begin + bsp_section_text_size;
.robarrier : ALIGN_WITH_INPUT {
. = ALIGN (bsp_section_robarrier_align);
} > REGION_RODATA AT > REGION_RODATA
.rodata : ALIGN_WITH_INPUT {
bsp_section_rodata_begin = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rodata1 : ALIGN_WITH_INPUT {
*(.rodata1)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.ARM.extab : ALIGN_WITH_INPUT {
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.ARM.exidx : ALIGN_WITH_INPUT {
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
.eh_frame : ALIGN_WITH_INPUT {
KEEP (*(.eh_frame))
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gcc_except_table : ALIGN_WITH_INPUT {
*(.gcc_except_table .gcc_except_table.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tdata : ALIGN_WITH_INPUT {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tbss : ALIGN_WITH_INPUT {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.preinit_array : ALIGN_WITH_INPUT {
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.init_array : ALIGN_WITH_INPUT {
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.fini_array : ALIGN_WITH_INPUT {
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.data.rel.ro : ALIGN_WITH_INPUT {
*(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*)
*(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.jcr : ALIGN_WITH_INPUT {
KEEP (*(.jcr))
} > REGION_RODATA AT > REGION_RODATA_LOAD
.interp : ALIGN_WITH_INPUT {
*(.interp)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.note.gnu.build-id : ALIGN_WITH_INPUT {
*(.note.gnu.build-id)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.hash : ALIGN_WITH_INPUT {
*(.hash)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.hash : ALIGN_WITH_INPUT {
*(.gnu.hash)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.dynsym : ALIGN_WITH_INPUT {
*(.dynsym)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.dynstr : ALIGN_WITH_INPUT {
*(.dynstr)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.version : ALIGN_WITH_INPUT {
*(.gnu.version)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.version_d : ALIGN_WITH_INPUT {
*(.gnu.version_d)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.version_r : ALIGN_WITH_INPUT {
*(.gnu.version_r)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rel.dyn : ALIGN_WITH_INPUT {
*(.rel.init)
*(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
*(.rel.fini)
*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
*(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
*(.rel.ctors)
*(.rel.dtors)
*(.rel.got)
*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
PROVIDE_HIDDEN (__rel_iplt_start = .);
*(.rel.iplt)
PROVIDE_HIDDEN (__rel_iplt_end = .);
PROVIDE_HIDDEN (__rela_iplt_start = .);
PROVIDE_HIDDEN (__rela_iplt_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rela.dyn : ALIGN_WITH_INPUT {
*(.rela.init)
*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
*(.rela.fini)
*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
*(.rela.ctors)
*(.rela.dtors)
*(.rela.got)
*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
*(.rela.rtemsroset*)
*(.rela.rtemsrwset*)
PROVIDE_HIDDEN (__rel_iplt_start = .);
PROVIDE_HIDDEN (__rel_iplt_end = .);
PROVIDE_HIDDEN (__rela_iplt_start = .);
*(.rela.iplt)
PROVIDE_HIDDEN (__rela_iplt_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rel.plt : ALIGN_WITH_INPUT {
*(.rel.plt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rela.plt : ALIGN_WITH_INPUT {
*(.rela.plt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.plt : ALIGN_WITH_INPUT {
*(.plt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.iplt : ALIGN_WITH_INPUT {
*(.iplt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.dynamic : ALIGN_WITH_INPUT {
*(.dynamic)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tm_clone_table : ALIGN_WITH_INPUT {
*(.tm_clone_table)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.got : ALIGN_WITH_INPUT {
*(.got.plt) *(.igot.plt) *(.got) *(.igot)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rtemsroset : ALIGN_WITH_INPUT {
/* Special FreeBSD linker set sections */
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = .;
*(set_domain_*);
*(set_pseudo_*);
KEEP (*(SORT(.rtemsroset.*)))
bsp_section_rodata_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin;
bsp_section_rodata_load_begin = LOADADDR (.rodata);
bsp_section_rodata_load_end = bsp_section_rodata_load_begin + bsp_section_rodata_size;
.rwbarrier : ALIGN_WITH_INPUT {
. = ALIGN (bsp_section_rwbarrier_align);
} > REGION_DATA AT > REGION_DATA
.vector : ALIGN_WITH_INPUT {
bsp_section_vector_begin = .;
. = . + DEFINED (bsp_vector_table_in_start_section) ? 0 : bsp_vector_table_size;
bsp_section_vector_end = .;
} > REGION_VECTOR AT > REGION_VECTOR
bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_begin;
bsp_vector_table_begin = DEFINED (bsp_vector_table_in_start_section) ? bsp_section_start_begin : bsp_section_vector_begin;
bsp_vector_table_end = bsp_vector_table_begin + bsp_vector_table_size;
.fast_text : ALIGN_WITH_INPUT {
bsp_section_fast_text_begin = .;
*(.bsp_fast_text)
bsp_section_fast_text_end = .;
} > REGION_FAST_TEXT AT > REGION_FAST_TEXT_LOAD
bsp_section_fast_text_size = bsp_section_fast_text_end - bsp_section_fast_text_begin;
bsp_section_fast_text_load_begin = LOADADDR (.fast_text);
bsp_section_fast_text_load_end = bsp_section_fast_text_load_begin + bsp_section_fast_text_size;
.fast_data : ALIGN_WITH_INPUT {
bsp_section_fast_data_begin = .;
*(.bsp_fast_data)
bsp_section_fast_data_end = .;
} > REGION_FAST_DATA AT > REGION_FAST_DATA_LOAD
bsp_section_fast_data_size = bsp_section_fast_data_end - bsp_section_fast_data_begin;
bsp_section_fast_data_load_begin = LOADADDR (.fast_data);
bsp_section_fast_data_load_end = bsp_section_fast_data_load_begin + bsp_section_fast_data_size;
.data : ALIGN_WITH_INPUT {
bsp_section_data_begin = .;
*(.data .data.* .gnu.linkonce.d.*)
SORT(CONSTRUCTORS)
} > REGION_DATA AT > REGION_DATA_LOAD
.data1 : ALIGN_WITH_INPUT {
*(.data1)
} > REGION_DATA AT > REGION_DATA_LOAD
.rtemsrwset : ALIGN_WITH_INPUT {
KEEP (*(SORT(.rtemsrwset.*)))
bsp_section_data_end = .;
} > REGION_DATA AT > REGION_DATA_LOAD
bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin;
bsp_section_data_load_begin = LOADADDR (.data);
bsp_section_data_load_end = bsp_section_data_load_begin + bsp_section_data_size;
.bss : ALIGN_WITH_INPUT {
bsp_section_bss_begin = .;
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
bsp_section_bss_end = .;
} > REGION_BSS AT > REGION_BSS
bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin;
.rtemsstack (NOLOAD) : ALIGN_WITH_INPUT {
bsp_section_rtemsstack_begin = .;
*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.rtemsstack*)))
bsp_section_rtemsstack_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_rtemsstack_size = bsp_section_rtemsstack_end - bsp_section_rtemsstack_begin;
.noinit (NOLOAD) : ALIGN_WITH_INPUT {
bsp_section_noinit_begin = .;
*(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
bsp_section_noinit_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_noinit_size = bsp_section_noinit_end - bsp_section_noinit_begin;
.work : ALIGN_WITH_INPUT {
/*
* The work section will occupy the remaining REGION_WORK region and
* contains the RTEMS work space and heap.
*/
bsp_section_work_begin = .;
. += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.);
bsp_section_work_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin;
.stack : ALIGN_WITH_INPUT {
/*
* The stack section will occupy the remaining REGION_STACK region and may
* contain the task stacks. Depending on the region distribution this
* section may be of zero size.
*/
bsp_section_stack_begin = .;
. += ORIGIN (REGION_STACK) + LENGTH (REGION_STACK) - ABSOLUTE (.);
bsp_section_stack_end = .;
} > REGION_STACK AT > REGION_STACK
bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_begin;
.nocache : ALIGN_WITH_INPUT {
bsp_section_nocache_begin = .;
*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_nocache*)))
bsp_section_nocache_end = .;
} > REGION_NOCACHE AT > REGION_NOCACHE_LOAD
bsp_section_nocache_size = bsp_section_nocache_end - bsp_section_nocache_begin;
bsp_section_nocache_load_begin = LOADADDR (.nocache);
bsp_section_nocache_load_end = bsp_section_nocache_load_begin + bsp_section_nocache_size;
.nocachenoload (NOLOAD) : ALIGN_WITH_INPUT {
bsp_section_nocachenoload_begin = .;
*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_noload_nocache*)))
bsp_section_nocacheheap_begin = .;
. += ORIGIN (REGION_NOCACHE) + LENGTH (REGION_NOCACHE) - ABSOLUTE (.);
bsp_section_nocacheheap_end = .;
bsp_section_nocachenoload_end = .;
} > REGION_NOCACHE AT > REGION_NOCACHE
bsp_section_nocacheheap_size = bsp_section_nocacheheap_end - bsp_section_nocacheheap_begin;
bsp_section_nocachenoload_size = bsp_section_nocachenoload_end - bsp_section_nocachenoload_begin;
/* FIXME */
RamBase = ORIGIN (REGION_WORK);
RamSize = LENGTH (REGION_WORK);
RamEnd = RamBase + RamSize;
WorkAreaBase = bsp_section_work_begin;
HeapSize = 0;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1. */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions. */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2. */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2. */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions. */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3. */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* DWARF 5. */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.debug_sup 0 : { *(.debug_sup) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
/* Addition to let linker know about custom section for GDB pretty-printing support. */
.debug_gdb_scripts 0 : { *(.debug_gdb_scripts) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
/*
* This is a RTEMS specific section to catch all unexpected input
* sections. In case you get an error like
* "section `.unexpected_sections' will not fit in region
* `UNEXPECTED_SECTIONS'"
* you have to figure out the offending input section and add it to the
* appropriate output section definition above.
*/
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
}

47
bsps/aarch64/shared/start/start-cpu-mpidr.S
View File

@@ -1,47 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief This source file contains the
* _AArch64_Get_current_processor_for_system_start() default implementation
* using the MPIDR_EL1.
*/
/*
* Copyright (C) 2024 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/asm.h>
FUNCTION_ENTRY(_AArch64_Get_current_processor_for_system_start)
/* Return the affinity level 0 reported by the MPIDR_EL1 */
mrs x0, mpidr_el1
and x0, x0, #0xff
ret
FUNCTION_END(_AArch64_Get_current_processor_for_system_start)

346
bsps/aarch64/shared/start/start.S
View File

@@ -1,346 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief Boot and system start code.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/asm.h>
#include <rtems/score/percpu.h>
#include <bspopts.h>
/* Global symbols */
.globl _start
.section ".bsp_start_text", "ax"
/* Start entry */
_start:
/*
* We do not save the context since we do not return to the boot
* loader but preserve x1 and x2 to allow access to bootloader parameters
*/
#ifndef BSP_START_NEEDS_REGISTER_INITIALIZATION
mov x5, x1 /* machine type number or ~0 for DT boot */
mov x6, x2 /* physical address of ATAGs or DTB */
#else /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
/*
* This block is dead code. No aarch64 targets require this. It might be
* needed for hardware simulations or in future processor variants with
* lock-step cores.
*/
mov x0, XZR
mov x1, XZR
mov x2, XZR
mov x3, XZR
mov x4, XZR
mov x5, XZR
mov x6, XZR
mov x7, XZR
mov x8, XZR
mov x9, XZR
mov x10, XZR
mov x11, XZR
mov x12, XZR
mov x13, XZR
mov x14, XZR
mov x15, XZR
mov x16, XZR
mov x17, XZR
mov x18, XZR
mov x19, XZR
mov x20, XZR
mov x21, XZR
mov x22, XZR
mov x23, XZR
mov x24, XZR
mov x25, XZR
mov x26, XZR
mov x27, XZR
mov x28, XZR
mov x29, XZR
mov x30, XZR
#ifdef AARCH64_MULTILIB_VFP
mov CPTR_EL3, XZR
mov CPTR_EL2, XZR
mov d0, XZR
mov d1, XZR
mov d2, XZR
mov d3, XZR
mov d4, XZR
mov d5, XZR
mov d6, XZR
mov d7, XZR
mov d8, XZR
mov d9, XZR
mov d10, XZR
mov d11, XZR
mov d12, XZR
mov d13, XZR
mov d14, XZR
mov d15, XZR
mov d16, XZR
mov d17, XZR
mov d18, XZR
mov d19, XZR
mov d20, XZR
mov d21, XZR
mov d22, XZR
mov d23, XZR
mov d24, XZR
mov d25, XZR
mov d26, XZR
mov d27, XZR
mov d28, XZR
mov d29, XZR
mov d30, XZR
mov d31, XZR
#endif /* AARCH64_MULTILIB_VFP */
#endif /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
/* Initialize SCTLR_EL1 */
mov x0, XZR
#if defined(RTEMS_DEBUG)
/* Enable Stack alignment checking */
orr x0, x0, #(1<<3)
#endif
msr SCTLR_EL1, x0
#if defined(BSP_START_ENABLE_EL2_START_SUPPORT) || \
defined(BSP_START_ENABLE_EL3_START_SUPPORT)
mrs x0, CurrentEL
cmp x0, #(1<<2)
b.eq .L_el1_start
#endif
#if defined(BSP_START_ENABLE_EL3_START_SUPPORT)
cmp x0, #(2<<2)
b.eq .L_el2_start
.L_el3_start:
/*
* Before leaving the Secure World, we need to initialize the GIC. We
* do that here in an early stack context in EL3. This will NOT work
* on secondary core boot! We assume only the primary boot core will
* start in EL3 if any. Usually on real hardware, we should be running
* on top of trusted firmware and will not boot in EL3. Qemu fakes it
* for us and will start the primary core in EL3 and secondary cores
* will be brought up in EL1NS as expected.
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_ISR_Stack_size
ldr w2, =_ISR_Stack_area_begin
#else
ldr x1, =_ISR_Stack_size
ldr x2, =_ISR_Stack_area_begin
#endif
add x3, x1, x2
/* using SP0 for the early init stack context at EL3 */
msr spsel, #0
mov sp, x3
/*
* Invoke the start hook 0.
* We don't set up exception handling, so this hook better behave.
*/
bl bsp_start_hook_0
/* Drop from EL3 to EL2 */
/* Initialize HCR_EL2 and SCTLR_EL2 */
msr HCR_EL2, XZR
msr SCTLR_EL2, XZR
/* Set EL2 Execution state via SCR_EL3 */
mrs x0, SCR_EL3
/* Set EL2 to AArch64 */
orr x0, x0, #(1<<10)
/* Set EL1 to NS */
orr x0, x0, #1
msr SCR_EL3, x0
/* set EL2h mode for eret */
mov x0, #0b01001
msr SPSR_EL3, x0
/* Set EL2 entry point */
adr x0, .L_el2_start
msr ELR_EL3, x0
eret
#endif
#if defined(BSP_START_ENABLE_EL2_START_SUPPORT) || \
defined(BSP_START_ENABLE_EL3_START_SUPPORT)
.L_el2_start:
/* Drop from EL2 to EL1 */
/* Configure HCR_EL2 */
mrs x0, HCR_EL2
/* Set EL1 Execution state to AArch64 */
orr x0, x0, #(1<<31)
/* Disable ID traps */
bic x0, x0, #(1<<15)
bic x0, x0, #(1<<16)
bic x0, x0, #(1<<17)
bic x0, x0, #(1<<18)
msr HCR_EL2, x0
/* Set to EL1h mode for eret */
mov x0, #0b00101
msr SPSR_EL2, x0
/* Set EL1 entry point */
adr x0, .L_el1_start
msr ELR_EL2, x0
eret
.L_el1_start:
#endif
#ifdef RTEMS_SMP
bl _AArch64_Get_current_processor_for_system_start
/*
* Check that this is a configured processor. If not, then there is
* not much that can be done since we do not have a stack available for
* this processor. Just loop forever in this case.
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_SMP_Processor_configured_maximum
#else
ldr x1, =_SMP_Processor_configured_maximum
#endif
ldr w1, [x1]
cmp x1, x0
bgt .Lconfigured_processor
.Linvalid_processor_wait_for_ever:
wfe
b .Linvalid_processor_wait_for_ever
.Lconfigured_processor:
/*
* Get current per-CPU control and store it in PL1 only Thread ID
* Register (TPIDR_EL1).
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_Per_CPU_Information
#else
ldr x1, =_Per_CPU_Information
#endif
add x1, x1, x0, lsl #PER_CPU_CONTROL_SIZE_LOG2
msr TPIDR_EL1, x1
#endif
/* Calculate interrupt stack area end for current processor */
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_ISR_Stack_size
#else
ldr x1, =_ISR_Stack_size
#endif
#ifdef RTEMS_SMP
add x3, x0, #1
mul x1, x1, x3
#endif
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w2, =_ISR_Stack_area_begin
#else
ldr x2, =_ISR_Stack_area_begin
#endif
add x3, x1, x2
/* Disable interrupts and debug */
msr DAIFSet, #0xa
#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
mov x8, XZR
mov x9, XZR
mov x10, XZR
mov x11, XZR
mov x12, XZR
mov x13, XZR
mov x14, XZR
mov x15, XZR
#endif
/*
* SPx: the stack pointer corresponding to the current exception level
* Normal operation for RTEMS on AArch64 uses SPx and runs on EL1
* Exception operation (synchronous errors, IRQ, FIQ, System Errors) uses SP0
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =bsp_stack_exception_size
#else
ldr x1, =bsp_stack_exception_size
#endif
/* Switch to SP0 and set exception stack */
msr spsel, #0
mov sp, x3
/* Switch back to SPx for normal operation */
msr spsel, #1
sub x3, x3, x1
/* Set SP1 stack used for normal operation */
mov sp, x3
/* Stay in EL1 mode */
#ifdef AARCH64_MULTILIB_VFP
#ifdef AARCH64_MULTILIB_HAS_CPACR
/* Read CPACR */
mrs x0, CPACR_EL1
/* Enable EL1 access permissions for CP10 */
orr x0, x0, #(1 << 20)
/* Write CPACR */
msr CPACR_EL1, x0
isb
#endif
/* FPU does not need to be enabled on AArch64 */
/* Ensure FPU traps are disabled by default */
mrs x0, FPCR
bic x0, x0, #((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12))
bic x0, x0, #(1 << 15)
msr FPCR, x0
#endif /* AARCH64_MULTILIB_VFP */
/* Branch to start hook 1 */
bl bsp_start_hook_1
/* Branch to boot card */
mov x0, #0
bl boot_card

145
bsps/aarch64/xilinx-versal/console/console.c
View File

@@ -1,145 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This source file contains this BSP's console configuration.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/console.h>
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
#include <bsp/irq.h>
#include <dev/serial/arm-pl011.h>
#include <dev/serial/versal-uart.h>
#include <bspopts.h>
static versal_pl011_context versal_uart_instances[2] = {
{
.pl011_ctx = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Versal UART 0"),
.regs = (arm_pl011_uart *) 0xff000000,
.irq = VERSAL_IRQ_UART_0,
.clock = VERSAL_CLOCK_UART,
.initial_baud = VERSAL_UART_DEFAULT_BAUD
}
}, {
.pl011_ctx = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Versal UART 1"),
.regs = (arm_pl011_uart *) 0xff010000,
.irq = VERSAL_IRQ_UART_1,
.clock = VERSAL_CLOCK_UART,
.initial_baud = VERSAL_UART_DEFAULT_BAUD
}
}
};
rtems_status_code console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
size_t i;
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(versal_uart_instances); ++i) {
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
rtems_termios_device_install(
&uart[0],
&versal_uart_handler,
NULL,
&versal_uart_instances[i].pl011_ctx.base
);
if (i == BSP_CONSOLE_MINOR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
return RTEMS_SUCCESSFUL;
}
void versal_debug_console_flush(void)
{
versal_uart_reset_tx_flush(
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base
);
}
static void versal_debug_console_out(char c)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
arm_pl011_write_polled(base, c);
}
static void versal_debug_console_init(void)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
(void) versal_uart_initialize(base);
BSP_output_char = versal_debug_console_out;
}
static void versal_debug_console_early_init(char c)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
(void) versal_uart_initialize(base);
BSP_output_char = versal_debug_console_out;
versal_debug_console_out(c);
}
static int versal_debug_console_in(void)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
return arm_pl011_read_polled(base);
}
BSP_output_char_function_type BSP_output_char = versal_debug_console_early_init;
BSP_polling_getchar_function_type BSP_poll_char = versal_debug_console_in;
RTEMS_SYSINIT_ITEM(
versal_debug_console_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);

378
bsps/aarch64/xilinx-versal/dev/serial/versal-uart.c
View File

@@ -1,378 +0,0 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2022 Chris Johns <chris@contemporary.software>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <dev/serial/versal-uart.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/irq.h>
#include <bspopts.h>
static uint32_t versal_uart_intr_all(void)
{
return PL011_UARTI_OEI |
PL011_UARTI_BEI |
PL011_UARTI_PEI |
PL011_UARTI_FEI |
PL011_UARTI_RTI |
PL011_UARTI_TXI |
PL011_UARTI_RXI |
PL011_UARTI_DSRMI |
PL011_UARTI_DCDMI |
PL011_UARTI_CTSMI |
PL011_UARTI_RIMI;
}
#ifdef BSP_CONSOLE_USE_INTERRUPTS
static void versal_uart_intr_clear(volatile arm_pl011_uart *regs, uint32_t ints)
{
regs->base.uarticr = ints;
}
static void versal_uart_intr_clearall(volatile arm_pl011_uart *regs)
{
versal_uart_intr_clear(regs, versal_uart_intr_all());
}
static void versal_uart_intr_enable(volatile arm_pl011_uart *regs, uint32_t ints)
{
regs->base.uartimsc |= ints;
}
#endif
static void versal_uart_intr_disable(volatile arm_pl011_uart *regs, uint32_t ints)
{
regs->base.uartimsc &= ~ints;
}
static void versal_uart_intr_disableall(volatile arm_pl011_uart *regs)
{
versal_uart_intr_disable(regs, versal_uart_intr_all());
}
#ifdef BSP_CONSOLE_USE_INTERRUPTS
static bool versal_uart_flags_clear(volatile arm_pl011_uart *regs, uint32_t flags)
{
return (regs->base.uartfr & flags) == 0;
}
static void versal_uart_interrupt(void *arg)
{
rtems_termios_tty *tty = arg;
versal_pl011_context *ctx = rtems_termios_get_device_context(tty);
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
uint32_t uartmis = regs->base.uartmis;
versal_uart_intr_clear(regs, uartmis);
if ((uartmis & (PL011_UARTI_RTI | PL011_UARTI_RXI)) != 0) {
char buf[32];
int c = 0;
while (c < sizeof(buf) &&
versal_uart_flags_clear(regs, PL011_UARTFR_RXFE)) {
buf[c++] = (char) PL011_UARTDR_DATA_GET(regs->base.uartdr);
}
rtems_termios_enqueue_raw_characters(tty, buf, c);
}
if (ctx->transmitting) {
int sent = ctx->pl011_ctx.tx_queued_chars;
ctx->transmitting = false;
ctx->pl011_ctx.tx_queued_chars = 0;
versal_uart_intr_disable(regs, PL011_UARTI_TXI);
rtems_termios_dequeue_characters(tty, sent);
}
}
#endif
void versal_uart_reset_tx_flush(rtems_termios_device_context *base)
{
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) arm_pl011_get_regs(base);
int c = 4;
while (c-- > 0) {
arm_pl011_write_polled(base, '\r');
}
while ((regs->base.uartfr & PL011_UARTFR_TXFE) == 0) {
/* Wait for empty */
}
while ((regs->base.uartfr & PL011_UARTFR_BUSY) != 0) {
/* Wait for empty */
}
}
int versal_uart_initialize(rtems_termios_device_context *base)
{
volatile pl011_base *regs = (volatile pl011_base *)arm_pl011_get_regs(base);
arm_pl011_context *ctx = (arm_pl011_context *) base;
uint32_t maxerr = 3;
uint32_t ibauddiv = 0;
uint32_t fbauddiv = 0;
int rv;
versal_uart_reset_tx_flush(base);
rv = arm_pl011_compute_baudrate_params(
&ibauddiv,
&fbauddiv,
VERSAL_UART_DEFAULT_BAUD,
ctx->clock,
maxerr
);
if (rv != 0) {
return rv;
}
/* Line control: 8-bit word length, no parity, no FIFO, 1 stop bit */
regs->uartlcr_h = PL011_UARTLCR_H_WLEN( PL011_UARTLCR_H_WLEN_8 )
| PL011_UARTLCR_H_FEN;
/* Control: receive, transmit, uart enable, no CTS, no RTS, no loopback */
regs->uartcr = PL011_UARTCR_RXE
| PL011_UARTCR_TXE
| PL011_UARTCR_UARTEN;
regs->uartibrd = ibauddiv;
regs->uartfbrd = fbauddiv;
return 0;
}
static bool versal_uart_first_open(
rtems_termios_tty *tty,
rtems_termios_device_context *base,
struct termios *term,
rtems_libio_open_close_args_t *args
)
{
#ifdef BSP_CONSOLE_USE_INTERRUPTS
versal_pl011_context *ctx = (versal_pl011_context *) base;
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
rtems_status_code sc;
ctx->transmitting = false;
ctx->pl011_ctx.tx_queued_chars = 0;
ctx->pl011_ctx.needs_sw_triggered_tx_irq = true;
#endif
rtems_termios_set_initial_baud(tty, VERSAL_UART_DEFAULT_BAUD);
versal_uart_initialize(base);
#ifdef BSP_CONSOLE_USE_INTERRUPTS
regs->base.uartifls = PL011_UARTIFLS_RXIFLSEL(2) | PL011_UARTIFLS_TXIFLSEL(2);
regs->base.uartlcr_h |= PL011_UARTLCR_H_FEN;
versal_uart_intr_disableall(regs);
sc = rtems_interrupt_handler_install(
ctx->pl011_ctx.irq,
"UART",
RTEMS_INTERRUPT_SHARED,
versal_uart_interrupt,
tty
);
if (sc != RTEMS_SUCCESSFUL) {
return false;
}
versal_uart_intr_clearall(regs);
versal_uart_intr_enable(regs, PL011_UARTI_RTI | PL011_UARTI_RXI);
#endif
return true;
}
#ifdef BSP_CONSOLE_USE_INTERRUPTS
static void versal_uart_last_close(
rtems_termios_tty *tty,
rtems_termios_device_context *base,
rtems_libio_open_close_args_t *args
)
{
versal_pl011_context *ctx = (versal_pl011_context *) base;
rtems_interrupt_handler_remove(ctx->pl011_ctx.irq, versal_uart_interrupt, tty);
}
#endif
static void versal_uart_write_support(
rtems_termios_device_context *base,
const char *buf,
size_t len
)
{
#ifdef BSP_CONSOLE_USE_INTERRUPTS
versal_pl011_context *ctx = (versal_pl011_context *) base;
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
if (len > 0) {
size_t len_remaining = len;
const char *p = &buf[0];
versal_uart_intr_enable(regs, PL011_UARTI_TXI);
/*
* The PL011 IP in the Versal needs preloading the TX FIFO with
* exactly 17 characters for the first TX interrupt to be
* generated.
*/
if (ctx->pl011_ctx.needs_sw_triggered_tx_irq) {
ctx->pl011_ctx.needs_sw_triggered_tx_irq = false;
for (int i = 0; i < 17; ++i) {
regs->base.uartdr = PL011_UARTDR_DATA('\r');
}
}
while (versal_uart_flags_clear(regs, PL011_UARTFR_TXFF) &&
len_remaining > 0) {
regs->base.uartdr = PL011_UARTDR_DATA(*p++);
--len_remaining;
}
ctx->pl011_ctx.tx_queued_chars = len - len_remaining;
ctx->transmitting = true;
}
#else
ssize_t i;
for (i = 0; i < len; ++i) {
arm_pl011_write_polled(base, buf[i]);
}
#endif
}
static bool versal_uart_set_attributes(
rtems_termios_device_context *context,
const struct termios *term
)
{
versal_pl011_context *ctx = (versal_pl011_context *) context;
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
int32_t baud;
uint32_t ibauddiv = 0;
uint32_t fbauddiv = 0;
uint32_t mode = 0;
int rc;
/*
* Determine the baud rate
*/
baud = rtems_termios_baud_to_number(term->c_ospeed);
if (baud > 0) {
uint32_t maxerr = 3;
rc = arm_pl011_compute_baudrate_params(
&ibauddiv,
&fbauddiv,
baud,
ctx->pl011_ctx.clock,
maxerr
);
if (rc != 0) {
return rc;
}
}
/*
* Configure the mode register
*/
mode = regs->base.uartlcr_h & PL011_UARTLCR_H_FEN;
/*
* Parity
*/
if ((term->c_cflag & PARENB) != 0) {
mode |= PL011_UARTLCR_H_PEN;
if ((term->c_cflag & PARODD) == 0) {
mode |= PL011_UARTLCR_H_EPS;
}
}
/*
* Character Size
*/
switch (term->c_cflag & CSIZE)
{
case CS5:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_5);
break;
case CS6:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_6);
break;
case CS7:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_7);
break;
case CS8:
default:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_8);
break;
}
/*
* Stop Bits
*/
if (term->c_cflag & CSTOPB) {
/* 2 stop bits */
mode |= PL011_UARTLCR_H_STP2;
}
versal_uart_intr_disableall(regs);
/*
* Wait for any data in the TXFIFO to be sent then wait while the
* transmiter is active.
*/
while ((regs->base.uartfr & PL011_UARTFR_TXFE) == 0 ||
(regs->base.uartfr & PL011_UARTFR_BUSY) != 0) {
/* Wait */
}
regs->base.uartcr = PL011_UARTCR_UARTEN;
/* Ignore baud rate of B0. There are no modem control lines to de-assert */
if (baud > 0) {
regs->base.uartibrd = ibauddiv;
regs->base.uartfbrd = fbauddiv;
}
regs->base.uartlcr_h = mode;
/* Control: receive, transmit, uart enable, no CTS, no RTS, no loopback */
regs->base.uartcr = PL011_UARTCR_RXE
| PL011_UARTCR_TXE
| PL011_UARTCR_UARTEN;
#ifdef BSP_CONSOLE_USE_INTERRUPTS
versal_uart_intr_clearall(regs);
versal_uart_intr_enable(regs, PL011_UARTI_RTI | PL011_UARTI_RXI);
#endif
return true;
}
const rtems_termios_device_handler versal_uart_handler = {
.first_open = versal_uart_first_open,
.set_attributes = versal_uart_set_attributes,
.write = versal_uart_write_support,
#ifdef BSP_CONSOLE_USE_INTERRUPTS
.last_close = versal_uart_last_close,
.mode = TERMIOS_IRQ_DRIVEN
#else
.poll_read = arm_pl011_read_polled,
.mode = TERMIOS_POLLED
#endif
};

94
bsps/aarch64/xilinx-versal/include/bsp.h
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@@ -1,94 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This header file provides the core BSP definitions
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_XILINX_VERSAL_BSP_H
#define LIBBSP_AARCH64_XILINX_VERSAL_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#define BSP_RESET_SMC
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0xf9040000
#define BSP_ARM_GIC_DIST_BASE 0xf9000000
#define BSP_ARM_GIC_REDIST_BASE 0xf9080000
/*
* DDRMC mapping
*/
LINKER_SYMBOL(bsp_r0_ram_base)
LINKER_SYMBOL(bsp_r0_ram_end)
LINKER_SYMBOL(bsp_r1_ram_base)
LINKER_SYMBOL(bsp_r1_ram_end)
/**
* @brief Versal specific set up of the MMU.
*
* Provide in the application to override the defaults in the BSP.
*/
BSP_START_TEXT_SECTION void versal_setup_mmu_and_cache(void);
void versal_debug_console_flush(void);
uint32_t versal_clock_i2c0(void);
uint32_t versal_clock_i2c1(void);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_XILINX_VERSAL_BSP_H */

64
bsps/aarch64/xilinx-versal/include/bsp/i2c.h
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@@ -1,64 +0,0 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2022 Chris Johns <chris@contemporary.software>
* Copyright (C) 2014 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_ARM_XILINX_VERSAL_I2C_H
#define LIBBSP_ARM_XILINX_VERSAL_I2C_H
#include <dev/i2c/cadence-i2c.h>
#include <bsp/irq.h>
#include <bsp.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
static inline int versal_register_i2c_0(void)
{
return i2c_bus_register_cadence(
"/dev/i2c-0",
0x00FF020000,
versal_clock_i2c0(),
VERSAL_IRQ_I2C_0
);
}
static inline int versal_register_i2c_1(void)
{
return i2c_bus_register_cadence(
"/dev/i2c-1",
0x00FF030000,
versal_clock_i2c1(),
VERSAL_IRQ_I2C_1
);
}
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_XILINX_VERSAL_I2C_H */

74
bsps/aarch64/xilinx-versal/include/bsp/irq.h
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@@ -1,74 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This header file provides the BSP's IRQ definitions.
*/
/*
* Copyright (C) Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H
#define LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <dev/irq/arm-gic-irq.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_INTERRUPT_VECTOR_COUNT 1020
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_S_PPI 29
#define BSP_TIMER_PHYS_NS_PPI 30
#define VERSAL_IRQ_I2C_0 46
#define VERSAL_IRQ_I2C_1 47
#define VERSAL_IRQ_UART_0 50
#define VERSAL_IRQ_UART_1 51
#define VERSAL_IRQ_ETHERNET_0 88
#define VERSAL_IRQ_ETHERNET_0_WAKEUP 89
#define VERSAL_IRQ_ETHERNET_1 90
#define VERSAL_IRQ_ETHERNET_1_WAKEUP 91
#define VERSAL_IRQ_QSPI 157
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H */

41
bsps/aarch64/xilinx-versal/include/bsp/xil-compat.h
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@@ -1,41 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsArmXilinxVersal
*
* @brief This header file provides BSP-specific interfaces.
*/
/*
* Copyright (C) 2024 On-Line Applications Research Corporation (OAR)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_ARM_XILINX_ZYNQMP_RPU_BSP_XIL_COMPAT_H
#define LIBBSP_ARM_XILINX_ZYNQMP_RPU_BSP_XIL_COMPAT_H
#include <bsp/xil-compat-common.h>
#endif

73
bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h
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@@ -1,73 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup versal_uart
*
* @brief Xilinx Versal UART support.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_ARM_XILINX_VERSAL_UART_H
#define LIBBSP_ARM_XILINX_VERSAL_UART_H
#include <rtems/termiostypes.h>
#include <dev/serial/arm-pl011.h>
#include <dev/serial/arm-pl011-regs.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup versal_uart Xilinx Versal UART Support
* @ingroup RTEMSBSPsARMVersal
* @brief UART Support
*
* This driver operates an instance of the Xilinx UART present in the
* family of Xilinx Versal SoCs.
*/
typedef struct {
arm_pl011_context pl011_ctx;
volatile bool transmitting;
} versal_pl011_context;
extern const rtems_termios_device_handler versal_uart_handler;
#define VERSAL_UART_DEFAULT_BAUD 115200
int versal_uart_initialize(rtems_termios_device_context *base);
void versal_uart_reset_tx_flush(rtems_termios_device_context *base);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_XILINX_VERSAL_UART_H */

45
bsps/aarch64/xilinx-versal/include/tm27.h
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@@ -1,45 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This header file provides functionality for the tm27 test.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

60
bsps/aarch64/xilinx-versal/start/bspstart.c
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@@ -1,60 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This source file contains the implementation of bsp_start().
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
#include <rtems/score/basedefs.h>
RTEMS_WEAK uint32_t versal_clock_i2c0(void)
{
return VERSAL_CLOCK_I2C0;
}
RTEMS_WEAK uint32_t versal_clock_i2c1(void)
{
return VERSAL_CLOCK_I2C1;
}
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

54
bsps/aarch64/xilinx-versal/start/bspstarthooks.c
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@@ -1,54 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This source file contains the implementation of this BSP's startup
* hooks.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/irq-generic.h>
#include <bsp/start.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
bsp_interrupt_facility_initialize();
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
versal_setup_mmu_and_cache();
bsp_start_clear_bss();
}

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