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Author SHA1 Message Date
Christian Mauderer
051778e9d6 imfs: Fix index underrun when extending empty file
Currently the following sequence causes a endless loop when extending an
IMFS file:

- Create a file with zero length and close it.
- Make sure nearly no allocatable memory is left.
- Open the file and write enough data into it that more than the
  remaining memory will be used.

In that case when extending the IMFS file, the file currently need zero
blocks. If allocating enough new blocks fails, the already allocated new
blocks will be freed again.

The comparison of block>=old_blocks that has been used prior to this
patch compared two unsigned numbers. If old_blocks was zero, the
comparison of these two numbers always evaluated to true.

This patch frees the last block in a separate step to avoid this
problem.

Note: This patch is a backport of
43119193ef from RTEMS master. It only
contains the bugfix. Adding a test case has been skipped because that
part of the patch didn't apply without problems and is not really
relevant for fixing the bug.

Fixes #2353
2022-04-07 10:45:12 +02:00
Thanassis Tsiodras
63c6b06fd1 bsps/sparc: Fix global construction/destruction
The

  KEEP (*(SORT(.ctors.*)))
  KEEP (*(.ctors))

cannot be simplified to

  KEEP (*(SORT(.ctors*)))

since

  .ctors < .ctors.*

in lexicographical order.

See spglobalcon02 test case.

Close #3319.
2021-08-12 14:47:59 +02:00
Daniel Hellstrom
a100457c7d leon,gr1553b: improve init check
Check in init3 not needed since same data is already checked in init2
stage. Adds an extra check that the APB register space is available before
accessing it.

Closes #2331
2020-10-01 11:35:03 +10:00
Chris Johns
55d9d8c552 libmisc/shell: Updating joel script handling fixes from RTEMS 5
Updates #3877
2020-04-14 18:48:32 +10:00
Chris Johns
4d906d6af1 libmisc/shell: Fix the handling of joel scripts in telnet
- Fix the passing of std[in/out] to child threads
- Fix deleting of managed memory in the key destructor
- Only set the key in the main loop thread
- Only allocate a shell env outside of the main loop
- Fix memory leak if the task start fails
- Remove error level from shell env, it cannot be returned this way. Add
  exit_code but the API is broken so it cannot be returned.

Closes #3877
2020-02-19 19:05:54 +11:00
Chris Johns
fe09d8d4d3 libcsupport/newlib: Call newlib's __sinit to force reent initialisation
- Newlib overtites any FILE pointers set in stdin, stdout or stderr.

Closes #3870
2020-02-19 19:01:08 +11:00
Jonathan Brandmeyer
33c82ddba1 shell: Correct argument order of mfill
Close #3722.

(cherry picked from commit 2e8a66d13f)
2019-03-14 09:57:40 -04:00
Sebastian Huber
dc6bd8bb66 score: Fix ISR enable in _Thread_Dispatch_enable()
This bug had probably no effect since the interrupt enable is idempotent
on all CPU ports.

Close #3497.
2018-08-20 08:40:24 +02:00
Sebastian Huber
3abc731b22 rfs: Remove erroneous call of rtems_disk_release()
The function rtems_rfs_buffer_sync() erroneously calls
rtems_disk_release(). This screws up the reference counting of the disk.

Close #3494.
2018-08-10 06:57:10 +02:00
Sebastian Huber
d4165e7173 sptests/sp36: Remove obsolete test program
It tests the (never really working) strict order mutex option.

Update #3406.
2018-06-19 07:58:13 +02:00
Chris Johns
c3353ae565 cpukit/mttpd: Add a callback to generate a per file HTTP etag.
Closes #3324
2018-03-08 15:34:15 +11:00
Chris Johns
7093cb5e5d libtest/dl01: Add dlerror tests.
Update #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
5812a26eeb Update dlerror usage
Handles possible NULL return value

Updates #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
dc746b50ca libdl: Fix dlerror return type
POSIX specifies char *, not const char *

Updates #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
a346408e4e libdl: dlerror return NULL when no error
Updates #2747
2018-02-08 14:21:13 +11:00
Patrick Gauvin
a2a9751823 libdl: Clear error between dlerror invocations
Updates #2747
2018-02-08 14:21:13 +11:00
Chris Johns
1a304307a2 testsuites/libtest: Set EXENT to .exe so executable are correctly named.
The configure order effects how it works.

Close #3297
2018-02-08 14:20:26 +11:00
Christian Mauderer
d438427cbe dosfs: Allow creating a file with similar name.
If there is already a file with a long file name it isn't possible to
create a second file which has a name that ends on the first files name
(for example ets.beam and sets.beam). This patch fixes that.

Close #3258.
2017-12-07 08:04:11 +01:00
Christian Mauderer
004a63efef dosfs: Fix files with same name as volume name.
Take care that a file in the root directory with the same name as the
volume name can be found.

Close #3257.
2017-12-05 08:02:42 +01:00
Sebastian Huber
c139a70597 posix: Fix aio_cancel()
Close #3164.
2017-10-04 09:26:40 +02:00
Sebastian Huber
1a21831b3c i2c: Fix EEPROM driver program timeout handling
The RTEMS_MILLISECONDS_TO_TICKS() macro doesn't round up. Do not use it
to calculate the program timeout in ticks. Check program done condition
after the timeout check to account for pre-emptions.

Close #3162.
2017-10-02 13:44:36 +02:00
Sebastian Huber
8ca15e26ba i2c: Send MSB of address first for EEPROMs
Close #3161.
2017-10-02 13:44:32 +02:00
Sebastian Huber
a3199d91f3 dosfs: Fix fat_file_update()
Do not update the non-existant meta-data of the root directory.

Close #2944.
2017-09-06 14:40:38 +02:00
Sebastian Huber
a76c31e13d dosfs: Fix find name next entry preparation
Close #2964.
2017-09-06 14:09:11 +02:00
Sebastian Huber
e1c3dc0909 dosfs: Fix msdos_dir_read()
Set a proper name buffer length for each converter invocation.

Close #2987.
2017-09-06 13:24:34 +02:00
Chris Johns
2ed53cb982 testsuite/dl: Add C++ by default for DL tests which use C++.
- Add AM C++ support to the testsuite configure.ac script.
- Fix the dependences in the  DL tests.

Closes #3024.
2017-08-23 09:48:56 +10:00
Chris Johns
89fd08eae6 libmisc/shell: Make some internal shell functions public.
- Add 'rtems_shell_init_environment()' so a user can create the
  shell environment without needing to run a shell.
- Move 'rtems_shell_lookup_topic', 'rtems_shell_can_see_cmd',
  and 'rtems_shell_execute_cmd' from the internal interface to
  the public interface.

Closes #3104.
2017-08-23 09:48:56 +10:00
Sebastian Huber
492c95eee6 confdefs: Fix POSIX keys configuration
Remove the OBJECTS_UNLIMITED_OBJECTS flag for the memory size
configuration.

Close #3105.
2017-08-22 08:03:10 +02:00
Sebastian Huber
7d097c5c69 arm: Validate IT[7:0] bit field of PSR
Close #3093.
2017-08-10 09:24:26 +02:00
Sebastian Huber
5cc276e7c1 arm: Fix CPU context validation for Cortex-R4
Do not touch the FPSCR[QC] bit since this is DNM/RAZ on Cortex-R4.

Close #3092.
2017-08-10 08:21:04 +02:00
Sebastian Huber
7e91901303 arm: Fix ARMv7-M interrupt processing
Right after a "msr basepri_max, %[basepri]" instruction an interrupt
service may still take place (observed at least on Cortex-M7).  However,
pendable service calls that are activated during this interrupt service
may be delayed until interrupts are enable again.  The
_ARMV7M_Pendable_service_call() did not check that a thread dispatch is
allowed.  Move this test from _ARMV7M_Interrupt_service_leave() to
_ARMV7M_Pendable_service_call().

Close #3060.
2017-07-07 13:27:24 +02:00
Sebastian Huber
09cbe713ff bsps/arm: Fix bit field offset in GIC support
Close #3002.
2017-05-11 09:57:53 +02:00
Chris Johns
d2e31f70c1 libdl: Back port C++ exception throw and catch from 4.12.
Closes #2956.
2017-04-04 13:26:01 +10:00
Sebastian Huber
d51538bdbe dosfs: Fix file name search
Do not use our long file name entry count to optimize the file name
search. The Unicode comparison must be taken into account.

Close #2939.
2017-03-21 16:15:25 +01:00
Sebastian Huber
89164c67bc dosfs: Fix race condition msdos_dir_read()
Obtain file system instance lock before member access.

Close #2937.
2017-03-21 16:15:21 +01:00
Sebastian Huber
4c4869f483 dosfs: Rename fat_entries to lfn_entries
The name "fat_entries" for long file name directory entries is quite
misleading.
2017-03-21 16:15:17 +01:00
Sebastian Huber
7011f26061 dosfs: Fix long file name padding
Close #2934.
2017-03-21 16:15:11 +01:00
Sebastian Huber
49eb6061ec dosfs: msdos_filename_utf8_to_short_name_for_save
Simplify.
2017-03-21 16:15:09 +01:00
Sebastian Huber
5ed41a6d82 dosfs: Fix msdos_add_file()
Make sure that long file names work accross cluster boundaries.

Close #2929.
2017-03-21 16:15:04 +01:00
Sebastian Huber
58e8131184 dosfs: Simplify msdos_add_file()
Update #2929.
2017-03-21 16:15:00 +01:00
Sebastian Huber
565b1a57b7 dosfs: Add and use msdos_lfn_checksum()
Update #2929.
2017-03-21 16:14:59 +01:00
Sebastian Huber
ad3a744ac4 dosfs: Simplify fat_file_open()
Update #2929.
2017-03-21 16:14:57 +01:00
Sebastian Huber
201f3797b3 dosfs: Simplify msdos_creat_node()
Update #2929.
2017-03-21 16:14:53 +01:00
Sebastian Huber
c38f1fcf8f dosfs: Fix fat_file_write()
Remove forced overwrite which leads to file data corruption.  The logic
to determine a forced overwrite was fundamentally broken.  For simplity,
disable this feature.

Close #2622.
2017-03-21 16:14:44 +01:00
Sebastian Huber
21d7154b07 dosfs: Fix msdos_utf8_normalize_and_fold()
It is all right in case the result uses the full destination buffer.
Without this fix the handling of a maximum 8.3 short file name is
broken.

Close #2928.
2017-03-21 16:14:37 +01:00
Sebastian Huber
f08c71339c libio: Fix deadlock in location management
Perform a context-dependent deferred location release to avoid a
deadlock on the file system instance locks, for example during a
chdir().

Close #2936.
2017-03-21 16:13:11 +01:00
Chris Johns
2ea436a167 Config (.cfg) files are only valid if deeper than 5.
Closes #2827.
2017-03-21 14:38:59 +11:00
Sebastian Huber
a27128c5dc termios: Fix infinite loop in receive path
In canonical mode, the raw input buffer or the canonical buffer may
overflow without an end of line.  Avoid an infinite loop in this case.

Update #2915.
2017-02-28 09:55:58 +01:00
Sebastian Huber
0e8d205559 termios: Protect raw input buffer with device lock
Use the device lock to protect the raw input buffer management, e.g.
tail, head and buffer content updates.

Update #2914.
2017-02-28 09:55:55 +01:00
Sebastian Huber
35a3d81581 termios: Simplify rtems_termios_read_tty()
Remove dead code.

Update #2914.
2017-02-28 09:53:21 +01:00
Sebastian Huber
17f81ee3cb dosfs: Fix FAT32 formatter
The second FAT entry contains a bit to indicate if the FAT32 filesystem
is not dirty and a bit to indicate if there was no IO error.  Set both
bits for a fresh filesystem.  This prevents a warning if mounted on
Windows.

Update #2913.
2017-02-28 09:50:58 +01:00
Sebastian Huber
6ec60de37d dosfs: Directories should have a file size of 0
Update #2755.
2017-02-28 09:50:53 +01:00
Nick Withers
7e0a02a70f Remove old CVS keywords
Close #2388.
2017-02-15 14:53:07 +01:00
Sudarshan Rajagopalan
5b5ef4e479 Fix exception handler for supporting FPU
Close #2401.
2017-02-15 14:18:53 +01:00
Sebastian Huber
04684cbc43 dosfs: Fix msdos_find_file_in_directory()
For a filename match the entry must match without anything remaining.

Update #2908.
2017-02-14 08:09:57 +01:00
Sebastian Huber
69ae534cbb Change version to 4.11.1.99
Update #2886.
2017-01-26 08:31:50 +01:00
Christian Spindeldreier
af9143fba5 GRETH: Interrupt Handler Uses Wrong Events
closes #2796.
2017-01-12 09:38:38 -06:00
Joel Sherrill
d46a65d052 Remove texinfo format documentation. Replaced by Sphinx formatted documentation.
updates #2812.
2017-01-11 12:08:15 -06:00
Tim Cussins
a0b116dc35 virtex4, virtex5 bsp.h: Use BSP_INTERRUPT_STACK_SIZE not user space CONFIGURE_INTERRUPT_STACK_SIZE
closes #2801.
2016-11-03 12:51:53 -05:00
Sebastian Huber
59ee4abf24 sptests/spclock_err02: Update screen file 2016-11-02 07:57:07 +01:00
Pavel Pisa
58073284c6 bsps/arm: do not introduce CPU_CACHE_LINE_BYTES in 4.11 and correct CPU_STRUCTURE_ALIGNMENT. 2016-10-03 11:54:41 +02:00
Pavel Pisa
9d423d9c96 libdl/rtl-obj.c: synchronize cache should not depend on CPU_CACHE_LINE_BYTES.
The CPU_CACHE_LINE_BYTES has been introduced after 4.11 branch
fork and is not available for all architectures on RTEMS 4.11.

Use of rtems_cache_get_maximal_line_size() is more descriptive
choice. The min/max data/instruction cache line size is not critical
there, value is used for optimization only to use single operation
for decently following sections.
2016-10-03 11:01:39 +02:00
Pavel Pisa
2b54e73fb0 arm/tms570: document BSP setup with included hardware initialization. 2016-10-02 11:31:19 +02:00
Pavel Pisa
a94d49d3ad arm/tms570: update bootstrap generated preinstall.am 2016-10-02 11:31:19 +02:00
Pavel Pisa
006f86753a arm/tms570: include TMS570_USE_HWINIT_STARTUP option to select bare metal startup and selftest. 2016-10-02 11:31:19 +02:00
Pavel Pisa
8671786934 arm/tms570: include hardware initialization and selftest based on Ti HalCoGen generated files.
The configuration is specific for TMS570LS3137 based HDK.
Pins configuration can be easily changed in

  rtems/c/src/lib/libbsp/arm/tms570/hwinit/init_pinmux.c

file.

The list tms570_selftest_par_list in the file

  rtems/c/src/lib/libbsp/arm/tms570/hwinit/bspstarthooks-hwinit.c

specifies peripherals which health status is examined
by parity self-test at BSP start-up. It can be easily
modified for other TMS570 family members variants same
as the selection of other tests in bspstarthooks-hwinit.c.
2016-10-02 11:31:19 +02:00
Pavel Pisa
22ab88c486 arm/tms570: define base addresses of all TMS570LS3137 SPI interfaces.
Generated header file ti_herc/reg_spi.h contains complete registers
and fields set for Ti MibSPI peripheral.
Care has to be taken that only TMS570_SPI1, TMS570_SPI3 and TMS570_SPI5
are of this complete multibuffer type. TMS570_SPI2 and TMS570_SPI4
have substantial part of registers removed but else they are compatible.
2016-10-02 11:31:19 +02:00
Pavel Pisa
94e3c8384f bsp/tms570: ensure that change of SCI baudrate is not applied in the middle of character Tx.
The rtems_monitor_task() setups/updates termios attributes
of the opened TTY and if there is ongoing some other output
it leads to the stuck.

It would be better to use some termios API function which
would call drainOutput() in rtems/cpukit/libcsupport/src/termios.c.
But functionality is not accessible outside of core termios
implementation.

The loop waiting for last character to be sent has to be there anyway
because hardware does not provide Tx machine/shift register empty
interrupt.

Closes #2794
2016-10-02 11:31:19 +02:00
Pavel Pisa
ea41bccc30 bsp/tms570: regenerate preinstall makefile by bootstrap -p. 2016-10-02 11:31:19 +02:00
Pavel Pisa
d830414e69 bsp/tms570: include complete peripheral initialization to SCI driver.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2016-10-02 11:31:18 +02:00
Pavel Pisa
9d09f4977f bsp/tms570: update pinmux to provide support for initialization lists and clear of alt outputs. 2016-10-02 11:31:18 +02:00
Pavel Pisa
529d0751f5 bsp/tms570: include package balls and PINMMR registers mapping for TMS570LS3135ZWT chip. 2016-10-02 11:31:18 +02:00
Pavel Pisa
528c7d4bc8 bsps/arm: Export bsp_start_hook_0_done symbol from ARM start.S.
The symbol can be used by bsp_start_hook_0 when complete
RAM memory is initialization and overwritten during BSP
self-test. The test overwrites even memory used to store
return address / link register and regular resturn from
bsp_start_hook_0 is not possible then.
2016-10-02 11:30:59 +02:00
Pavel Pisa
fab0dd11cb arm/raspberrypi: minimized mainline patch move MMU in front of application image and correct RPi2 boot on 4.11 branch.
This is minimized version of mainline patch

  arm/raspberrypi: move MMU in front of application image to respect variable memory size.

plus correction which has been part of other mainline patches.

This is end of series which allows 4.11 to boot on Raspberry Pi.

Closes #2782

Closes #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
78627fe282 arm/raspberrypi: change interrupt dispatch and enable to generic vector id based approach.
Using conditional branches to find bits is extremely inefficient
and for asynchronous delivery of different interrupt sources
lead to total confusion of branch prediction unit.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
acb488ff59 arm/raspberrypi: remove duplicate setup of IRQ handler in the main ARM exception table.
Exception table setup is processed by common CPU architecture support.
For ARM architecture, it can be found in the file

rtems/c/src/lib/libbsp/arm/shared/start/start.S

and ends by bsp_vector_table_copy_done label.
The actual tabel content can be found at

  bsp_start_vector_table_begin

For ARMv7-A and even other variant with hypervisor mode support,
it is even not necessary to copy table to address 0 at all
because CP15 register can be used to specify alternative
table start address

  arm_cp15_set_vector_base_address(&)bsp_start_vector_table_begin;

ARMv7-M have register to set exception table base as well.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
b5501ba492 arm/raspberrypi: ensure that correct RPI_PERIPHERAL_BASE is provided by raspberrypi.h
If the raspberrypi.h has been included without preceding inclussion
of bsp.h then BSP_IS_RPI2 has not been set for Raspberry Pi 2
BSP variant and bad things happen later.

The patch includes bspopts.h by raspberrypi.h and even includes
bsp.h in critical peripherals support.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
b11669a956 arm/raspberrypi: reorder and update MMU config table to nor force RW section later to RO.
Enable even the first megabyte of SDRAM to be cache-able after
problems with stale cache content has been resolved by previous commit.
Because major part of application usually fits to the first
megabyte this speedups test dhrystone application by factor 40.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
404f659c83 arm/raspberrypi: Enable HYP to SVC switch for this BSP.
This support is required when newer firmware is used on
Raspberry Pi 2 boards.

Updates #2783
2016-10-02 10:40:35 +02:00
Pavel Pisa
f9c1e1172e bsps/arm: Support recent bootloaders starting kernel in HYP mode
When HYP mode is detected at startup then setup HYP mode
vectors table (for future extensions) clean exceptions
switching to HYP mode and switch CPU to ARM SVC mode.

BSPs which want to use this support need to include next option
in their configure.ac

  RTEMS_BSPOPTS_SET([BSP_START_IN_HYP_SUPPORT],[*],[1])
  RTEMS_BSPOPTS_HELP([BSP_START_IN_HYP_SUPPORT], [Support start of BSP in ARM HYP mode])
  AM_CONDITIONAL(BSP_START_IN_HYP_SUPPORT,test "$BSP_START_IN_HYP_SUPPORT" = "1")

and need to include next lines in corresponding Makefile.am

  if BSP_START_IN_HYP_SUPPORT
  libbsp_a_SOURCES += ../shared/startup/bsp-start-in-hyp-support.S
  endif

Updates #2783
2016-10-02 10:40:34 +02:00
Chris Johns
8add2b6c6f libbsp/arm: Fix ARM BSPs missing the bsp_translation_table_end symbol.
Closes #2775.
2016-10-02 10:40:34 +02:00
Chris Johns
197d0343a2 libbsp/arm: Add the TTB table to the default MMU set up as read/write.
This lets the table be changed at runtime for dynamic loading and
debugger support.

Closes #2775.
2016-10-02 10:40:34 +02:00
Sebastian Huber
be62c0b02c bsps/arm: Fix basic cache support for SMP
Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
28eeb6a86f bsps/arm: reorganize CP15 code to allow clean and invalidate ARMv7 cache by level.
New function arm_cp15_cache_invalidate_level and arm_cp15_cache_clean_level
can be used to maintain single cache level (instruction or data).

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
00dfdd6b08 bsps/arm: remove lock in arm_cp15_set_translation_table_entries().
Protection by rtems_interrupt_disable() is incompatible with SMP build.
Actual page table entries manipulation function does not need locking
and disabling cache and can be run concurrently even on multiple
CPUs as long as changes do not modify same region. If the function
is called from more threads/CPUs to modify same region with different
mapping options concurrently then there is problem at another level
of virtual address space management  and has to be solved by mutex
or other locking at that level.

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
6f4e903cf0 bsps/arm: use defines for cache type register format field.
The change documents meaning of codes and opens
well defined way to use cache type format for cache
examination/debugging outside of arm-cp15.h file.

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
22cc80783b arm/xilinx_zynq: ensure that cache is cleaned and MMU disabled when initialization starts.
The u-boot loader enables the MMU plus the data and instruction caches
in some versions which results in RTEMS boot failure.

Closes #2774.
2016-10-02 10:40:34 +02:00
Pavel Pisa
d3a428cafa arm/raspberrypi: use cache manager operations to flush/invalidate all cache levels.
This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
8c5c8b2700 arm/bsps: CP15 and basic cache support entire cache clean for more architecture variants now.
Next cache operations should work on most of cores now

  rtems_cache_flush_entire_data()
  rtems_cache_invalidate_entire_data()
  rtems_cache_invalidate_entire_instruction()

Instruction cache invalidate works on the first level for now only.
Data cacache operations are extended to ensure flush/invalidate
on all cache levels.

The CP15 arm_cp15_data_cache_clean_all_levels() function extended
to continue through unified levels too (ctype = 4).

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
ae3578a2c9 bsps/arm: do not disable MMU during translation table management operations.
Disabling MMU requires complex cache flushing and invalidation
operations. There is almost no way how to do that right
on SMP system without stopping all other CPUs. On the other hand,
there is documented sequence of operations which should be used
according to ARM manual and it guarantees even distribution
of maintenance operations to other cores for last generation
of Cortex-A cores with multiprocessor extension.

This change could require addition of appropriate entry
to arm_cp15_start_mmu_config_table for some BSPs to ensure
that MMU table stays accessible after MMU is enabled

  {
    .begin = (uint32_t) bsp_translation_table_base,
    .end = (uint32_t) bsp_translation_table_base + 0x4000,
    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
  }

Updates #2782
Updates #2783
2016-10-02 10:40:34 +02:00
Pavel Pisa
0d77c4f281 libdl/rtl-obj.c: synchronize cache after code relocation.
Memory content changes caused by relocation has to be
propagated to memory/cache level which is used/snooped
during instruction cache fill.

Closes #2438
Updates #2782
2016-10-02 10:40:33 +02:00
Pavel Pisa
fd6cd36b09 bsps/arm: basic on core cache support changed to use l1 functions.
The basic data and instruction rage functions should be compatible
for all ARMv4,5,6,7 functions. On the other hand, some functions
are not portable, for example arm_cp15_data_cache_test_and_clean()
and arm_cp15_data_cache_invalidate() for all versions and there
has to be specialized version for newer cores.
arm_cache_l1_properties_for_level uses CCSIDR which is not present
on older chips.

Actual version is only experimental, needs more changes
and problem has been found on RPi1 with dlopen so there seems
to be real problem.

Updates #2783
Updates #2782
2016-10-02 10:40:33 +02:00
Pavel Pisa
a114f99bd2 bsps/arm: Change code to explicit selection of cache implementation for ARM BSPs.
The original ARM architecture wide cache_.h is changed to dummy version
for targets not implementing/enablig cache at all.

The ARM targets equipped by cache should include
appropriate implementation.

Next options are available for now

c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h
  basic ARM cache integrated on the CPU core directly
  which requires only CP15 oparations

c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
  support for case where ARM L2C-310 cache controller
  is used. It is accessible as mmaped peripheral.

c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h
  Cortex-M specific cache support

Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
886b962e7b bsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310.
Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
eb3af275ea rtems+bsps/cache: Define cache manager operations for code synchronization and maximal alignment.
There is need for unambiguous named and defined cache function
which should be called when code is updated, loaded
or is self-modifying.

There should be function to obtain maximal cache line length
as well. This function can and should be used for allocations
which can be used for data and or code and ensures that
there are no partial cache lines overlaps on start and
end of allocated region.

Updates #2782
2016-10-02 10:40:33 +02:00
Pavel Pisa
9aaf8f2b0b score/arm: Ensure that copile time alignment is 64 bytes for Cortex-A multilib.
Some/many Cortex-A cores have data cache line length 64 bytes and maximum
value has to be used for system structures alignment.

Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
d5ff46bd52 arm/score and shared: define ARM hypervisor mode and alternate vector table base access.
The main reason for inclusion of minimum hypervisor related defines
is that current ARM boards firmware and loaders (U-boot for example)
start loaded operating system kernel in HYP mode to allow it take
control of virtualization (Linux/KVM for example).

Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
c6e0201443 arm/raspberrypi: ensure that RTEMS application image can be started by U-boot.
The current versions of U-boot start kernel/RTEMS application image
with instruction and data caches enabled and it sets exception
base register to new address after its self-relocation.

        ldr     r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
        mcr     p15, 0, r0, c12, c0, 0  /* Set VBAR */

Included changes in bsp_start_hook_0 restore default state to
allow RTEMS image to run after startup from newer U-boot version
on Raspberry Pi.

Clear interrupt enable registers in interrupt controller
to ensure that RTEMS starts from well defined state.

Updates #2783
2016-10-02 10:40:33 +02:00
Pavel Pisa
be5cf032c5 bsps/arm: CP15 support for flush prefetch buffer and table base control.
Updates #2782
Updates #2783
2016-10-02 10:40:33 +02:00
Sebastian Huber
75a6584a43 score: Fix C/C++ compatibility issue
Only use CPU_Per_CPU_control if it contains at least one filed.  In GNU
C empty structures have a size of zero.  In C++ structures have a
non-zero size.  In case CPU_PER_CPU_CONTROL_SIZE is defined to zero,
then this structure is not used anymore.

Close #2789.
2016-09-23 06:59:59 +02:00
Chris Johns
35edf82463 libdl: Fix cache corruption bugs.
This patch fixes a number of bugs in the cache when requests are
made to read close to the end of the file and the data is copied
from the top of the cache buffer to the bottom of the buffer. This
was compounded by attempting to read past the end of the file.

Closes #2754.
2016-08-15 15:46:39 +10:00
Chris Johns
25c5583f92 libdl: Add trace output when reading section headers. 2016-08-15 15:46:31 +10:00
Sebastian Huber
7b24946c2b bsps/powerpc: Fix shared console driver
The Termios modes are now an emum.  Do not use them in #if expressions.

Update #2762.
2016-07-19 09:44:16 +02:00
Sebastian Huber
dc0f537b27 bsps/powerpc: Fix AtliVec context switch
Properly pass the stack aligned context to _CPU_Context_switch_altivec()
since _CPU_altivec_ctxt_off defined via ppc_context.

Update #2761.
2016-07-19 08:15:01 +02:00
Sebastian Huber
c6c4fce942 bsps/powerpc: Fix AltiVec enable
There must be an isync after the mtmsr to ensure that the AltiVec is
enabled for subsequent instructions.

Close #2760.
2016-07-19 07:40:40 +02:00
Sebastian Huber
3f72dda6ee posix: Fix pthread_spin_unlock() error status
Update #2719.
2016-05-25 12:48:00 +02:00
Sebastian Huber
276dfd9f3d fat: Fix for invalid cluster sizes
A cluster size > 32KiB resulted in an infinite loop in
fat_init_volume_info() due to an integer overflow.

Update #2717.
2016-05-20 08:14:34 +02:00
Sebastian Huber
f502882ef5 posix: Fix return states of pthread_kill()
POSIX mandates that an error code is returned and not -1 plus errno.

Update #2715.
2016-05-17 13:43:55 +02:00
Sebastian Huber
94b1ba5aed posix: Fix return status of pthread_cancel()
POSIX recommends ESRCH in case no thread exists for the specified
identifier.

Update #2713.
2016-05-17 08:40:43 +02:00
Daniel Hellstrom
33de2037f6 sparc: Fix window underflow trap handler
The window underflow trap handler used %i5 which destroyed the %o5 of
the calling context.  Bug introduced by
0d3b5d4742.

Go back to the pre 0d3b5d4742 behaviour
and use the two unused instructions in the trap vector to optimize a
bit.

Close #2651.
2016-03-24 07:41:01 +01:00
Sebastian Huber
d85db176e7 Filesystem: Export most generic path eval function
Add path length parameter to
rtems_filesystem_eval_path_start_with_root_and_current() so that users
may pass paths without a '\0' termination.

Update #2558.
2016-02-02 08:00:34 +01:00
Sebastian Huber
2145853b00 score: Fix simple timecounter support
Close #2502.
2016-01-27 08:09:05 +01:00
Sebastian Huber
d4520c1900 bsps/arm: Fix broken switch statement
Close #2530.
2016-01-18 08:14:11 +01:00
Sebastian Huber
1bdf578e52 Clearly mark SMP support as experimental in 4.11 2016-01-11 08:29:08 +01:00
Sebastian Huber
cb7c6f53f7 smptests/README: Delete obsolete information 2016-01-11 07:58:09 +01:00
Sebastian Huber
9c615b7835 score: Fix watchdog insert
Under certain conditions a new watchdog was inserted with a wrong
and very large delta interval due to a wrong iterator update.

Bug was introduced by 1ccbd05291.

Close #2507.
2016-01-05 07:09:56 +01:00
Joel Sherrill
b4350d18e7 LICENSE.WEBSERVER: GoAhead server removed before 4.11 branched. Obsolete.
closes #2508.
2016-01-04 11:46:14 -06:00
Sebastian Huber
2cc001a15a score: Fix watchdog removal
Under certain conditions a new watchdog was inserted with a wrong and
very large delta interval due to an incomplete iterator update.

Bug was introduced by 1ccbd05291.

Close #2501.
2015-12-21 08:40:29 +01:00
Sebastian Huber
93b959581c doc: SMP status of RTEMS 4.11 2015-12-16 08:20:38 +01:00
Sebastian Huber
8839cf674e doc: SMP introduction 2015-12-16 08:16:15 +01:00
Chris Johns
51de51dafe Fix rtems-bsps for GNU find hosts.
Fixed as reported by Pavel:

 https://lists.rtems.org/pipermail/devel/2015-December/013189.html

Closes #2498.
2015-12-16 12:04:47 +11:00
Chris Johns
431140aef3 Display only valid BSPs, ignore other .cfg files.
Show the architecture and BSP count.

Closes #2491.
2015-12-13 23:22:53 +11:00
Pavel Pisa
2a9db262a2 bsp/tms570: ensure that linker symbol comparison to NULL is not optimized out.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-12-01 21:09:25 -05:00
Sebastian Huber
7828f1c3aa Fix _Assert() statement 2015-11-25 08:36:04 +01:00
Pavel Pisa
a6d176f25e untar: do not exit with error when created directory already exists.
The problem exists for both RTEMS untar implementations and their
variants: Untar_FromMemory(), Untar_FromFile() and rtems_tarfs_load().

If filesystem object already exists at extracted directory path
then if it is directory, creation is ignored. Attempt
to delete/unlink object and make directory is tried for other cases.

This simple approach problem reported in ticket fixes #2413.
Behavior follows GNU tar and BSD tar practice for directories
but much more work is required to achieve full semantics
of the full featured tar implementation still.
2015-11-23 10:40:06 -05:00
Premysl Houdek
f8bbbdd531 bsp/tms570: unite code duplication in pinmux and clean SCI close per review remarks.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 13:12:18 -05:00
Pavel Pisa
dec479be26 bsp/tms570: use common tms570ls3137.inc file for all board ling variants.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-11-18 10:19:01 -05:00
Premysl Houdek
85750d169e bsp/tms570: separate Flash variants to one which boots directly and one for boot loader.
The default tms570ls3137_hdk variant is for building RTEMS
application image starting directly from start of Flash.

Variant tms570ls3137_hdk_with_loader skips 256kB at start
of Flash to allow use with application loader.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-11-18 10:19:01 -05:00
Pavel Pisa
416cd88ac0 bsp/tms570: use POM only when application image does not start at address 0.
Parameters overlay module is initialized and cleared first.
It is used later to replace exception target vectors
only if that is required.

The application loader code with CPU and SDRAM setup
code has to provide well defined pattern of instructions
at addresses 0x00000000 and 0x0000001f, because only data
read accesses can be processed reliably by POM. The expected
instruction pattern can be seen in the next example

  https://github.com/hornmich/tms570ls3137-hdk-sdram/blob/master/SDRAM_SCI_configuration/source/sys_intvecs.asm

Comments with detailed description of code, background
and reasons for selected approach have been included
in TMS570 bsp startup code.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 10:19:01 -05:00
Premysl Houdek
572f5df6f9 bsp/tms570: updated reserved space for vector overlay in internal RAM 2015-11-18 10:19:01 -05:00
Premysl Houdek
08a98f757b bsp/tms570: fixed sci driver freeze when closing terminal bug
tms570_sci_interrupt_last_close: do not wait for old data transmit.

Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 10:19:01 -05:00
Premysl Houdek
e73d93247e bsp/tms570: Pinmux support and EMAC pin definition added
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-11-18 10:19:00 -05:00
Premysl Houdek
fb5d60dafb bsp/tms570: EMAC control header file corrected and EMAC interrupt vector added
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-11-18 10:19:00 -05:00
Daniel Cederman
2d7aad73ea sparc: Fix context switch on SMP
We must not load registers (e.g. PSR) from the heir context area before
the heir stopped execution.

With this patch the write to PSR is divided into two steps. We first update
the current window pointer and then we restore the status registers and
enable traps. This allows us to move the first write to PSR to be before
the write to WIM, as there is now no risk that we get an interrupt where
the CWP and WIM would be inconsistent. We only need to make sure that we
do not use any of the non-global registers or instructions that affects
CWP for three instructions after the write.

In the earlier code the non-global %o1 register was used right after the
write to PSR, which required the use of three nop:s.

Close #2472.
2015-11-17 08:59:23 +01:00
Sebastian Huber
72857659c1 score: Fix race condition on SMP
We must ensure that the Thread_Control::Wait information update is
visible to the target thread before we update its wait flags, otherwise
we may return out of date events or a wrong status.

Close #2471.
2015-11-17 07:47:48 +01:00
Sebastian Huber
0c9bf40b89 Fix interrupt epilogue for ARMv7-AR and PowerPC
Close #2470.
2015-11-17 07:47:31 +01:00
Sebastian Huber
12b5264318 libblock: Avoid NULL pointer access 2015-11-02 08:23:17 +01:00
Jan Sommer
b2d788b3f2 ada: Add missing include
Include stackimpl.h otherwise PTHREAD_MINIMUM_STACK_SIZE cannot be
evaluated.
2015-10-30 07:45:51 +01:00
Joel Sherrill
cb9bb9d13f CONFIGURE_IMFS_MEMFILE_BYTES_PER_BLOCK was undocumented and not error checked
closes #2431.
2015-10-27 07:32:41 -05:00
Sebastian Huber
ad659ff8f3 RFS: Fix resource leak
Update #2433.
2015-10-26 07:29:11 +01:00
Ben Gras
bad82027eb Fail gracefully if pax is not found
The $(PAX) variable is used unconditionally so it shouldn't be
left empty if not found at configure time. Fixes #2437.
2015-10-23 00:08:53 +02:00
Joel Sherrill
ec6f20fc80 moxiesim/configure.ac: Fix typo 2015-10-20 18:08:48 -05:00
Joel Sherrill
13e705cfcb h8sim-testsuite.tcfg: Add fsdosfsname01
closes #2432.
2015-10-20 16:49:51 -05:00
Sebastian Huber
9c96ea780f bsp/leon3: Fix Termios context usage
Only the context of the console device was used and this is wrong in
case more than one APBUART device is available.
2015-10-20 11:31:02 +02:00
Sebastian Huber
edf77328c1 rbheap: Fix rtems_rbheap_free()
Remove unused descriptor of merged free chunks from the free chain and
add them to the spare descriptors.

Update #2417.
2015-09-11 11:31:27 +02:00
Sebastian Huber
deb3f298d1 libtests/rbheap01: Simplify
Update #2417.
2015-09-11 11:29:06 +02:00
Marcos Diaz
44eb9893b5 Beaglebone: fix missing clobber in inline assembly.
flush_data_cache uses R0 directly but doesn't list it as a clobbered
register. Compiling with -O3 made this code break, since the function
that calls flush_data_cache already uses r0.

closes #2416.
2015-09-10 13:30:43 -05:00
Martin Galvan
ccebc571d4 cpukit/libmisc/dumpbuf/dumpbuf.c: Fix compilation warnings
Compiling dumpbuf.c causes the following warning to be issued:

warning: pointer targets in passing argument 1 of 'snprintf' differ in signedness [-Wpointer-sign]

This happens because line_buffer is declared as unsigned.

Closes #2411.
2015-09-03 16:09:22 -05:00
Martin Galvan
efb798e16e cpukit/libnetworking/rtems/rtems_dhcp.c: Fix compilation error
Apparently 'free' is defined as a macro which takes two arguments and calls
rtems_bsdnet_free. When fixing #2405 I added a missing 'free' but didn't notice
it was non-standard.

Closes #2410.
2015-09-03 15:43:03 -05:00
Martin Galvan
9e2197d5d7 cpukit/libmisc/dumpbuf/dumpbuf.c: Fix undefined behavior for sprintf()
I also used the 'n' versions of the string functions, #define'd magic numbers
and added a few comments.

Updates #2405.
2015-09-03 12:34:06 -05:00
Martin Galvan
631d2548fa tools/cpu/nios2/ptf.c: Fix leak of memory pointed to by new_prefix
Updates #2405.
2015-09-03 12:34:01 -05:00
Martin Galvan
c62129c5bc cpukit/libnetworking/rtems/rtems_dhcp.c: Fix leak on realloc failure for dhcp_hostname.
Closes #2405.
2015-09-03 11:27:48 -05:00
Martin Galvan
1491f6948e tools/cpu/nios2/memory.c: Fix uninitialized use of variable memory
Updates #2405.
2015-09-03 11:27:45 -05:00
Martin Galvan
d781ad5086 various .h files: Add missing C++ extern wrappers
Updates #2405.
2015-09-03 11:27:42 -05:00
Sebastian Huber
6d734bae46 arm: Replace __sync_synchronize() implementation 2015-09-01 10:00:14 +02:00
Sebastian Huber
35e0394165 arm: Use compiler memory barrier by default 2015-09-01 10:00:13 +02:00
Sebastian Huber
9ccdb1dfde rbtree: Delete rtems_rbtree_find_control()
This function is hard to support in alternative implementations.  It has
no internal use case.
2015-09-01 09:06:18 +02:00
Nick Withers
7a0df6b947 Respect 2^32 - 1 B NFSv2 maximum file size
closes #2384
2015-08-06 10:49:30 -04:00
Joel Sherrill
c9318aa8d1 user/c_user.texi: Correct info index entry
closes #2380.
2015-08-03 09:35:47 -07:00
Joel Sherrill
652888c22d ada-tests/support/init.c: Fix compile errors and warnings
closes #2379.
2015-08-02 08:32:45 -07:00
Jan Sommer
1cf91e0b0a Add __synch_synchronize function for arm
Fixes link failure when linking Ada programs on the raspberry pi
2015-08-01 10:20:18 -07:00
Nick Withers
dc475657bf ampolish3: Use env to find perl more reliably
Fixes breakage on at least FreeBSD.

closes #2379.
2015-08-01 10:08:55 -07:00
Michael Davidsaver
8da63adc4b tftpDriver: close() false error
closes #2376.
2015-07-29 11:00:29 -05:00
Sebastian Huber
3984a0e171 m68k: Include proper header file 2015-07-24 10:48:28 +02:00
Sebastian Huber
2f43241a2a arm: Include proper header file 2015-07-23 20:35:16 +02:00
Sebastian Huber
0ad8a33650 i2c: Fix return status of i2c dev read/write 2015-07-23 09:12:42 +02:00
Sebastian Huber
f9a597950b doc: Add SMP section to CPU Arch Supplement 2015-07-23 09:12:35 +02:00
Sebastian Huber
8b14cbd996 bsps/arm: Update due to API changes 2015-07-21 10:01:34 +02:00
Premysl Houdek
49c1d25dc2 bsp/tms570 Use bitfields instead of hard-coded values
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-07-20 21:06:55 +10:00
Premysl Houdek
9a84f98372 bsp/tms570: skipped 32bit field definitions and corrected single bit fields
there is no need to define access macros for field covering
whole registers. In addition, BSP_FLD32 does not work right
for field 32bit length.

Signed-off-by: Premysl Houdek <kom541000@gmail.com>
2015-07-20 21:06:42 +10:00
18950 changed files with 1120544 additions and 2807566 deletions

11
.gitignore vendored
View File

@@ -1,6 +1,5 @@
/build
doc
/*.ini
.lock*
*.pyc
.waf*
aclocal.m4
autom4te.cache
configure
config.h.in
Makefile.in

View File

@@ -1,261 +0,0 @@
# Please keep users, directories and files sorted alphabetically.
# Directories first
#
# If there is more than 1 user in a section it must be promoted to a group in
# /approvers
[General Maintainer] @approvers/general/maintainer
*
[Documentation] @approvers/docs
*/README
*.md
*.rst
*.txt
# CPUKit
########
[CPUKit libdebugger] @approvers/cpukit/libdebugger
/cpukit/libdebugger
[CPUKit libdl] @approvers/cpukit/libdl
/cpukit/libdl
[CPUKit libdrvmgr] @approvers/cpukit/libdrvmgr
/cpukit/libdrvmgr
[CPUKit libgnat] @joel
/cpukit/libgnat
[CPUKit librtemscxx] @approvers/cpukit/librtemscxx
/cpukit/librtemscxx
[CPUKit libstdthreads] @approvers/cpukit/libstdthreads
/cpukit/libstdthreads
# Architectures
###############
[Arch AArch64] @approvers/arch/aarch64
/bsps/aarch64/
/cpukit/score/cpu/aarch64/
/spec/build/bsps/aarch64/
/cpukit/libdebugger/rtems-debugger-aarch64.v
/cpukit/libdl/rtl-mdreloc-aarch64.c
/spec/build/cpukit/*aarch64.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch ARM] @approvers/arch/arm
/bsps/arm/
/bsps/include/arm/
/bsps/include/xil/arm/
/bsps/shared/freebsd/sys/arm/
/bsps/shared/xil/arm/
/cpukit/score/cpu/arm/
/spec/build/bsps/arm/
/cpukit/libdebugger/rtems-debugger-arm.c
/cpukit/libdl/*arm*
/spec/build/cpukit/*arm.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Blackfin] @approvers/arch/bfin
/bsps/bfin/
/cpukit/score/cpu/bfin/
/spec/build/bsps/bfin/
/cpukit/libdl/rtl-mdreloc-bfin.c
/spec/build/cpukit/cpubfin.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch i386] @approvers/arch/i386
/bsps/i386/
/cpukit/score/cpu/i386/
/spec/build/bsps/i386/
/cpukit/libdebugger/rtems-debugger-i386.c
/cpukit/libdl/rtl-mdreloc-i386.c
/spec/build/cpukit/*i386*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch LatticeMico32] @approvers/arch/lm32
/bsps/lm32/
/cpukit/score/cpu/lm32/
/spec/build/bsps/lm32/
/cpukit/libdl/rtl-mdreloc-lm32.c
/spec/build/cpukit/cpulm32.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Motorola 68000] @approvers/arch/m68k
/bsps/m68k/
/cpukit/score/cpu/m68k/
/spec/build/bsps/m68k/
/cpukit/libdl/rtl-mdreloc-m68k.c
/spec/build/cpukit/*m68k*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch MicroBlaze] @approvers/arch/microblaze
/bsps/include/xil/microblaze/
/bsps/microblaze/
/cpukit/score/cpu/microblaze/
/spec/build/bsps/microblaze/
/cpukit/libdebugger/rtems-debugger-microblaze.c
/cpukit/libdl/rtl-mdreloc-microblaze.c
/spec/build/cpukit/*microblaze*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch MIPS] @approvers/arch/mips
/bsps/mips/
/cpukit/score/cpu/mips/
/spec/build/bsps/mips/
/cpukit/libdl/rtl-mdreloc-mips.c
/spec/build/cpukit/*mips.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Moxie] @approvers/arch/moxie
/bsps/moxie/
/cpukit/score/cpu/moxie/
/spec/build/bsps/moxie/
/cpukit/libdl/rtl-mdreloc-moxie.c
/spec/build/cpukit/*moxie.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch Nios II] @approvers/arch/nios2
/bsps/nios2/
/cpukit/score/cpu/nios2/
/spec/build/bsps/nios2/
/spec/build/cpukit/*nios2.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch OpenRISC 1000] @approvers/arch/or1k
/bsps/or1k/
/cpukit/score/cpu/or1k/
/spec/build/bsps/or1k/
/spec/build/cpukit/*or1k.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch PowerPC] @approvers/arch/powerpc
/bsps/powerpc/
/cpukit/score/cpu/powerpc/
/spec/build/bsps/powerpc/
/cpukit/libdl/rtl-mdreloc-powerpc.c
/spec/build/cpukit/*powerpc.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch RISC-V] @approvers/arch/risc-v
/bsps/riscv
/cpukit/score/cpu/riscv
/spec/build/bsps/riscv
/cpukit/libdl/rtl-mdreloc-riscv.c
/spec/build/cpukit/*riscv.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch SuperH] @approvers/arch/superh
/bsps/sh/
/cpukit/score/cpu/sh/
/spec/build/bsps/sh/
/spec/build/cpukit/cpush.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch SPARC] @approvers/arch/sparc
/bsps/sparc/
/cpukit/score/cpu/sparc/
/spec/build/bsps/sparc/
/spec/build/cpukit/cpusparc.yml
/spec/build/cpukit/objdlsparc.yml
/spec/build/testsuites/validation/bsps/*-sparc-*
/testsuites/validation/bsps/*-sparc-*
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch SPARC64] @approvers/arch/sparc64
/bsps/sparc64/
/cpukit/score/cpu/sparc64/
/spec/build/bsps/sparc64/
/spec/build/cpukit/*sparc64.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch V850] @approvers/arch/v850
/bsps/v850/
/cpukit/score/cpu/v850/
/spec/build/bsps/v850/
/cpukit/libdl/rtl-mdreloc-v850.c
/spec/build/cpukit/*v850.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs
[Arch X86_64] @approvers/arch/x86_64
/bsps/x86_64/
/cpukit/score/cpu/x86_64/
/spec/build/bsps/x86_64/
/spec/build/cpukit/*x8664.yml
*/README @approvers/docs
*.md @approvers/docs
*.rst @approvers/docs
*.txt @approvers/docs

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#
# $RTEMS$
#
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Library General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:
a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.
b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.
c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.
Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.
In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.
3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:
a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,
b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,
c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)
The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
Appendix: How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) 19yy <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) 19yy name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Library General
Public License instead of this License.

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Building RTEMS
==============
See the documentation referred to in the README.

20
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LICENSE INFORMATION
RTEMS is free software; you can redistribute it and/or modify it under
terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version. RTEMS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details. You should have received
a copy of the GNU General Public License along with RTEMS; see
file COPYING. If not, write to the Free Software Foundation, 675
Mass Ave, Cambridge, MA 02139, USA.
As a special exception, including RTEMS header files in a file,
instantiating RTEMS generics or templates, or linking other files
with RTEMS objects to produce an executable application, does not
by itself cause the resulting executable application to be covered
by the GNU General Public License. This exception does not
however invalidate any other reasons why the executable file might be
covered by the GNU Public License.

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The files in this directory and elsewhere which refer to this LICENCE
file are part of JFFS2, the Journalling Flash File System v2.
Copyright © 2001-2007 Red Hat, Inc. and others
JFFS2 is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 or (at your option) any later
version.
JFFS2 is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License along
with JFFS2; if not, write to the Free Software Foundation, Inc.,
59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
As a special exception, if other files instantiate templates or use
macros or inline functions from these files, or you compile these
files and link them with other works to produce a work based on these
files, these files do not by themselves cause the resulting work to be
covered by the GNU General Public License. However the source code for
these files must still be made available in accordance with section (3)
of the GNU General Public License.
This exception does not invalidate any other reasons why a work based on
this file might be covered by the GNU General Public License.

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The RTEMS TCP/IP stack is a port of the FreeBSD TCP/IP stack. The following
copyright and licensing information applies to this code.
This code is found under the c/src/libnetworking directory but does not
constitute the entire contents of that subdirectory.
=============================================================================
Copyright (c) 1980, 1983, 1988, 1993
The Regents of the University of California. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. All advertising materials mentioning features or use of this software
must display the following acknowledgment:
This product includes software developed by the University of
California, Berkeley and its contributors.
4. Neither the name of the University nor the names of its contributors
may be used to endorse or promote products derived from this software
without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGE.
-
Portions Copyright (c) 1993 by Digital Equipment Corporation.
Permission to use, copy, modify, and distribute this software for any
purpose with or without fee is hereby granted, provided that the above
copyright notice and this permission notice appear in all copies, and that
the name of Digital Equipment Corporation not be used in advertising or
publicity pertaining to distribution of the document or software without
specific, written prior permission.
THE SOFTWARE IS PROVIDED "AS IS" AND DIGITAL EQUIPMENT CORP. DISCLAIMS ALL
WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL DIGITAL EQUIPMENT
CORPORATION BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS
ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
SOFTWARE.
=============================================================================

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The RTEMS RPC/XDR support is a port of the freely distributed
Sun Microsystems implementation. The following copyright and
licensing information applies to this code.
This code is in the c/src/librpc directory.
=============================================================================
Copyright (C) 1984, Sun Microsystems, Inc.
Sun RPC is a product of Sun Microsystems, Inc. and is provided for
unrestricted use provided that this legend is included on all tape
media and as a part of the software program in whole or part. Users
may copy or modify Sun RPC without charge, but are not authorized
to license or distribute it to anyone else except as part of a product or
program developed by the user.
SUN RPC IS PROVIDED AS IS WITH NO WARRANTIES OF ANY KIND INCLUDING THE
WARRANTIES OF DESIGN, MERCHANTIBILITY AND FITNESS FOR A PARTICULAR
PURPOSE, OR ARISING FROM A COURSE OF DEALING, USAGE OR TRADE PRACTICE.
Sun RPC is provided with no support and without any obligation on the
part of Sun Microsystems, Inc. to assist in its use, correction,
modification or enhancement.
SUN MICROSYSTEMS, INC. SHALL HAVE NO LIABILITY WITH RESPECT TO THE
INFRINGEMENT OF COPYRIGHTS, TRADE SECRETS OR ANY PATENTS BY SUN RPC
OR ANY PART THEREOF.
In no event will Sun Microsystems, Inc. be liable for any lost revenue
or profits or other special, indirect and consequential damages, even if
Sun has been advised of the possibility of such damages.
Sun Microsystems, Inc.
2550 Garcia Avenue
Mountain View, California 94043
=============================================================================

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Maintainers
===========
This file contains information about people who are permitted to make
changes to RTEMS and its associated components and add-ons. Please do
not contact the people in this file directly to report problems with RTEMS.
For general information about RTEMS, please visit: http://www.rtems.org
To report problems in RTEMS, please visit: http://www.rtems.org/bugs.html
RTEMS is maintained by collection of volunteers. RTEMS is a very
broad and diverse project which requires expertise in many areas.
This breadth of knowledge exceeds the capabilities of any
single person. Each volunteer has areas of expertise where they
are more comfortable but each is capable of making technical
decisions across the entirety of RTEMS.
Blanket Write Privileges are granted to experienced RTEMS developers
who can be trusted to distinguish between changes which require
others to review, require a problem report, or can be safely committed
with limited review.
Write After Approval is granted to experienced but also trusted
RTEMS developers. These developers may be less familiar with
the breadth of RTEMS. Developers with write after approval need
to submit their patches for review. Once the patches have been
approved by a developer with Blanket Write Privileges, the patches
may be checked in.
Localized Write Permission is for developers who have primary
responsibility for a port and all associated BSPs, a BSP, or other
specific aspects of RTEMS. These folks are allowed to make changes to
areas they maintain and related documentation, web pages, and test cases
without approval from anyone else, and approve other people's changes
in those areas. They must get approval for changes elsewhere in RTEMS.
Blanket Write Privileges
========================
Jennifer Averett jennifer.averett@OARcorp.com
Thomas Doefler Thomas.Doerfler@embedded-brains.de
Sebastian Huber sebastian.huber@embedded-brains.de
Chris Johns chrisj@rtems.org
Joel Sherrill joel.sherrill@OARcorp.com
Gedare Bloom gedare@rtems.org
Write After Approval
====================
Daniel Hellstrom daniel@gaisler.com
Ben Gras beng@rtems.org
Localized Write Permission
==========================
sparc Daniel Hellstrom (daniel@gaisler.com)
beagle Ben Gras (beng@rtems.org)

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#
# top level directory for RTEMS build tree
#
ACLOCAL_AMFLAGS = -I aclocal
SUBDIRS = $(build_SUBDIRS) $(host_SUBDIRS) $(target_SUBDIRS)
DIST_SUBDIRS = $(SUBDIRS)
noinst_SCRIPTS = bootstrap
EXTRA_DIST = README.configure SUPPORT VERSION LICENSE $(noinst_SCRIPTS)
EXTRA_DIST += config-ml.in
EXTRA_DIST += ampolish3
dist-hook:
@files=`(cd $(srcdir); find cpukit c testsuites tools \
-name configure.ac -print | sed 's,/configure.ac,,' | sort)`; \
for i in $$files; do \
if test -f $(distdir)/$$i/configure.ac; then : ; \
else \
d=`dirname $(distdir)/$$i`; \
$(MKDIR_P) $$d;\
echo "cp -pR $(srcdir)/$$i $(distdir)/$$i"; \
cp -pR $(srcdir)/$$i $(distdir)/$$i; \
fi; \
done
rm -rf `find $(distdir) -name 'autom4te*'`
rm -rf `find $(distdir) -name CVS`
rm -f `find $(distdir) \( -name .cvsignore \
-o -name config.status \
-o -name config.log \)`
rm -f `find $(distdir) \( -name '*.bak' \
-o -name 'changes' -o -name 'diff' -o -name 'tmp' -o -name 'log' \
-o -name '*~' -o -name '.*~' -o -name '.#*' \)`
find $(distdir) -name '*.in' -print | while read a; do \
f=`echo $$a | sed 's,\.in$$,,'`; \
if test -f $$f; then echo "rm $$f"; rm $$f; fi; done
rtems_makedir = $(prefix)/make
dist_rtems_make_DATA =
dist_rtems_make_DATA += make/main.cfg
dist_rtems_make_DATA += make/leaf.cfg
rtems_make_Templatesdir = $(pkgdatadir)/make/Templates
dist_rtems_make_Templates_DATA =
dist_rtems_make_Templates_DATA += make/Templates/Makefile.dir
dist_rtems_make_Templates_DATA += make/Templates/Makefile.leaf
dist_rtems_make_Templates_DATA += make/Templates/Makefile.lib
rtems_make_customdir = $(rtems_makedir)/custom
dist_rtems_make_custom_DATA = make/custom/default.cfg
include $(top_srcdir)/automake/subdirs.am
include $(top_srcdir)/automake/host.am

153
Makefile.maint Normal file
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@@ -0,0 +1,153 @@
#
# Maintainer Makefile
#
# WARNING:
# THIS IS EXPERIMENTAL - DO NOT USE (YET) !
# * This Makefile is only useful to RTEMS maintainers
# * You must have write access to RTEMS CVS
# * Running this Makefile modifies RTEMS CVS
# * Watch out for warning and error messages - Do NOT IGNORE them!
# MAINTAINER notes:
# Cutting a new release:
# 1. Perform a non-anonymous cvs checkout of the BRANCH
# you want to cut a release tarball from
# 2. Run "make -f Makefile.maint new-revision"
# (rsp. "make -f Makefile.maint new-minor").
# 3. Run "make -f Makefile.maint commit"
# 4. Run "make -f Makefile.maint tag"
# 5. Run "make -f Makefile.maint tarball"
# -----------------
# SECURITY: Append a string to tag to avoid accidentially screwing up cvs-tags
# For "hot runs" you will want to use "make -f Makefile.maint TAG_SUFFIX= <command>"
TAG_SUFFIX = -test1
rtems_version := $(shell cat VERSION | sed -n '/.* Version /{s/^.*Version[ ]*\([0-9\.]\+\)/\1/p};')
rtems_tag := $(shell echo "rtems-$(rtems_version)" | tr . -)
rtems_api := 4.10
PATH := /opt/rtems-$(rtems_api)/bin:$(PATH)
# -----------------
# Cleanup check out and cvs-tag the files inside
tag:
cvs -q -z9 up -dP
./bootstrap -p >/dev/null
cvs -q tag -c $(rtems_tag)$(TAG_SUFFIX)
# -----------------
# Different stages of cvs-exporting
rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX):
rm -rf rtems-$(rtems_version)
@cvs -q -z9 export -d rtems-$(rtems_version) -r $(rtems_tag)$(TAG_SUFFIX) rtems
@if ! test -f rtems-$(rtems_version)/VERSION; then \
echo "ERROR export failed"; \
echo " Did you run 'make -f Makefile.maint tag' ?"; exit 1; fi
echo "$(rtems_tag)$(TAG_SUFFIX)" > rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX)
rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2: rtems-$(rtems_version)/stamp.autofiles \
rtems-$(rtems_version)/excludes \
rtems-$(rtems_version)/TOOL_VERSIONS
tar -cj -X rtems-$(rtems_version)/excludes \
-f rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2 rtems-$(rtems_version)
## Touching the top pages in the various manuals results in the date
## on their title page matching the release date.
rtems-$(rtems_version)/stamp.cleanup: rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX)
find rtems-$(rtems_version) -name .cvsignore -exec rm -f {} \;
find rtems-$(rtems_version) -name preinstall.am -exec touch {} \;
rm -rf rtems-$(rtems_version)/contrib
touch rtems-$(rtems_version)/stamp.cleanup
rtems-$(rtems_version)/stamp.autofiles: rtems-$(rtems_version)/stamp.cleanup
cd rtems-$(rtems_version) && ./bootstrap -r
touch rtems-$(rtems_version)/stamp.autofiles
rtems-$(rtems_version)/excludes: Makefile.maint
@echo "Generating $@"
@echo "excludes" > $@
@echo "stamp.*" >> $@
@echo "autom4te.cache" >> $@
@echo "Makefile.maint" >> $@
tarball: rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2
rtems-$(rtems_version)/TOOL_VERSIONS: Makefile.maint
( \
date ; \
echo ; \
echo "This file contains configuration information on the " ; \
echo "primary computer used to test and make the $(rtems_version)" ; \
echo "version of RTEMS" ; \
echo ; \
echo "OS Version: " `head -1 /etc/issue` ; \
echo ; \
echo "The following RTEMS RPMs were installed on the machine" ; \
echo "where this release was made:" ; \
echo ; \
rpm -qa 'rtems-$(rtems_api)-*' | sort | sed -e 's/^/ /' ; \
echo \
) > $@
# -----------------
# Create a new minor release
# increments the 2nd digit of the version number
# set the 3rd digit of the version number to 0
# Example: 4.6.99.4 -> 4.7.0
new-minor:
@v=$$(echo $(rtems_version) | sed 's,^\([0-9]\+\).*,\1,'); \
r=$$(echo $(rtems_version) | sed 's,^[0-9]\+\.\([0-9]\+\).*,\1,'); \
r=$$(($$r + 1)); version="$$v.$$r.0"; \
echo "New minor release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
# Create a new revision release
# increments the last digit of the version number
# Examples: 4.6.99.4 -> 4.6.99.5
# 4.7.0 -> 4.7.1
new-revision:
@m=$$(echo $(rtems_version) | sed 's,^\(.*\)\.[0-9]\+,\1,'); \
n=$$(echo $(rtems_version) | sed 's,^.*\.\([0-9]\+\),\1,'); \
n=$$(($$n + 1)); version="$$m.$$n";\
echo "New revision release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
# -----------------
# Create a new branch
# increments the 2nd digit of the version number
# set the 3rd digit of the version number to 99
# set the 4rd digit of the version number to 0
# Example: 4.6.34.4 -> 4.7.99.0
new-branch:
v=$$(echo $(rtems_version) | sed 's,^\([0-9]\+\).*,\1,'); \
r=$$(echo $(rtems_version) | sed 's,^[0-9]\+\.\([0-9]\+\).*,\1,'); \
r=$$(($$r + 1)); version="$$v.$$r.99.0"; \
api="$$v.$$(($$r + 1))"; \
echo "New branch release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
-e "s|\[_RTEMS_API\],\[.*\]|\[_RTEMS_API\],\[$$api\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
VERSION_FILES += aclocal/version.m4
VERSION_FILES += cpukit/aclocal/version.m4
VERSION_FILES += c/src/aclocal/version.m4
VERSION_FILES += testsuites/aclocal/version.m4
CVS_RUN := $(shell if [ -n "$(TAG_SUFFIX)" ]; then echo "cvs -n"; else echo "cvs"; fi)
commit:
$(CVS_RUN) commit -m "Upgrade to $(rtems_version)" \
$(VERSION_FILES) VERSION
.PHONY: commit new-minor new-revision new-branch tag tarball

24
README Normal file
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@@ -0,0 +1,24 @@
This is the Real-Time Executive for Multiprocessing Systems (RTEMS).
The version number for this software is indicated in the VERSION file.
See the documentation manuals in doc/ with daily builds available online at
http://rtems.org/onlinedocs/doc-current/share/rtems/html/ and released builds
at http://www.rtems.org/onlinedocs/releases/ for information on building,
installing, and using RTEMS. The INSTALL file tells you to come back here.
See the RTEMS Wiki at http://devel.rtems.org for community knowledge and
tutorials.
RTEMS Doxygen available at http://www.rtems.org/onlinedocs/doxygen/cpukit/html
The RTEMS Project maintains mailing lists which are used for most
discussions:
* For general-purpose questions related to using RTEMS, use the
rtems-users ml: https://lists.rtems.org/mailman/listinfo/users
* For questions and discussion related to development of RTEMS, use the
rtems-devel ml: https://lists.rtems.org/mailman/listinfo/devel
See https://devel.rtems.org/ to view existing or file a new issue
report ticket.

View File

@@ -1,46 +0,0 @@
Real-Time Executive for Multiprocessing Systems
===============================================
RTEMS is a real-time executive (kernel) which provides a high performance
environment for embedded applications with the following features:
* Standards based user interfaces.
* Multitasking capabilities.
* Homogeneous and heterogeneous multiprocessor systems.
* Event-driven, priority-based, preemptive scheduling.
* Optional rate monotonic scheduling.
* Intertask communication and synchronisation.
* Priority inheritance.
* Responsive interrupt management.
* Dynamic memory allocation.
* High level of user configurability.
* Open source with a friendly user license.
Project git repositories are located at:
* https://gitlab.rtems.org/rtems/
Online documentation is available at:
* https://docs.rtems.org/
RTEMS Doxygen for CPUKit:
* https://docs.rtems.org/doxygen/branches/master/
RTEMS POSIX 1003.1 Compliance Guide:
* https://docs.rtems.org/branches/master/posix-compliance/
RTEMS Mailing Lists for general purpose use the users list and for developers
use the devel list.
* https://lists.rtems.org/mailman/listinfo
The version number for this software is indicated in the VERSION file.

399
acinclude.m4 Normal file
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## All directories belong in one of 3 categories.
## ${HOST_CONFIGDIRS_LIST} is directories we build using the host tools.
## ${TARGET_CONFIGDIRS_LIST} is directories we build using the target tools.
## ${BUILD_CONFIGDIRS_LIST} is directories we build using the build tools
AC_PREREQ(2.60)
dnl RTEMS_ARG_VAR(VAR,HELP-STRING)
dnl An internal macros to have help strings pretty
dnl printed with configure --help, without letting autoconf spoil config subdir
dnl environments by trying to propagate them
dnl Stripped down version of autoconf-2.52's AC_ARG_VAR.
AC_DEFUN([_RTEMS_ARG_VAR],
[
m4_expand_once([m4_divert_once([HELP_VAR],
[AS_HELP_STRING([$1], [$2], [ ])])],
[$0($1)])dnl
])
AC_DEFUN([_RTEMS_SUBST_IFNOT],
[AS_IF([`echo " [$]$1 " | grep " $2 " > /dev/null`],
[],
[AC_SUBST([$1],["[$]$1 $2"])])
])
AC_DEFUN([_RTEMS_TOOLS],
[
m4_ifdef([_RTEMS_$2_CONFIGDIRS_LIST],
[
_RTEMS_ARG_VAR([CC_FOR_$2],
[c-compiler to be used for $1 subdirs (default: auto-detected)])
_RTEMS_ARG_VAR([CFLAGS_FOR_$2],
[c-flags to be used for $1 subdirs (default: provided by autoconf)])
_RTEMS_ARG_VAR([CXX_FOR_$2],
[c++-compiler to be used for $1 subdirs (default: auto-detected)])
_RTEMS_ARG_VAR([CXXFLAGS_FOR_$2],
[c++-flags to be used for $1 subdirs (default: provided by autoconf)])
])
])
AC_DEFUN([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS],
[
AC_CONFIG_COMMANDS_PRE([
if test -z "${build_alias}"; then
# build_alias is empty
if test -z "${host_alias}"; then
# host_alias is empty
if test -z "${target_alias}"; then
: target_alias is empty
else
: target_alias is not empty
fi
else
# host_alias is not empty
if test -z "${target_alias}"; then
: target_alias is empty
target_alias="${host_alias}"
else
: target_alias is not empty
fi
fi
else
# build_alias is not empty
if test -z "${host_alias}"; then
# host_alias is empty
if test -z "${target_alias}"; then
: target_alias is empty
else
: target_alias is not empty
fi
else
# host_alias is not empty
if test -z "${target_alias}"; then
: target_alias is empty
target_alias="${host_alias}"
else
: target_alias is not empty
fi
fi
fi
_RTEMS_BUILD_CONFIG_PREPARE
_RTEMS_HOST_CONFIG_PREPARE
_RTEMS_TARGET_CONFIG_PREPARE
build_subdir="."
build_SUBDIRS="${build_configdirs}"
build_configdirs="${build_configdirs}"
AS_IF([test $build != $host],
[dnl
host_subdir="${host_alias-$host}"
host_SUBDIRS=`echo "${host_configdirs}" | \
sed -e "s%\([[^ ]][[^ ]]*\)%$host_subdir/\1%g"`
host_configdirs="${host_configdirs}"
],[dnl
host_SUBDIRS="${host_configdirs}"
host_configdirs="${host_configdirs}"
])
AS_IF([test $build != $target],
[dnl
target_subdir="${target_alias-$target}"
target_SUBDIRS=`echo "${target_configdirs}" | \
sed -e "s%\([[^ ]][[^ ]]*\)%$target_subdir/\1%g"`
target_configdirs="${target_configdirs}"
],[dnl
target_SUBDIRS="${target_configdirs}"
target_configdirs="${target_configdirs}"
])
AC_SUBST(host_SUBDIRS)
AC_SUBST(target_SUBDIRS)
AC_SUBST(build_SUBDIRS)
])
AC_CONFIG_COMMANDS_POST([
_RTEMS_OUTPUT_SUBDIRS([build],[BUILD])
_RTEMS_OUTPUT_SUBDIRS([host],[HOST])
_RTEMS_OUTPUT_SUBDIRS([target],[TARGET])
])
])
dnl _RTEMS_SRCPATHS(BUILD-DIR-NAME)
dnl ----------------------------
dnl Inputs:
dnl - BUILD-DIR-NAME is `top-build -> build' and `top-src -> src'
dnl - `$srcdir' is `top-build -> top-src'
dnl
dnl Outputs:
dnl - `ac_builddir' is `.', for symmetry only.
dnl - `ac_top_builddir' is `build -> top_build'.
dnl If not empty, has a trailing slash.
dnl - `ac_srcdir' is `build -> src'.
dnl - `ac_top_srcdir' is `build -> top-src'.
dnl
dnl and `ac_buildpath' etc., the absolute paths.
m4_define([_RTEMS_SRCPATHS],
[
m4_if([$2],,
[dstdir=$1],
[case "$2" in
"." | "" ) # No subdir was given
dstdir=$1;;
* ) # A subdir was given
dstdir=$2/$1;;
esac])
ac_builddir=.
AS_IF([test $dstdir != .],
[ # Strip off leading ./
ac_builddir_suffix=/`echo $dstdir | sed 's,^\.[[\\/]],,'`
ac_srcdir_suffix=/`echo $1 | sed 's,^\.[[\\/]],,'`
# A "../" for each directory in $ac_dir_suffix.
ac_top_builddir=`echo "$ac_builddir_suffix" | sed 's,/[[^\\/]]*,../,g'`
],[
ac_dir_suffix= ac_top_builddir=
])
case $srcdir in
.) # No --srcdir option. We are building in place.
ac_srcdir=.
if test -z "$ac_top_builddir"; then
ac_top_srcdir=.
else
ac_top_srcdir=`echo $ac_top_builddir | sed 's,/$,,'`
fi ;;
[[\\/]]* | ?:[[\\/]]* ) # Absolute path.
ac_srcdir=$srcdir$ac_srcdir_suffix;
ac_top_srcdir=$srcdir;
;;
*) # Relative path.
ac_srcdir=$ac_top_builddir$srcdir$ac_srcdir_suffix;
ac_top_srcdir=$ac_top_builddir$srcdir;
;;
esac
dnl Don't blindly perform a `cd $1/$ac_foo && pwd` since $ac_foo can be
dnl absolute.
ac_buildpath=`cd $dstdir && cd $ac_builddir && pwd`
ac_top_buildpath=`cd $dstdir && cd $ac_top_builddir && pwd`
ac_srcpath=`cd $dstdir && cd $ac_srcdir && pwd`
ac_top_srcpath=`cd $dstdir && cd $ac_top_srcdir && pwd`
])# _AC_SRCPATHS
dnl _RTEMS_OUTPUT_SUBDIRS([host|target|build],[HOST|TARGET|BUILD])
AC_DEFUN([_RTEMS_OUTPUT_SUBDIRS],[
m4_ifdef([_RTEMS_$2_CONFIGDIRS_LIST],
[
if test "$no_recursion" != yes; then
if test -n "${$1_SUBDIRS}"; then
ac_sub_configure_args="[$]$1args"
# Always prepend --prefix to ensure using the same prefix
# in subdir configurations.
ac_sub_configure_args="'--prefix=$prefix' $ac_sub_configure_args"
# make sure that $1_subdir is not empty
test -n "$$1_subdir" || $1_subdir="."
case "$$1_subdir" in
"." ) ;;
* )
ac_sub_configure_args="$ac_sub_configure_args '--with-target-subdir=$$1_subdir'"
ac_sub_configure_args="$ac_sub_configure_args '--exec-prefix=${prefix}/$$1_subdir'"
ac_sub_configure_args="$ac_sub_configure_args '--includedir=${prefix}/$$1_subdir/include'"
;;
esac
ac_popdir=`pwd`
for ac_dir in : $$1_configdirs; do test "x$ac_dir" = x: && continue
# Do not complain, so a configure script can configure whichever
# parts of a large source tree are present.
test -d $srcdir/$ac_dir || continue
AC_MSG_NOTICE([configuring in $$1_subdir/$ac_dir])
AS_MKDIR_P(["$$1_subdir/$ac_dir"])
_RTEMS_SRCPATHS(["$ac_dir"],["$$1_subdir"])
cd $$1_subdir/$ac_dir
# Check for guested configure; otherwise get Cygnus style configure.
if test -f $ac_srcdir/configure.gnu; then
ac_sub_configure="$SHELL '$ac_srcdir/configure.gnu'"
elif test -f $ac_srcdir/configure; then
ac_sub_configure="$SHELL '$ac_srcdir/configure'"
elif test -f $ac_srcdir/configure.in; then
ac_sub_configure=$ac_configure
else
AC_MSG_WARN([no configuration information is in $ac_dir])
ac_sub_configure=
fi
# The recursion is here.
if test -n "$ac_sub_configure"; then
# Make the cache file name correct relative to the subdirectory.
case $cache_file in
[[\\/]]* | ?:[[\\/]]* ) ac_sub_cache_file=$cache_file ;;
*) # Relative path.
ac_sub_cache_file=$ac_top_builddir$cache_file ;;
esac
ac_sub_configure_vars=
ac_sub_configure_vars="$ac_sub_configure_vars '--cache-file=$ac_sub_cache_file'"
ac_sub_configure_vars="$ac_sub_configure_vars '--srcdir=$ac_srcdir'"
test -n "[$]CC_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CC=[$]CC_FOR_$2'"
test -n "[$]CXX_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CXX=[$]CXX_FOR_$2'"
test -n "[$]CFLAGS_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CFLAGS=[$]CFLAGS_FOR_$2'"
test -n "[$]CXXFLAGS_FOR_$2" && \
ac_sub_configure_vars="$ac_sub_configure_vars 'CXXFLAGS=[$]CXXFLAGS_FOR_$2'"
# The eval makes quoting arguments work.
AC_MSG_NOTICE([running $ac_sub_configure $ac_sub_configure_args $ac_sub_configure_vars])
eval $ac_sub_configure $ac_sub_configure_args $ac_sub_configure_vars ||
AC_MSG_ERROR([$ac_sub_configure failed for $ac_dir])
fi
cd "$ac_popdir"
done
fi
fi
])
])
AC_DEFUN([_RTEMS_CONFIGURE_ARGS_PRUNE],
[
$1_prune()
{
$1=
for ac_arg
do
if test -n "$ac_prev"; then
ac_prev=
continue
fi
case $ac_arg in
-cache-file | --cache-file | --cache-fil | --cache-fi \
| --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
ac_prev=cache_file ;;
-cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
| --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* \
| --c=*)
;;
--config-cache | -C)
;;
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
ac_prev=srcdir ;;
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
;;
-host* | --host* );;
-host | --host )
ac_prev=host_alias;;
-target* | --target* );;
-target | --target )
ac_prev=target_alias;;
-build* | --build* );;
-build | --build )
ac_prev=build_alias;;
-prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
ac_prev=prefix ;;
-prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
;;
*_alias=* );;
m4_if([$2],,,[$2])
*) $1="$$1 '$ac_arg'" ;;
esac
done
export $1
}
])
## PUBLIC: RTEMS_BUILD_CONFIG_SUBDIRS(build_subdir)
# subdirs to be built for the build environment
AC_DEFUN([RTEMS_BUILD_CONFIG_SUBDIRS],[
m4_append([_RTEMS_BUILD_CONFIGDIRS_LIST],[ $1])
dnl Always append to build_configdirs
AC_SUBST(build_configdirs,"$build_configdirs $1")
m4_divert_text([DEFAULTS],
[ac_subdirs_all="$ac_subdirs_all m4_normalize([$1])"])
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
AC_DEFUN([_RTEMS_BUILD_CONFIG_PREPARE],[
## # Record the configure arguments in Makefile.
m4_ifdef([_RTEMS_BUILD_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([build],[BUILD])])
m4_expand_once([_RTEMS_CONFIGURE_ARGS_PRUNE([buildargs])])
eval buildargs_prune $ac_configure_args
buildargs="'--host=${build_alias-$build}' '--build=${build_alias-$build}' ${buildargs}"
buildargs="${buildargs} '--target=${target_alias-$target}'"
],[])
AC_SUBST(buildargs)
AC_SUBST(build_subdir)
])
## PUBLIC: RTEMS_HOST_CONFIG_SUBDIRS(host_subdir)
# subdirs to be build for the host environment
AC_DEFUN([RTEMS_HOST_CONFIG_SUBDIRS],[
m4_append([_RTEMS_HOST_CONFIGDIRS_LIST],[ $1])dnl
_RTEMS_SUBST_IFNOT([host_configdirs],[$1])
m4_divert_text([DEFAULTS],
[ac_subdirs_all="$ac_subdirs_all m4_normalize([$1])"])
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
AC_DEFUN([_RTEMS_HOST_CONFIG_PREPARE],[
m4_ifdef([_RTEMS_HOST_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([host],[HOST])])
m4_expand_once([_RTEMS_CONFIGURE_ARGS_PRUNE([hostargs])])
eval hostargs_prune $ac_configure_args
hostargs="'--host=${host_alias-$host}' '--build=${build_alias-$build}' '--target=${target_alias-$target}' ${hostargs}"
],[])
AC_SUBST(hostargs)
AC_SUBST(host_subdir)
])
## PUBLIC: RTEMS_TARGET_CONFIG_SUBDIRS(target_subdir)
# subdirs to be build for the target environment
AC_DEFUN([RTEMS_TARGET_CONFIG_SUBDIRS],[
AS_IF([test -d ${srcdir}/$1],[
m4_append([_RTEMS_TARGET_CONFIGDIRS_LIST],[ $1])
_RTEMS_SUBST_IFNOT([target_configdirs],[$1])
m4_divert_text([DEFAULTS],
[ac_subdirs_all="$ac_subdirs_all m4_normalize([$1])"])
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
])
AC_DEFUN([_RTEMS_TARGET_CONFIG_PREPARE],[
m4_ifdef([_RTEMS_TARGET_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([target],[TARGET])])
m4_expand_once([_RTEMS_CONFIGURE_ARGS_PRUNE([targetargs])])
eval targetargs_prune $ac_configure_args
targetargs="'--host=${target_alias-$target}' '--build=${build_alias-$build}' '--target=${target_alias-$target}' ${targetargs}"
],[])
AC_SUBST(targetargs)
AC_SUBST(target_subdir)
])

18
aclocal/bsp-alias.m4 Normal file
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@@ -0,0 +1,18 @@
dnl _RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
dnl Internal subroutine to RTEMS_BSP_ALIAS
AC_DEFUN([_RTEMS_BSP_ALIAS],
[# account for "aliased" bsps which share source code
for bsp_cfgs in `ls "$srcdir"/"$RTEMS_TOPdir"/c/src/lib/libbsp/"$RTEMS_CPU"/*/"make/custom/$1.cfg" 2>/dev/null`; do
$2=`echo "$bsp_cfgs" | sed \
-e "s,^$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/,," \
-e "s,/make/custom/.*\.cfg$,,"`
break
done
])
dnl RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
dnl convert a bsp alias $1 into its bsp directory RTEMS_BSP_FAMILY
AC_DEFUN([RTEMS_BSP_ALIAS],
[_RTEMS_BSP_ALIAS(m4_if([$1],,[$RTEMS_BSP],[$1]),
m4_if([$2],,[RTEMS_BSP_FAMILY],[$2]))]
)

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@@ -0,0 +1,21 @@
dnl canonicalize target cpu
dnl NOTE: Most rtems targets do not fullfil autoconf's
dnl target naming conventions "processor-vendor-os"
dnl Therefore autoconf's AC_CANONICAL_TARGET will fail for them
dnl and we have to fix it for rtems ourselves
AC_DEFUN([RTEMS_CANONICAL_TARGET_CPU],
[
AC_CANONICAL_TARGET
AC_MSG_CHECKING(rtems target cpu)
case "${target}" in
no_cpu-*rtems*)
RTEMS_CPU=no_cpu
;;
*)
RTEMS_CPU=`echo $target | sed 's%^\([[^-]]*\)-\(.*\)$%\1%'`
;;
esac
AC_SUBST(RTEMS_CPU)
AC_MSG_RESULT($RTEMS_CPU)
])

25
aclocal/check-bsps.m4 Normal file
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@@ -0,0 +1,25 @@
dnl Report all available bsps for a target within the source tree
dnl
dnl RTEMS_CHECK_BSPS(bsp_list)
AC_DEFUN([RTEMS_CHECK_BSPS],
[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])dnl sets RTEMS_CPU, target
AC_REQUIRE([RTEMS_TOP])dnl sets RTEMS_TOPdir
AC_MSG_CHECKING([for available BSPs])
$1=
for bsp_spec in `ls "$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU"/*/bsp_specs 2>/dev/null`; do
bsp_family=`echo "$bsp_spec" | sed \
-e "s,^$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/,," \
-e "s,/bsp_specs$,,"`
for bsp_cfgs in `ls "$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/$bsp_family/make/custom/"*.cfg 2>/dev/null`; do
bsp_cfg=`echo "$bsp_cfgs" | sed \
-e "s,^$srcdir/$RTEMS_TOPdir/c/src/lib/libbsp/$RTEMS_CPU/$bsp_family/make/custom/,," \
-e "s,\.cfg$,,"`
$1="[$]$1 $bsp_cfg"
done
done
AS_IF([test -z "[$]$1"],
[AC_MSG_RESULT([none])],
[AC_MSG_RESULT([$]$1)])
])dnl

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@@ -0,0 +1,17 @@
AC_DEFUN([_RTEMS_CHECK_CUSTOM_BSP],[
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])dnl sets RTEMS_CPU, target
AC_REQUIRE([RTEMS_TOP])dnl sets RTEMS_TOPdir
$2=
for i in \
`ls "${srcdir}/${RTEMS_TOPdir}/c/src/lib/libbsp/${RTEMS_CPU}"/*/make/custom/$1 2>/dev/null`;
do
AS_IF([test -r $i],[
$2="$i"
break;
])
done
])
AC_DEFUN([RTEMS_CHECK_CUSTOM_BSP],[
_RTEMS_CHECK_CUSTOM_BSP([[$]$1],[BSP_FOUND])
])

11
aclocal/enable-cxx.m4 Normal file
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@@ -0,0 +1,11 @@
AC_DEFUN([RTEMS_ENABLE_CXX],
[
AC_ARG_ENABLE(cxx,
[AS_HELP_STRING([--enable-cxx],
[enable C++ support and build the rtems++ library])],
[case "${enable_cxx}" in
yes) RTEMS_HAS_CPLUSPLUS=yes ;;
no) RTEMS_HAS_CPLUSPLUS=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-cxx option) ;;
esac], [RTEMS_HAS_CPLUSPLUS=no])
])

12
aclocal/enable-drvmgr.m4 Normal file
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@@ -0,0 +1,12 @@
AC_DEFUN([RTEMS_ENABLE_DRVMGR],
[
## AC_BEFORE([$0], [RTEMS_CHECK_DRVMGR_STARTUP])dnl
AC_ARG_ENABLE(drvmgr,
[AS_HELP_STRING([--enable-drvmgr],[enable Driver Manager at Startup])],
[case "${enableval}" in
yes) RTEMS_DRVMGR_STARTUP=yes ;;
no) RTEMS_DRVMGR_STARTUP=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-drvmgr option) ;;
esac],[RTEMS_DRVMGR_STARTUP=yes])
])

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@@ -0,0 +1,13 @@
AC_DEFUN([RTEMS_ENABLE_MULTIPROCESSING],
[
AC_ARG_ENABLE(multiprocessing,
[AS_HELP_STRING([--enable-multiprocessing],
[enable multiprocessing interface; the multiprocessing interface is a
communication interface between different RTEMS instances and allows
synchronization of objects via message passing])],
[case "${enable_multiprocessing}" in
yes) ;;
no) ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-multiprocessing option) ;;
esac],[enable_multiprocessing=no])
])

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@@ -0,0 +1,13 @@
AC_DEFUN([RTEMS_ENABLE_NETWORKING],
[
## AC_BEFORE([$0], [RTEMS_CHECK_NETWORKING])dnl
AC_ARG_ENABLE(networking,
[AS_HELP_STRING([--enable-networking],[enable TCP/IP stack])],
[case "${enableval}" in
yes) RTEMS_HAS_NETWORKING=yes ;;
no) RTEMS_HAS_NETWORKING=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-networking option) ;;
esac],[RTEMS_HAS_NETWORKING=yes])
AC_SUBST(RTEMS_HAS_NETWORKING)dnl
])

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@@ -0,0 +1,13 @@
AC_DEFUN([RTEMS_ENABLE_PARAVIRT],
[
AC_ARG_ENABLE(paravirt,
[AS_HELP_STRING([--enable-paravirt],[enable support for paravirtualization
(default=no)])],
[case "${enableval}" in
yes) RTEMS_HAS_PARAVIRT=yes ;;
no) RTEMS_HAS_PARAVIRT=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-paravirt option) ;;
esac],[RTEMS_HAS_PARAVIRT=no])
])

21
aclocal/enable-posix.m4 Normal file
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@@ -0,0 +1,21 @@
AC_DEFUN([RTEMS_ENABLE_POSIX],
[
## AC_BEFORE([$0], [RTEMS_CHECK_POSIX_API])dnl
AC_ARG_ENABLE(posix,
[AS_HELP_STRING([--enable-posix],[enable posix interface])],
[case "${enableval}" in
yes) RTEMS_HAS_POSIX_API=yes ;;
no) RTEMS_HAS_POSIX_API=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-posix option) ;;
esac],[RTEMS_HAS_POSIX_API=yes])
case "${host}" in
no_cpu-*rtems*)
RTEMS_HAS_POSIX_API=no
;;
*)
;;
esac
AC_SUBST(RTEMS_HAS_POSIX_API)
])

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@@ -0,0 +1,10 @@
AC_DEFUN([RTEMS_ENABLE_RTEMS_DEBUG],
[
AC_ARG_ENABLE(rtems-debug,
AS_HELP_STRING([--enable-rtems-debug],[enable RTEMS_DEBUG]),
[case "${enable_rtems_debug}" in
yes) enable_rtems_debug=yes ;;
no) enable_rtems_debug=no ;;
*) AC_MSG_ERROR([bad value ${enable_rtems_debug} for RTEMS_DEBUG]) ;;
esac],[enable_rtems_debug=no])
])

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@@ -0,0 +1,15 @@
dnl Override the set of BSPs to be built.
dnl used by the toplevel configure script
dnl RTEMS_ENABLE_RTEMSBSP(rtems_bsp_list)
AC_DEFUN([RTEMS_ENABLE_RTEMSBSP],
[
AC_BEFORE([$0], [RTEMS_ENV_RTEMSBSP])
AC_ARG_ENABLE(rtemsbsp,
[AS_HELP_STRING([--enable-rtemsbsp="bsp1 bsp2 .."],
[BSPs to include in build])],
[case "${enable_rtemsbsp}" in
yes ) enable_rtemsbsp="" ;;
no ) enable_rtemsbsp="no" ;;
*) enable_rtemsbsp="$enable_rtemsbsp" ;;
esac],[enable_rtemsbsp=""])
])

21
aclocal/enable-smp.m4 Normal file
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@@ -0,0 +1,21 @@
AC_DEFUN([RTEMS_ENABLE_SMP],
[
## AC_BEFORE([$0], [RTEMS_CHECK_SMP])dnl
AC_ARG_ENABLE(experimental-smp,
[AS_HELP_STRING([--enable-experimental-smp],[enable experimental support for symmetric multiprocessing
(SMP)])],
[case "${enableval}" in
yes) case "${RTEMS_CPU}" in
arm|powerpc|sparc|i386) RTEMS_HAS_SMP=yes ;;
*) RTEMS_HAS_SMP=no ;;
esac
;;
no) RTEMS_HAS_SMP=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for enable-smp option) ;;
esac],[RTEMS_HAS_SMP=no])
AC_ARG_ENABLE(smp,
[],
[AC_MSG_ERROR([SMP support is experimental in RTEMS 4.11, use --enable-experimental-smp])],
[])
])

11
aclocal/enable-tests.m4 Normal file
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@@ -0,0 +1,11 @@
AC_DEFUN([RTEMS_ENABLE_TESTS],
[
AC_ARG_ENABLE(tests,
[AS_HELP_STRING([--enable-tests],[enable tests (default:samples)])],
[case "${enableval}" in
samples) enable_tests=samples;;
yes) enable_tests=yes ;;
no) enable_tests=no ;;
*) AC_MSG_ERROR([bad value ${enableval} for --enable-tests]) ;;
esac], [enable_tests=samples])
])

17
aclocal/multilib.m4 Normal file
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@@ -0,0 +1,17 @@
dnl This provides configure definitions used for multilib support
dnl parts of these macros are derived from newlib-1.8.2's multilib support
AC_DEFUN([RTEMS_ENABLE_MULTILIB],
[
AC_ARG_ENABLE(multilib,
AS_HELP_STRING([--enable-multilib],
[build many library versions (default=no)]),
[case "${enableval}" in
yes) multilib=yes ;;
no) multilib=no ;;
*) AC_MSG_ERROR(bad value ${enableval} for multilib option) ;;
esac], [multilib=no])dnl
AM_CONDITIONAL(MULTILIB,test x"${multilib}" = x"yes")
])

12
aclocal/path-ksh.m4 Normal file
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@@ -0,0 +1,12 @@
AC_DEFUN([RTEMS_PATH_KSH],
[
dnl NOTE: prefer bash over ksh over sh
AC_PATH_PROGS(KSH,bash ksh sh)
if test -z "$KSH"; then
dnl NOTE: This cannot happen -- /bin/sh must always exist
AC_MSG_ERROR(
[***]
[ Cannot determine a usable shell bash/ksh/sh]
[ Please contact your system administrator] );
fi
])

21
aclocal/project-root.m4 Normal file
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@@ -0,0 +1,21 @@
dnl
dnl PROJECT_TOPdir .. relative path to the top of the build-tree
dnl PROJECT_ROOT .. relative path to the top of the temporary
dnl installation directory inside the build-tree
dnl RTEMS_TOPdir .. relative path of a subpackage's configure.ac to the
dnl toplevel configure.ac of the source-tree
dnl RTEMS_ROOT .. path to the top of a bsp's build directory
dnl [Applied by custom/*.cfg, depredicated otherwise]
dnl
AC_DEFUN([RTEMS_PROJECT_ROOT],
[dnl
AC_REQUIRE([RTEMS_TOP])
PACKHEX="\$(PROJECT_TOPdir)/tools/build/packhex"
AC_SUBST(PACKHEX)
BIN2C="\$(PROJECT_TOPdir)/tools/build/rtems-bin2c"
AC_SUBST(BIN2C)
])

41
aclocal/quoting.m4 Normal file
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@@ -0,0 +1,41 @@
dnl RTEMS_CONFIGURE_ARGS_QUOTE(dnl RETURN_VAR, [ADDITIONAL_CASES], [VAR_TO_PROCESS]])
dnl
AC_DEFUN([_RTEMS_CONFIGURE_ARGS_QUOTE],
[
$1_prune()
{
# Remove --cache-file and --srcdir arguments so they do not pile up.
$1=
ac_prev=
for ac_arg
do
if test -n "$ac_prev"; then
ac_prev=
continue
fi
case $ac_arg in
-cache-file | --cache-file | --cache-fil | --cache-fi \
| --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
ac_prev=cache_file ;;
-cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
| --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* \
| --c=*)
;;
--config-cache | -C)
;;
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
ac_prev=srcdir ;;
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
;;
m4_if([$2],,,[$2])
*) $1="$$1 '$ac_arg'" ;;
esac
done
export $1
}
])
AC_DEFUN([RTEMS_CONFIGURE_ARGS_QUOTE],[
m4_expand_once([_RTEMS_CONFIGURE_ARGS_QUOTE([$1],[$2])])
eval $1_prune m4_if([$3],,[$ac_configure_args],[[$]$3])
])

20
aclocal/rpm.m4 Normal file
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@@ -0,0 +1,20 @@
AC_DEFUN([RTEMS_ENABLE_RPMPREFIX],[
AC_ARG_ENABLE([rpmprefix],
[ --enable-rpmprefix=<rpmprefix> prefix rpms],
[case $enable_rpmprefix in
yes ) rpmprefix="rtems-"]_RTEMS_API["-";;
no ) rpmprefix="%{nil}";;
* ) AS_IF([test -z "$enable_rpmprefix"],
[rpmprefix="%{nil}"],
[rpmprefix="$enable_rpmprefix"]);;
esac],
[rpmprefix="rtems-"]_RTEMS_API["-"])
AC_ARG_ENABLE([osversions],
[ --enable-osversions whether to use version numbers in os-tripples],
[case $enable_osversions in
yes ) osversion=_RTEMS_API;;
* ) osversion=;;
esac],
[osversion=_RTEMS_API])
])

34
aclocal/rtems-top.m4 Normal file
View File

@@ -0,0 +1,34 @@
# AC_DISABLE_OPTION_CHECKING is not available before 2.62
AC_PREREQ(2.62)
dnl
dnl RTEMS_TOP($1)
dnl
dnl $1 .. relative path from this configure.ac to the toplevel configure.ac
dnl
AC_DEFUN([RTEMS_TOP],
[dnl
AC_REQUIRE([RTEMS_VERSIONING])
AC_REQUIRE([AC_DISABLE_OPTION_CHECKING])
AC_CONFIG_AUX_DIR([$1])
AC_CHECK_PROGS(MAKE, gmake make)
AC_BEFORE([$0], [AM_INIT_AUTOMAKE])dnl
AC_PREFIX_DEFAULT([/opt/rtems-][_RTEMS_API])
RTEMS_TOPdir="$1";
AC_SUBST(RTEMS_TOPdir)
dots=`echo $with_target_subdir|\
sed -e 's,^\.$,,' -e 's%^\./%%' -e 's%[[^/]]$%&/%' -e 's%[[^/]]*/%../%g'`
PROJECT_TOPdir=${dots}${RTEMS_TOPdir}/'$(top_builddir)'
AC_SUBST(PROJECT_TOPdir)
PROJECT_ROOT="${RTEMS_TOPdir}/\$(top_builddir)"
AC_SUBST(PROJECT_ROOT)
AC_MSG_CHECKING([for RTEMS Version])
AC_MSG_RESULT([_RTEMS_VERSION])
pkgdatadir="${datadir}"/rtems[]_RTEMS_API;
AC_SUBST([pkgdatadir])
])dnl

23
aclocal/tool-paths.m4 Normal file
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@@ -0,0 +1,23 @@
AC_DEFUN([RTEMS_TOOLPATHS],
[
# tooldir='$(exec_prefix)/'$target_alias
# Temporary work-around until building in source tree is supported
AC_REQUIRE([RTEMS_PROJECT_ROOT])
tooldir='$(PROJECT_ROOT)'
AC_SUBST(tooldir)
project_includedir='$(tooldir)'/include
AC_SUBST(project_includedir)
project_libdir='$(tooldir)/lib$(MULTISUBDIR)'
AC_SUBST(project_libdir)
project_bindir='$(tooldir)/bin'
AC_SUBST(project_bindir)
rtems_bspdir='$(prefix)/${RTEMS_BSP}'
AC_SUBST(rtems_bspdir)
rtems_makedir='$(prefix)/make'
AC_SUBST(rtems_makedir)
])

4
aclocal/version.m4 Normal file
View File

@@ -0,0 +1,4 @@
AC_DEFUN([RTEMS_VERSIONING],
m4_define([_RTEMS_VERSION],[4.11.1.99]))
m4_define([_RTEMS_API],[4.11])

274
ampolish3 Executable file
View File

@@ -0,0 +1,274 @@
#! /usr/bin/env perl
#
# Copyright (C) 2005, 2006 Ralf Corsépius, Ulm, Germany
#
# Permission to use, copy, modify, and distribute this software
# is freely granted, provided that this notice is preserved.
# Helper script to generate pre/tmpinstall rules for RTEMS Makefile.am.
#
# Usage: ampolish3 Makefile.am > preinstall.am
#
# Reads a Makefile.am from stdin and writes corresponding
# pre/tmpinstall rules to stdout.
sub replace($);
sub print_dirstamp($$$);
# Predefined directory mappings:
#
# final-installation directory => temp installation directory
my %dirmap = (
'$(includedir)' => '$(PROJECT_INCLUDE)',
'$(libdir)' => '$(PROJECT_LIB)',
'$(project_libdir)' => '$(PROJECT_LIB)',
'$(project_includedir)' => '$(PROJECT_INCLUDE)'
);
# Conventions on automake primaries:
#
# *_HEADERS -> preinstall
# noinst*_HEADERS -> noinst
# noinst_*_LIBRARIES -> noinst
# project_*_LIBRARIES -> tmpinstall
# *_LIBRARIES -> ignore (no preinstallation)
# dist_project_*_DATA -> preinstall (bsp_specs,linkcmds)
# project_*_DATA -> tmpinstall (*.o, *.a)
# dist_*_DATA -> ignore (no preinstallation)
# *SCRIPTS -> ignore (no preinstallation)
# noinst_*_PROGRAMS -> noinst
# project_*_PROGRAMS -> tmpinstall
# *_PROGRAMS -> ignore (no preinstallation)
## 1st pass: read in file
my @buffer1 = () ;
my %seen = ();
my %predefs = ();
{
my $mode = 0 ;
my $line = '';
while ( <> )
{
if ( $mode == 0 )
{
if ( /^([a-zA-Z0-9_]+\s*[\+]?[:=].*)\\$/o )
{
$line = "$1" ;
$mode = 1;
} else {
push @buffer1, $_ ;
}
} elsif ( $mode == 1 ) {
if ( /^(.*)\\$/o ) {
$line .= $1;
} else {
$line .= $_ ;
push @buffer1, $line ;
$line = '';
$mode = 0 ;
}
}
}
}
#foreach my $l ( @buffer1 ) { print STDERR "1:<$l>"; }
# Filter out all Makefile code not relevant here
my @buffer2 = ();
foreach my $l ( @buffer1 ) {
if ( $l=~ /^\t.*$/o )
{ #ignore: Production of a make rule.
} elsif ( $l =~ /^\s*([a-zA-Z0-9_]*dir)\s*\=\s*(.*)\s*$/o )
{ # dirs
push @buffer2, "$l";
$dirmap{"\$\($1\)"} = replace($2);
} elsif ( $l =~ /^\s*noinst_(.*)\s*[\+]?\=(.*)$/o )
{
#ignore: noinst_* are not relevant here.
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_|)([a-zA-Z0-9_]+)_(HEADERS|LIBRARIES|DATA|SCRIPTS|PROGRAMS)\s*([\+]?\=)\s*(.*)/o )
{
if ( ( "$5" eq '=' ) ) {
my $v = $dirmap{"\$\($3dir\)"};
if ( $v =~ /\$\(PROJECT_[^\)]+\)$/ )
{
$predefs{"$v"} = 1;
}
}
foreach my $f ( split(' ',$6) ) {
push @buffer2, "$1$2$3_$4 +=$f\n";
}
} elsif ( $l =~ /^\s*(if|else|endif)\s*.*$/o )
{ # conditionals
push @buffer2, "$l";
}
# Check if Makefile.am already contains CLEANFILES or DISTCLEANFILES
if ( $l =~ /^\s*(CLEANFILES|DISTCLEANFILES|SUBDIRS)\s*\=.*$/o )
{
$predefs{"$1"} = 1;
}
}
if ( $predefs{"\$(PROJECT_INCLUDE)"} ){
unshift @buffer2, "includedir = \$(includedir)\n";
}
if ( $predefs{"\$(PROJECT_LIB)"} ){
unshift @buffer2, "libdir = \$(libdir)\n";
}
# foreach my $l ( @buffer2 ) { print STDERR "2:<$l>"; }
my @buffer3 = ();
foreach my $l ( @buffer2 ) {
if ( $l =~ /^\s*([a-zA-Z0-9_]*dir)\s*\=\s*(.*)\s*$/o )
{ # dirs
my $v = $dirmap{"\$\($1\)"};
print_dirstamp(\@buffer3,$v,"PREINSTALL_DIRS");
$seen{"PREINSTALL_DIRS"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_|)([a-zA-Z0-9_]+)_HEADERS\s*\+\=(.*)/o )
{ # preinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"PREINSTALL_FILES += $v/$x\n\n";
$seen{"PREINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_)([a-zA-Z0-9_]+)_LIBRARIES\s*\+\=(.*)/o )
{ # tmpinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"TMPINSTALL_FILES += $v/$x\n\n";
$seen{"TMPINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)([a-zA-Z0-9_]+)_LIBRARIES\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(dist_)(project_)([a-zA-Z0-9_]+)_DATA\s*\+\=(.*)/o )
{ # preinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"PREINSTALL_FILES += $v/$x\n\n";
$seen{"PREINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|)(project_)([a-zA-Z0-9_]+)_DATA\s*\+\=(.*)/o )
{ # tmpinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_DATA) \$< $v/$x\n",
"TMPINSTALL_FILES += $v/$x\n\n";
$seen{"TMPINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(dist_|)([a-zA-Z0-9_]+)_DATA\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(nodist_|dist_|)([a-zA-Z0-9_]+)_SCRIPTS\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(nodist_|dist_|)(project_)([a-zA-Z0-9_]+)_PROGRAMS\s*\+\=(.*)/o )
{ # tmpinstall
my $v = $dirmap{"\$\($3dir\)"};
my $f = $4;
my $x ; my $i = rindex($f,'/');
if ($i < 0) { $x="$f";
} else { $x = substr($f,$i+1);
}
push @buffer3,
"$v/$x: $f $v/\$(dirstamp)\n",
"\t\$(INSTALL_PROGRAM) \$< $v/$x\n",
"TMPINSTALL_FILES += $v/$x\n\n";
$seen{"TMPINSTALL_FILES"} = 1;
} elsif ( $l =~ /^\s*(nodist_|dist_|)([a-zA-Z0-9_]+)_PROGRAMS\s*\+\=(.*)/o )
{ # ignore
} elsif ( $l =~ /^\s*(if|else|endif)\s*.*$/o )
{ # conditionals
push @buffer3, "$l";
}
}
# foreach my $l ( @buffer3 ) { print STDERR "3:<$l>"; }
my $output;
$output .= "## Automatically generated by ampolish3 - Do not edit\n\n";
$output .= "if AMPOLISH3\n";
$output .= "\$(srcdir)/preinstall.am: Makefile.am\n";
$output .= "\t\$(AMPOLISH3) \$(srcdir)/Makefile.am > \$(srcdir)/preinstall.am\n";
$output .= "endif\n\n";
foreach my $k ( sort keys %seen )
{
if ( $k =~ /PREINSTALL_FILES/o ) {
$output .= "all-am: \$(PREINSTALL_FILES)\n\n";
$output .= "$k =\n";
$output .= "CLEANFILES ";
if ( $predefs{"CLEANFILES"} ) { $output .= "+"; }
$output .= "= \$($k)\n";
$predefs{"CLEANFILES"} = 1;
} elsif ( $k =~ /TMPINSTALL_FILES/o ) {
$output .= "all-local: \$(TMPINSTALL_FILES)\n\n";
$output .= "$k =\n";
$output .= "CLEANFILES ";
if ( $predefs{"CLEANFILES"} ) { $output .= "+"; }
$output .= "= \$($k)\n";
$predefs{"CLEANFILES"} = 1;
} elsif ( $k =~ /.*DIRS/o ) {
$output .= "$k =\n";
$output .= "DISTCLEANFILES ";
if ( $predefs{"DISTCLEANFILES"} ) { $output .= "+"; }
$output .= "= \$($k)\n";
$predefs{"DISTCLEANFILES"} = 1;
}
$output .= "\n";
}
# Pretty printing
$output .= join ( '', @buffer3 );
$output =~ s/\nelse\n+endif/\nendif/g;
$output =~ s/\n\n+endif/\nendif/g;
$output =~ s/\nif [a-zA-Z0-9_!]+\n+endif//g;
print STDOUT $output;
exit 0;
sub replace($)
{
my ($v) = @_;
foreach my $i ( sort keys %dirmap )
{
$v =~ s/\Q$i/$dirmap{$i}/g;
}
return $v;
}
sub print_dirstamp($$$)
{
my ($obuf,$file,$inst) = @_ ;
push @{$obuf}, "$file/\$(dirstamp):\n\t\@\$\(MKDIR_P\) $file\n" ;
push @{$obuf}, "\t\@: \> $file/\$(dirstamp)\n" ;
push @{$obuf}, "$inst += $file/\$(dirstamp)\n\n" ;
}

8
automake/host.am Normal file
View File

@@ -0,0 +1,8 @@
## NOTE: This is a temporary work-around to keep
## RTEMS's non automake standard make targets working.
## Once automake is fully integrated these make targets
## and this file will probably be removed
preinstall-am: $(PREINSTALL_FILES)
preinstall: preinstall-am
.PHONY: preinstall preinstall-am

5
automake/local.am Normal file
View File

@@ -0,0 +1,5 @@
preinstall-am: $(PREINSTALL_FILES)
preinstall: preinstall-am
.PHONY: preinstall preinstall-am
PROJECT_TOOLS = $(PROJECT_RELEASE)/build-tools

30
automake/subdirs.am Normal file
View File

@@ -0,0 +1,30 @@
## Borrowed from automake-1.4 and adapted to RTEMS
## NOTE: This is a temporary work-around to keep
## RTEMS's non automake standard make targets working.
## Once automake is fully integrated these make targets
## and this file will probably be removed
preinstall-recursive:
@set fnord $(MAKEFLAGS); amf=$$2; \
dot_seen=no; \
target=`echo $@ | sed s/-recursive//`; \
list='$(SUBDIRS)'; for subdir in $$list; do \
echo "Making $$target in $$subdir"; \
if test "$$subdir" = "."; then \
dot_seen=yes; \
local_target="$$target-am"; \
else \
local_target="$$target"; \
fi; \
(cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
## This trick allows "-k" to keep its natural meaning when running a
## recursive rule.
|| case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
done; \
if test "$$dot_seen" = "no"; then \
$(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
fi; test -z "$$fail"
preinstall: preinstall-recursive
.PHONY: preinstall-recursive

263
bootstrap Executable file
View File

@@ -0,0 +1,263 @@
#!/bin/sh
#
# helps bootstrapping, when checked out from CVS
# requires GNU autoconf and GNU automake
#
# this is not meant to be exported outside the source tree
#
# NOTE: Inspired by libtool's autogen script
#
# to be run from the toplevel directory of RTEMS'
# source tree
progname=`basename $0`
top_srcdir=`dirname $0`
verbose=""
quiet="false"
mode="autoreconf"
force=0
usage()
{
echo
echo "usage: ${progname} [-c|-p|-h] [-q][-v]"
echo
echo "options:"
echo " -c .. clean, remove all aclocal/autoconf/automake generated files"
echo " -h .. display this message and exit"
echo " -p .. regenerate preinstall.am files"
echo " -q .. quiet, don't display directories"
echo " -v .. verbose, pass -v to autotools"
echo
exit 1
}
generate_bspdir_acinclude()
{
cat << EOF > acinclude.m4~
# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY)
AC_DEFUN([RTEMS_CHECK_BSPDIR],
[
case "\$1" in
EOF
for i in `LANG=C LC_COLLATE=C ls */bsp_specs | sort`; do
d=`dirname $i`
cat << EOF >> acinclude.m4~
$d )
AC_CONFIG_SUBDIRS([$d]);;
EOF
done
cat << EOF >> acinclude.m4~
*)
AC_MSG_ERROR([Invalid BSP]);;
esac
])
EOF
if cmp -s acinclude.m4 acinclude.m4~ 2>/dev/null; then
echo "acinclude.m4 is unchanged"
else
cp acinclude.m4~ acinclude.m4
fi
rm -f acinclude.m4~
}
if test ! -f $top_srcdir/aclocal/version.m4; then
echo "${progname}:"
echo " Installation problem: Can't find file aclocal/version.m4"
exit 1
fi
while test $# -gt 0; do
case $1 in
-h|--he|--hel|--help)
usage ;;
-q|--qu|--qui|--quie|--quiet)
quiet="true"
shift;;
-v|--ve|--ver|--verb|--verbo|--verbos|--verbose)
verbose="-v"
shift;;
-c|--cl|--cle|--clea|--clean)
mode="clean"
shift;;
-f|--fo|--for|--forc|--force)
force=`expr $force + 1`
shift;;
-p|--pr|--pre|--prei|--prein|--preins|--preinst)
mode="preinstall"
shift;;
-r|--re|--rec|--reco|--recon|--reconf)
mode="autoreconf"
shift;;
-g|--ge|--gen|--gene|--gener|--genera|--generat|--generate)
mode="generate"
shift;;
-*) echo "unknown option $1"
usage ;;
*) echo "invalid parameter $1"
usage ;;
esac
done
case $mode in
preinstall)
confs=`find . -name Makefile.am -exec grep -l 'include .*/preinstall\.am' {} \;`
for i in $confs; do
dir=$(dirname $i)
test "$quite" = "true" || echo "Generating $dir/preinstall.am"
${top_srcdir}/ampolish3 "$dir/Makefile.am" > "$dir/preinstall.am"
done
;;
generate)
AUTOCONF=${AUTOCONF-autoconf}
if test -z "$AUTOCONF"; then
echo "You must have autoconf installed to run $program"
exit 1
fi
AUTOHEADER=${AUTOHEADER-autoheader}
if test -z "$AUTOHEADER"; then
echo "You must have autoconf installed to run $program"
exit 1
fi
AUTOMAKE=${AUTOMAKE-automake}
if test -z "$AUTOMAKE"; then
echo "You must have automake installed to run $program"
exit 1
fi
ACLOCAL=${ACLOCAL-aclocal}
if test -z "$ACLOCAL"; then
echo "You must have automake installed to run $program"
exit 1
fi
case $top_srcdir in
/* ) aclocal_dir=$top_srcdir
;;
*) aclocal_dir=`pwd`/$top_srcdir
;;
esac
confs=`find . \( -name 'configure.in' -o -name 'configure.ac' \) -print`
for i in $confs; do
dir=`dirname $i`
configure=`basename $i`
( test "$quiet" = "true" || echo "$dir"
cd $dir
test -n "`grep RTEMS_CHECK_BSPDIR ${configure}`" && \
generate_bspdir_acinclude
pat="s,\$(RTEMS_TOPdir),${aclocal_dir},g"
aclocal_args=`grep '^[ ]*ACLOCAL_AMFLAGS' Makefile.am | \
sed -e 's%.*ACLOCAL_AMFLAGS.*\=[ ]*%%g' -e $pat `
test "$verbose" = "-v" && echo "${ACLOCAL} $aclocal_args"
${ACLOCAL} $aclocal_args
test -n "`grep CONFIG_HEADER ${configure}`" && ${AUTOHEADER} \
&& test "$verbose" = "-v" && echo "${AUTOHEADER}"
test -n "`grep RTEMS_BSP_CONFIGURE ${configure}`" && ${AUTOHEADER} \
&& test "$verbose" = "-v" && echo "${AUTOHEADER}"
test -f Makefile.am && ${AUTOMAKE} -a -c $verbose
${AUTOCONF}
test -f Makefile.am && test -n "`grep 'stamp-h\.in' Makefile.in`" \
&& echo timestamp > stamp-h.in
)
done
;;
autoreconf)
AUTORECONF=${AUTORECONF-autoreconf}
if test -z "$AUTORECONF"; then
echo "You must have autoreconf installed to run $program"
exit 1
fi
confs=`find . -name 'configure.ac' -print`
for i in $confs; do
dir=`dirname $i`
configure=`basename $i`
( test "$quiet" = "true" || echo "$dir"
cd $dir
test -n "`grep RTEMS_CHECK_BSPDIR ${configure}`" && \
generate_bspdir_acinclude
${AUTORECONF} -i --no-recursive $verbose
test -f Makefile.am && test -n "`grep 'stamp-h\.in' Makefile.in`" \
&& echo timestamp > stamp-h.in
)
done
;;
clean)
test "$quiet" = "true" || echo "removing automake generated Makefile.in files"
files=`find . -name 'Makefile.am' -print | sed -e 's%\.am%\.in%g'`
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
test "$quiet" = "true" || echo "removing configure files"
files=`find . -name 'configure' -print`
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
if test $force -gt 0; then
needles=""
if test $force -gt 1; then
# Manually maintained
needles="$needles config.sub"
needles="$needles config.guess"
fi
if test $force -gt 0; then
# Inherited from automake
needles="$needles compile"
needles="$needles depcomp"
needles="$needles install-sh"
needles="$needles missing"
needles="$needles mdate-sh"
fi
for j in $needles; do
files=`find . -name "$j" -print`
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
done
fi
test "$quiet" = "true" || echo "removing aclocal.m4 files"
files=`find . -name 'aclocal.m4' -print`
test "$verbose" = "-v" && test -n "$files" && echo "$files"
for i in $files; do
if test -f $i; then
rm -f $i
test "$verbose" = "-v" && echo "$i"
fi
done
find . -name '*~' -print | xargs rm -f
find . -name 'bspopts.h.in' -print | xargs rm -f
find . -name '*.orig' -print | xargs rm -f
find . -name '*.rej' -print | xargs rm -f
find . -name 'config.status' -print | xargs rm -f
find . -name 'config.log' -print | xargs rm -f
find . -name 'config.cache' -print | xargs rm -f
find . -name 'Makefile' -print | xargs rm -f
find . -name '.deps' -print | xargs rm -rf
find . -name '.libs' -print | xargs rm -rf
find . -name 'stamp-h.in' | xargs rm -rf
find . -name 'autom4te*.cache' | xargs rm -rf
;;
esac
exit 0

View File

@@ -1,70 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/bspIo.h>
#include <bsp.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/console-termios.h>
#include <bspopts.h>
arm_pl011_context a53_qemu_vpl011_context = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
.regs = (arm_pl011_uart *) BSP_A53_QEMU_VPL011_BASE,
.initial_baud = 115200,
.clock = 24000000
};
const console_device console_device_table[] = {
{
.device_file = "/dev/ttyS0",
.probe = console_device_probe_default,
.handler = &arm_pl011_fns,
.context = &a53_qemu_vpl011_context.base
}
};
const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
static void output_char( char c )
{
arm_pl011_write_polled(&a53_qemu_vpl011_context.base, c);
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = NULL;

View File

@@ -1,74 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief Core BSP definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A53_QEMU_BSP_H
#define LIBBSP_AARCH64_A53_QEMU_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0x08010000
#define BSP_ARM_GIC_DIST_BASE 0x08000000
#define BSP_ARM_GIC_REDIST_BASE 0x080A0000
#define BSP_A53_QEMU_VPL011_BASE 0x9000000
#define BSP_A53_QEMU_VPL011_LENGTH 0x1000
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_A53_QEMU_BSP_H */

View File

@@ -1,66 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP IRQ definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A53_IRQ_H
#define LIBBSP_AARCH64_A53_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <dev/irq/arm-gic-irq.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_INTERRUPT_VECTOR_COUNT 256
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
#define BSP_VPL011_SPI 32
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_AARCH64_A53_IRQ_H */

View File

@@ -1,46 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP tm27 header
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

View File

@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

View File

@@ -1,52 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup Hooks
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
/* Do nothing */
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
bsp_start_clear_bss();
}

View File

@@ -1,70 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/bspIo.h>
#include <bsp.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/console-termios.h>
#include <bspopts.h>
arm_pl011_context a72_qemu_vpl011_context = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
.regs = (arm_pl011_uart *) BSP_A72_QEMU_VPL011_BASE,
.initial_baud = 115200,
.clock = 24000000
};
const console_device console_device_table[] = {
{
.device_file = "/dev/ttyS0",
.probe = console_device_probe_default,
.handler = &arm_pl011_fns,
.context = &a72_qemu_vpl011_context.base
}
};
const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
static void output_char( char c )
{
arm_pl011_write_polled(&a72_qemu_vpl011_context.base, c);
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = NULL;

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@@ -1,74 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief Core BSP definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A72_QEMU_BSP_H
#define LIBBSP_AARCH64_A72_QEMU_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0x08010000
#define BSP_ARM_GIC_DIST_BASE 0x08000000
#define BSP_ARM_GIC_REDIST_BASE 0x080A0000
#define BSP_A72_QEMU_VPL011_BASE 0x9000000
#define BSP_A72_QEMU_VPL011_LENGTH 0x1000
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_A72_QEMU_BSP_H */

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@@ -1,66 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief BSP IRQ definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A72_IRQ_H
#define LIBBSP_AARCH64_A72_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <dev/irq/arm-gic-irq.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_INTERRUPT_VECTOR_COUNT 1020
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
#define BSP_VPL011_SPI 32
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_AARCH64_A72_IRQ_H */

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@@ -1,46 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A72
*
* @brief BSP tm27 header
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

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@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

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@@ -1,52 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup Hooks
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
/* Do nothing */
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
bsp_start_clear_bss();
}

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@@ -1,271 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_start
*
* @brief AArch64 MMU configuration.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_AARCH64_MMU_H
#define LIBBSP_AARCH64_SHARED_AARCH64_MMU_H
#include <bsp/fatal.h>
#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <bsp/utility.h>
#include <bspopts.h>
#include <libcpu/mmu-vmsav8-64.h>
#include <rtems/score/aarch64-system-registers.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
typedef struct {
uintptr_t begin;
uintptr_t end;
uint64_t flags;
} aarch64_mmu_config_entry;
#define AARCH64_MMU_DEFAULT_SECTIONS \
{ \
.begin = (uintptr_t) bsp_section_fast_text_begin, \
.end = (uintptr_t) bsp_section_fast_text_end, \
.flags = AARCH64_MMU_CODE_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_fast_data_begin, \
.end = (uintptr_t) bsp_section_fast_data_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_start_begin, \
.end = (uintptr_t) bsp_section_start_end, \
.flags = AARCH64_MMU_CODE_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_vector_begin, \
.end = (uintptr_t) bsp_section_vector_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_text_begin, \
.end = (uintptr_t) bsp_section_text_end, \
.flags = AARCH64_MMU_CODE_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_rodata_begin, \
.end = (uintptr_t) bsp_section_rodata_end, \
.flags = AARCH64_MMU_DATA_RO_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_data_begin, \
.end = (uintptr_t) bsp_section_data_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_bss_begin, \
.end = (uintptr_t) bsp_section_bss_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_rtemsstack_begin, \
.end = (uintptr_t) bsp_section_rtemsstack_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_noinit_begin, \
.end = (uintptr_t) bsp_section_noinit_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_work_begin, \
.end = (uintptr_t) bsp_section_work_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_stack_begin, \
.end = (uintptr_t) bsp_section_stack_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
.begin = (uintptr_t) bsp_section_nocache_begin, \
.end = (uintptr_t) bsp_section_nocache_end, \
.flags = AARCH64_MMU_DEVICE \
}, { \
.begin = (uintptr_t) bsp_section_nocachenoload_begin, \
.end = (uintptr_t) bsp_section_nocachenoload_end, \
.flags = AARCH64_MMU_DEVICE \
}, { \
.begin = (uintptr_t) bsp_translation_table_base, \
.end = (uintptr_t) bsp_translation_table_end, \
.flags = AARCH64_MMU_DATA_RW_CACHED \
}, { \
/*
* The vector table must be in writable and executable memory as it stores both
* exception code and the mutable pointer to which it jumps
*/ \
.begin = (uintptr_t) bsp_start_vector_table_begin, \
.end = (uintptr_t) bsp_start_vector_table_end, \
.flags = AARCH64_MMU_CODE_RW_CACHED \
}
/**
* @brief This is the AArch64 MMU configuration table.
*
* The default table is provided by the BSP. Applications may provide their
* own.
*/
extern const aarch64_mmu_config_entry aarch64_mmu_config_table[];
/**
* @brief This is the count of entries in the AArch64 MMU configuration table.
*
* The default table is provided by the BSP. Applications may provide their
* own.
*/
extern const size_t aarch64_mmu_config_table_size;
/**
* @brief This structure represents the state to maintain the MMU translation
* tables.
*/
typedef struct {
/**
* @brief This member references the translation table base.
*/
uint64_t *ttb;
/**
* @brief This member contains the count of used page tables.
*
* A maximum of ::AARCH64_MMU_TRANSLATION_TABLE_PAGES can be used.
*/
size_t used_page_tables;
} aarch64_mmu_control;
/**
* @brief This object is used to maintain the MMU translation tables.
*/
extern aarch64_mmu_control aarch64_mmu_instance;
/**
* @brief Sets the MMU translation table entries associated with the memory
* region.
*
* @param[in, out] control is a reference to the MMU control state.
*
* @param[in] config is the configuration entry with the memory region and
* region attributes.
*
* @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
*
* @retval ::RTEMS_INVALID_ADDRESS The begin address of the memory region
* cannot be mapped by the MMU.
*
* @retval ::RTEMS_INVALID_SIZE The end address of the memory region cannot be
* mapped by the MMU.
*
* @retval ::RTEMS_TOO_MANY There was no page table entry available to perform
* the mapping.
*/
rtems_status_code aarch64_mmu_set_translation_table_entries(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config
);
/**
* @brief Sets up the MMU translation table.
*
* The memory regions of the configuration table are mapped by the MMU. If a
* mapping is infeasible, then the BSP fatal error
* ::AARCH64_FATAL_MMU_CANNOT_MAP_BLOCK will be issued.
*
* @param[in, out] control is a reference to the MMU control state.
*
* @param[in] config_table is the configuration table with memory regions and
* region attributes.
*
* @param config_count is the count of configuration table entries.
*/
void aarch64_mmu_setup_translation_table(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config_table,
size_t config_count
);
BSP_START_TEXT_SECTION static inline void
aarch64_mmu_enable( const aarch64_mmu_control *control )
{
uint64_t sctlr;
/* CPUECTLR_EL1.SMPEN is already set on ZynqMP and is not writable */
/* Flush and invalidate cache */
rtems_cache_flush_entire_data();
_AArch64_Write_ttbr0_el1( (uintptr_t) control->ttb );
_AARCH64_Instruction_synchronization_barrier();
/* Enable MMU and cache */
sctlr = _AArch64_Read_sctlr_el1();
sctlr |= AARCH64_SCTLR_EL1_I | AARCH64_SCTLR_EL1_C | AARCH64_SCTLR_EL1_M;
_AArch64_Write_sctlr_el1( sctlr );
}
BSP_START_TEXT_SECTION static inline void
aarch64_mmu_disable( void )
{
uint64_t sctlr;
/*
* Flush data cache before disabling the MMU. While the MMU is disabled, all
* accesses are treated as uncached device memory.
*/
rtems_cache_flush_entire_data();
/* Disable MMU */
sctlr = _AArch64_Read_sctlr_el1();
sctlr &= ~(AARCH64_SCTLR_EL1_M);
_AArch64_Write_sctlr_el1( sctlr );
}
BSP_START_TEXT_SECTION static inline void aarch64_mmu_setup( void )
{
/* Set TCR */
/* 256TB/48 bits mappable (64-0x10) */
_AArch64_Write_tcr_el1(
AARCH64_TCR_EL1_T0SZ( 0x10 ) | AARCH64_TCR_EL1_IRGN0( 0x1 ) |
AARCH64_TCR_EL1_ORGN0( 0x1 ) | AARCH64_TCR_EL1_SH0( 0x3 ) |
AARCH64_TCR_EL1_TG0( 0x0 ) | AARCH64_TCR_EL1_IPS( 0x5ULL ) |
AARCH64_TCR_EL1_EPD1
);
/* Set MAIR */
_AArch64_Write_mair_el1(
AARCH64_MAIR_EL1_ATTR0( 0x0 ) | AARCH64_MAIR_EL1_ATTR1( 0x4 ) |
AARCH64_MAIR_EL1_ATTR2( 0x44 ) | AARCH64_MAIR_EL1_ATTR3( 0xFF )
);
}
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_AARCH64_MMU_H */

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@@ -1,86 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsLinkerSymbolsAArch64
*
* @brief This header file provides interfaces to AArch64-specific linker
* symbols and sections.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H
#define LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup RTEMSBSPsLinkerSymbolsAArch64 AArch64 Linker Symbols
*
* @ingroup RTEMSBSPsLinkerSymbols
*
* @brief This group provides support for AArch64-specific linker symbols and
* sections.
*
* @{
*/
#ifndef ASM
#define LINKER_SYMBOL(sym) extern char sym [];
#else
#define LINKER_SYMBOL(sym) .extern sym
#endif
LINKER_SYMBOL(bsp_stack_exception_size)
LINKER_SYMBOL(bsp_stack_hyp_size)
LINKER_SYMBOL(bsp_section_vector_begin)
LINKER_SYMBOL(bsp_section_vector_end)
LINKER_SYMBOL(bsp_section_vector_size)
LINKER_SYMBOL(bsp_vector_table_begin)
LINKER_SYMBOL(bsp_vector_table_end)
LINKER_SYMBOL(bsp_vector_table_size)
LINKER_SYMBOL(bsp_start_vector_table_begin)
LINKER_SYMBOL(bsp_start_vector_table_end)
LINKER_SYMBOL(bsp_start_vector_table_size)
LINKER_SYMBOL(bsp_translation_table_base)
LINKER_SYMBOL(bsp_translation_table_end)
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H */

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@@ -1,184 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_start
*
* @brief Aarch64 system low level start.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_START_H
#define LIBBSP_AARCH64_SHARED_START_H
#include <string.h>
#include <bsp/linker-symbols.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup aarch64_start System Start
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief Aarch64 system low level start.
*
* @{
*/
#define BSP_START_TEXT_SECTION __attribute__((section(".bsp_start_text")))
#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data")))
/**
* @brief System start entry.
*/
void _start(void);
/**
* @brief Start entry hook 0.
*
* This hook will be called from the start entry code after all modes and
* stack pointers are initialized but before the copying of the exception
* vectors.
*/
void bsp_start_hook_0(void);
/**
* @brief Start entry hook 1.
*
* This hook will be called from the start entry code after copying of the
* exception vectors but before the call to boot_card().
*/
void bsp_start_hook_1(void);
BSP_START_TEXT_SECTION static inline void
bsp_start_memcpy_libc(void *dest, const void *src, size_t n)
{
if (dest != src) {
memcpy(dest, src, n);
}
}
/**
* @brief Copies all standard sections from the load to the runtime area.
*/
BSP_START_TEXT_SECTION static inline void bsp_start_copy_sections(void)
{
/* Copy .text section */
bsp_start_memcpy_libc(
(int *) bsp_section_text_begin,
(const int *) bsp_section_text_load_begin,
(size_t) bsp_section_text_size
);
/* Copy .rodata section */
bsp_start_memcpy_libc(
(int *) bsp_section_rodata_begin,
(const int *) bsp_section_rodata_load_begin,
(size_t) bsp_section_rodata_size
);
/* Copy .data section */
bsp_start_memcpy_libc(
(int *) bsp_section_data_begin,
(const int *) bsp_section_data_load_begin,
(size_t) bsp_section_data_size
);
/* Copy .fast_text section */
bsp_start_memcpy_libc(
(int *) bsp_section_fast_text_begin,
(const int *) bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
/* Copy .fast_data section */
bsp_start_memcpy_libc(
(int *) bsp_section_fast_data_begin,
(const int *) bsp_section_fast_data_load_begin,
(size_t) bsp_section_fast_data_size
);
}
/**
* @brief Copies the .data, .fast_text and .fast_data sections from the load to
* the runtime area using the C library memcpy().
*
* Works only in case the .start, .text and .rodata sections reside in one
* memory region.
*/
BSP_START_TEXT_SECTION static inline void bsp_start_copy_sections_compact(void)
{
/* Copy .data section */
bsp_start_memcpy_libc(
bsp_section_data_begin,
bsp_section_data_load_begin,
(size_t) bsp_section_data_size
);
/* Copy .fast_text section */
bsp_start_memcpy_libc(
bsp_section_fast_text_begin,
bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
/* Copy .fast_data section */
bsp_start_memcpy_libc(
bsp_section_fast_data_begin,
bsp_section_fast_data_load_begin,
(size_t) bsp_section_fast_data_size
);
}
BSP_START_TEXT_SECTION static inline void bsp_start_clear_bss(void)
{
memset(bsp_section_bss_begin, 0, (size_t) bsp_section_bss_size);
}
BSP_START_TEXT_SECTION static inline void
AArch64_start_set_vector_base(void)
{
__asm__ volatile (
"msr VBAR_EL1, %[vtable]\n"
: : [vtable] "r" (bsp_start_vector_table_begin)
);
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_START_H */

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@@ -1,88 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup DevIRQGIC
*
* @brief This header file provides interfaces of the ARM Generic Interrupt
* Controller (GIC) support specific to the AArch64 architecture.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_DEV_IRQ_ARM_GIC_AARCH64_H
#define _RTEMS_DEV_IRQ_ARM_GIC_AARCH64_H
#include <rtems/score/cpu.h>
#include <rtems/score/cpu_irq.h>
#include <bsp/irq-generic.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup DevIRQGIC
*
* @{
*/
static inline uint32_t arm_interrupt_enable_interrupts(void)
{
uint32_t status = _CPU_ISR_Get_level();
/* Enable interrupts for nesting */
_CPU_ISR_Set_level(0);
return status;
}
static inline void arm_interrupt_restore_interrupts(uint32_t status)
{
/* Restore interrupts to previous level */
_CPU_ISR_Set_level(status);
}
static inline void arm_interrupt_facility_set_exception_handler(void)
{
AArch64_set_exception_handler(
AARCH64_EXCEPTION_SPx_IRQ,
_AArch64_Exception_interrupt_no_nest
);
AArch64_set_exception_handler(
AARCH64_EXCEPTION_SP0_IRQ,
_AArch64_Exception_interrupt_nest
);
}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* _RTEMS_DEV_IRQ_ARM_GIC_AARCH64_H */

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@@ -1,176 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
* Copyright (C) 2023 Utkarsh Verma
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/bspIo.h>
#include <bsp.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/irq.h>
#include <bsp/console.h>
#include <bsp/fatal.h>
#include <bsp/rpi-gpio.h>
#include <bspopts.h>
#include <rtems/console.h>
#include <rtems/rtems/status.h>
#include <rtems/termiosdevice.h>
#include <stdint.h>
#define CONSOLE_DEVICE_CONTEXT_NAME(port_no) uart##port_no##_context
#define CONSOLE_DEVICE_CONTEXT( \
port_no, _file_name, regs_base, _size, clock_freq, irq_no, \
context_type, ... \
) \
static context_type CONSOLE_DEVICE_CONTEXT_NAME(port_no) = { \
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART" #port_no), \
.regs = (volatile arm_pl011_uart *) regs_base, \
.clock = clock_freq, \
.initial_baud = 115200, \
.irq = irq_no, \
};
#define CONSOLE_DEVICE( \
port_no, file_name, _base, _size, _clock, _irq,_context_type, dev_handler, \
write_char_func, rx_pin, tx_pin, gpio_func, ... \
) \
[CONSOLE_DEVICE_PORT2ENUM(port_no)] = { \
.file = file_name, \
.context = &CONSOLE_DEVICE_CONTEXT_NAME(port_no).base, \
.gpio = {.rx = rx_pin, .tx = tx_pin, .function = gpio_func}, \
.handler = dev_handler, \
.write_char_polled = write_char_func, \
},
typedef struct {
const unsigned int rx;
const unsigned int tx;
const raspberrypi_gpio_function function;
} raspberrypi_console_device_gpio_config;
typedef struct {
const char* file;
rtems_termios_device_context* context;
const raspberrypi_console_device_gpio_config gpio;
const rtems_termios_device_handler* handler;
void (*write_char_polled)(rtems_termios_device_context*, char);
} raspberrypi_console_device;
/* Initialize all console device contexts */
CONSOLE_DEVICES(CONSOLE_DEVICE_CONTEXT)
/* Initialize all device configurations */
static const raspberrypi_console_device devices[CONSOLE_DEVICE_COUNT] = {
CONSOLE_DEVICES(CONSOLE_DEVICE)
};
static rtems_status_code console_device_init_gpio(
const raspberrypi_console_device_gpio_config *gpio
)
{
rtems_status_code status = raspberrypi_gpio_set_function(
gpio->rx,
gpio->function
);
if (status != RTEMS_SUCCESSFUL)
return status;
status = raspberrypi_gpio_set_function(gpio->tx, gpio->function);
if (status != RTEMS_SUCCESSFUL)
return status;
status = raspberrypi_gpio_set_pull(gpio->rx, GPIO_PULL_NONE);
if (status != RTEMS_SUCCESSFUL)
return status;
status = raspberrypi_gpio_set_pull(gpio->tx, GPIO_PULL_NONE);
return status;
}
static void output_char(const char ch) {
const raspberrypi_console_device* device = &devices[BSP_CONSOLE_PORT];
device->write_char_polled(device->context, ch);
}
static int poll_char(void) {
const raspberrypi_console_device* device = &devices[BSP_CONSOLE_PORT];
return device->handler->poll_read(device->context);
}
rtems_status_code raspberrypi_uart_init(
raspberrypi_console_device_port uart_num
)
{
const raspberrypi_console_device *device = &devices[uart_num];
rtems_status_code status = console_device_init_gpio(&device->gpio);
if (status != RTEMS_SUCCESSFUL) {
return status;
}
status = rtems_termios_device_install(
device->file, device->handler, NULL, device->context
);
return status;
}
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
const raspberrypi_console_device* device = &devices[BSP_CONSOLE_PORT];
rtems_status_code status = raspberrypi_uart_init(BSP_CONSOLE_PORT);
if (status != RTEMS_SUCCESSFUL) {
bsp_fatal(BSP_FATAL_CONSOLE_INSTALL_0);
}
rtems_termios_initialize();
if (link(device->file, CONSOLE_DEVICE_NAME) != 0) {
bsp_fatal(BSP_FATAL_CONSOLE_INSTALL_1);
}
return RTEMS_SUCCESSFUL;
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = poll_char;

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@@ -1,110 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief GPIO Driver
*/
/*
* Copyright (C) 2023 Utkarsh Verma
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/rtems/status.h>
#include <stdint.h>
#include <bsp/rpi-gpio.h>
#include <bsp/raspberrypi.h>
#define BSP_GPIO_BASE BCM2711_GPIO_BASE
#define BSP_GPIO_SIZE BCM2711_GPIO_SIZE
#define BSP_GPIO_PIN_COUNT BCM2711_GPIO_PIN_COUNT
#define GPFSEL0 BCM2835_REG(BSP_GPIO_BASE + 0x00)
#define GPSET0 BCM2835_REG(BSP_GPIO_BASE + 0x1c)
#define GPCLR0 BCM2835_REG(BSP_GPIO_BASE + 0x28)
#define GPIO_PUP_PDN_CTRL_REG0 BCM2835_REG(BSP_GPIO_BASE + 0xe4)
#define FSELn_SIZE 3
#define CLRn_SIZE 1
#define SETn_SIZE 1
#define REG_SET 1
static rtems_status_code raspberrypi_gpio_set_reg(
volatile uint32_t *base_reg,
const unsigned int pin,
const uint32_t value,
const unsigned int field_size
)
{
unsigned int field_mask, n_fields, shift, tmp;
volatile uint32_t *reg;
if (pin > BSP_GPIO_PIN_COUNT)
return RTEMS_INVALID_NUMBER;
field_mask = (1 << field_size) - 1;
if (value > field_mask)
return RTEMS_INVALID_NUMBER;
/* GPIO registers are uniformly subdivided */
n_fields = sizeof(uint32_t) * 8 / field_size;
/* Registers are sequentially mapped for each `n_field` GPIOs */
reg = base_reg + pin / n_fields;
shift = (pin % n_fields) * field_size;
tmp = *reg;
tmp &= ~(field_mask << shift); /* Clear the field */
tmp |= value << shift; /* Set value to the field */
*reg = tmp;
return RTEMS_SUCCESSFUL;
}
rtems_status_code raspberrypi_gpio_set_function(
const unsigned int pin,
const raspberrypi_gpio_function value
)
{
return raspberrypi_gpio_set_reg(&GPFSEL0, pin, value, FSELn_SIZE);
}
rtems_status_code raspberrypi_gpio_clear_pin(const unsigned int pin)
{
return raspberrypi_gpio_set_reg(&GPCLR0, pin, REG_SET, CLRn_SIZE);
}
rtems_status_code raspberrypi_gpio_set_pin(const unsigned int pin)
{
return raspberrypi_gpio_set_reg(&GPSET0, pin, REG_SET, SETn_SIZE);
}
rtems_status_code raspberrypi_gpio_set_pull(
const unsigned int pin,
const raspberrypi_gpio_pull value
)
{
return raspberrypi_gpio_set_reg(&GPIO_PUP_PDN_CTRL_REG0, pin, value, 2);
}

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@@ -1,73 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief Core BSP definitions
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H
#define LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
/*Raspberry pi MMU initialization */
BSP_START_TEXT_SECTION void raspberrypi_4_setup_mmu_and_cache(void);
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0xFF842000
#define BSP_ARM_GIC_DIST_BASE 0xFF841000
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_RASPBERRYPI_4_BSP_H */

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@@ -1,71 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2023 Utkarsh Verma
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_CONSOLE_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_CONSOLE_H
#include <bspopts.h>
#include <bsp/raspberrypi-uart.h>
#define CONSOLE_DEVICES RASPBERRYPI_CONSOLE_DEVICES
#define CONSOLE_DEVICE_PORT2ENUM(port_no) UART##port_no
#define CONSOLE_DEVICE_ENUM(port_no, ...) CONSOLE_DEVICE_PORT2ENUM(port_no),
typedef enum {
CONSOLE_DEVICES(CONSOLE_DEVICE_ENUM)
CONSOLE_DEVICE_COUNT,
} raspberrypi_console_device_port;
/**
* @brief Initialize gpio of UART and install UART to the dev directory.
*
* @param uart_num The optional devices are UART0, UART2, UART3, UART4, UART5.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
* @retval RTEMS_NO_MEMORY Not enough memory to create a device node.
* @retval RTEMS_UNSATISFIED Creation of the device file failed.
* @retval RTEMS_INCORRECT_STATE Termios is not initialized.
*/
rtems_status_code raspberrypi_uart_init(
raspberrypi_console_device_port uart_num
);
#undef CONSOLE_DEVICE_ENUM
#endif /* LIBBSP_AARCH64_RASPBERRYPI_BSP_CONSOLE_H */

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@@ -1,93 +0,0 @@
/**
* @file
*
* @ingroup raspberrypi_interrupt
*
* @brief Interrupt definitions.
*/
/**
* Copyright (c) 2013 Alan Cudmore
* Copyright (c) 2022 Mohd Noor Aman
* Copyright (c) 2024 Ning Yang
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.org/license/LICENSE
*
*/
#ifndef LIBBSP_ARM_RASPBERRYPI_IRQ_H
#define LIBBSP_ARM_RASPBERRYPI_IRQ_H
#ifndef ASM
#include <rtems.h>
#include <dev/irq/arm-gic-irq.h>
/**
* @defgroup raspberrypi_interrupt Interrrupt Support
*
* @ingroup RTEMSBSPsARMRaspberryPi
*
* @brief Interrupt support.
*/
#define BCM2835_INTC_TOTAL_IRQ 216
#define BCM2835_IRQ_SET1_MIN 0
#define BCM2835_IRQ_SET2_MIN 32
#define BCM2711_IRQ_VC_PERIPHERAL_BASE 96
/* Interrupt Vectors: System Timer */
#define BCM2835_IRQ_ID_GPU_TIMER_M0 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 0)
#define BCM2835_IRQ_ID_GPU_TIMER_M1 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 1)
#define BCM2835_IRQ_ID_GPU_TIMER_M2 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 2)
#define BCM2835_IRQ_ID_GPU_TIMER_M3 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 3)
/* Interrupt Vectors: SPI */
#define BCM2711_IRQ_SPI (BCM2711_IRQ_VC_PERIPHERAL_BASE + 54)
/* Interrupt Vectors: Videocore */
#define BCM2711_IRQ_VC_PERIPHERAL_BASE 96
#define BCM2711_IRQ_AUX (BCM2711_IRQ_VC_PERIPHERAL_BASE + 29)
#define BCM2711_IRQ_PL011_UART (BCM2711_IRQ_VC_PERIPHERAL_BASE + 57)
#define BCM2835_IRQ_ID_USB 9
#define BCM2835_IRQ_ID_AUX 29
#define BCM2835_IRQ_ID_SPI_SLAVE 43
#define BCM2835_IRQ_ID_PWA0 45
#define BCM2835_IRQ_ID_PWA1 46
#define BCM2835_IRQ_ID_SMI 48
#define BCM2835_IRQ_ID_GPIO_0 49
#define BCM2835_IRQ_ID_GPIO_1 50
#define BCM2835_IRQ_ID_GPIO_2 51
#define BCM2835_IRQ_ID_GPIO_3 52
#define BCM2835_IRQ_ID_I2C 53
#define BCM2835_IRQ_ID_SPI 54
#define BCM2835_IRQ_ID_PCM 55
#define BCM2835_IRQ_ID_UART 57
#define BCM2835_IRQ_ID_SD 62
#define BCM2835_IRQ_ID_BASIC_BASE_ID 64
#define BCM2835_IRQ_ID_TIMER_0 64
#define BCM2835_IRQ_ID_MAILBOX_0 65
#define BCM2835_IRQ_ID_DOORBELL_0 66
#define BCM2835_IRQ_ID_DOORBELL_1 67
#define BCM2835_IRQ_ID_GPU0_HALTED 68
#define BCM2835_IRQ_ID_GPU1_HALTED 69
#define BCM2835_IRQ_ID_ILL_ACCESS_1 70
#define BCM2835_IRQ_ID_ILL_ACCESS_0 71
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
#define BSP_VPL011_SPI 32
#define BSP_INTERRUPT_VECTOR_COUNT BCM2835_INTC_TOTAL_IRQ
#define BSP_INTERRUPT_VECTOR_INVALID (UINT32_MAX)
#define BSP_IRQ_COUNT (BCM2835_INTC_TOTAL_IRQ)
#endif /* ASM */
#endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */

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@@ -1,122 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup raspberrypi_4_spi
*
* @brief Raspberry Pi specific SPI definitions.
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H
#define LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H
#include <bsp/utility.h>
#include <bsp/rpi-gpio.h>
typedef struct
{
uint32_t spics;
#define RPI_SPICS_LEN_LONG BSP_BIT32(25)
#define RPI_SPICS_DMA_LEN BSP_BIT32(24)
#define RPI_SPICS_CSPOL2 BSP_BIT32(23)
#define RPI_SPICS_CSPOL1 BSP_BIT32(22)
#define RPI_SPICS_CSPOL0 BSP_BIT32(21)
#define RPI_SPICS_RXF BSP_BIT32(20)
#define RPI_SPICS_RXR BSP_BIT32(19)
#define RPI_SPICS_TXD BSP_BIT32(18)
#define RPI_SPICS_RXD BSP_BIT32(17)
#define RPI_SPICS_DONE BSP_BIT32(16)
#define RPI_SPICS_LEN BSP_BIT32(13)
#define RPI_SPICS_REN BSP_BIT32(12)
#define RPI_SPICS_ADCS BSP_BIT32(11)
#define RPI_SPICS_INTR BSP_BIT32(10)
#define RPI_SPICS_INTD BSP_BIT32(9)
#define RPI_SPICS_DMAEN BSP_BIT32(8)
#define RPI_SPICS_TA BSP_BIT32(7)
#define RPI_SPICS_CSPOL BSP_BIT32(6)
#define RPI_SPICS_CLEAR_TX BSP_BIT32(5)
#define RPI_SPICS_CLEAR_RX BSP_BIT32(4)
#define RPI_SPICS_CPOL BSP_BIT32(3)
#define RPI_SPICS_CPHA BSP_BIT32(2)
#define RPI_SPICS_CS(val) BSP_FLD32(val, 0, 1)
#define RPI_SPICS_CS_SET(reg,val) BSP_FLD32SET(reg, val, 0, 1)
uint32_t spififo;
#define RPI_SPIFIFO_DATA(val) BSP_FLD32(val, 0, 31)
#define RPI_SPIFIFO_DATA_GET(reg) BSP_FLD32GET(reg, 0, 31)
#define RPI_SPIFIFO_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 31)
uint32_t spiclk;
#define RPI_SPICLK_CDIV(val) BSP_FLD32(val, 0, 15)
#define RPI_SPICLK_CDIV_GET(reg) BSP_FLD32GET(reg, 0, 15)
#define RPI_SPICLK_CDIV_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
uint32_t spidlen;
#define RPI_SPIDLEN_LEN(val) BSP_FLD32(val, 0, 15)
#define RPI_SPIDLEN_LEN_GET(reg) BSP_FLD32GET(reg, 0, 15)
#define RPI_SPIDLEN_LEN_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
uint32_t spiltoh;
#define RPI_SPILTOH_TOH(val) BSP_FLD32(val, 0, 3)
#define RPI_SPILTOH_TOH_GET(reg) BSP_FLD32GET(reg, 0, 3)
#define RPI_SPILTOH_TOH_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
uint32_t spidc;
#define RPI_SPIDC_RPANIC(val) BSP_FLD32(val, 24, 31)
#define RPI_SPIDC_RPANIC_GET(reg) BSP_FLD32GET(reg, 24, 31)
#define RPI_SPIDC_RPANIC_SET(reg, val) BSP_FLD32SET(reg, val, 24, 31)
#define RPI_SPIDC_RDREQ(val) BSP_FLD32(val, 16, 23)
#define RPI_SPIDC_RDREQ_GET(reg) BSP_FLD32GET(reg, 16, 23)
#define RPI_SPIDC_RDREQ_SET(reg, val) BSP_FLD32SET(reg, val, 16, 23)
#define RPI_SPIDC_TPANIC(val) BSP_FLD32(val, 8, 15)
#define RPI_SPIDC_TPANIC_GET(reg) BSP_FLD32GET(reg, 8, 15)
#define RPI_SPIDC_TPANIC_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
#define RPI_SPIDC_TDREQ(val) BSP_FLD32(val, 0, 7)
#define RPI_SPIDC_TDREQ_GET(reg) BSP_FLD32GET(reg, 0, 7)
#define RPI_SPIDC_TDREQ_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
} raspberrypi_spi;
typedef enum {
raspberrypi_SPI0,
raspberrypi_SPI3,
raspberrypi_SPI4,
raspberrypi_SPI5,
raspberrypi_SPI6
} raspberrypi_spi_device;
/**
* @brief Register a spi device.
*
* @param device The optional devices are raspberrypi_SPI0, raspberrypi_SPI3,
* raspberrypi_SPI4, raspberrypi_SPI5, raspberrypi_SPI6.
*
* @retval RTEMS_SUCCESSFUL Successfully registered SPI device.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
* @retval RTEMS_UNSATISFIED This status code indicates that the request was
* not satisfied.
*/
rtems_status_code raspberrypi_spi_init(raspberrypi_spi_device device);
#endif /* LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H */

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@@ -1,72 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Raspberry Pi 4B Console Device Definitions
*/
/*
* Copyright (C) 2023 Utkarsh Verma
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_RASPBERRYPI_UART_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_RASPBERRYPI_UART_H
#include <bspopts.h>
#include <bsp/irq.h>
#include <bsp/raspberrypi.h>
#include <bsp/rpi-gpio.h>
#include <dev/serial/arm-pl011.h>
/*
* This macro exists to serve as a common point of definition for the
* parameters of the UARTs present in the Raspberry Pi 4. It is used in
* multiple locations with different rendering macros to prevent duplication
* of information.
*/
#define RASPBERRYPI_CONSOLE_DEVICES(CONSOLE_DEVICE_DEFINITION_RENDERER) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
0, "/dev/ttyAMA0", BCM2711_UART0_BASE,BCM2711_UART0_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 15, 14, GPIO_AF0) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
2, "/dev/ttyAMA1", BCM2711_UART2_BASE, BCM2711_UART2_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 1, 0, GPIO_AF4) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
3, "/dev/ttyAMA2", BCM2711_UART3_BASE, BCM2711_UART3_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 5, 4, GPIO_AF4) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
4, "/dev/ttyAMA3", BCM2711_UART4_BASE, BCM2711_UART4_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 9, 8, GPIO_AF4) \
CONSOLE_DEVICE_DEFINITION_RENDERER( \
5, "/dev/ttyAMA4", BCM2711_UART5_BASE, BCM2711_UART5_SIZE, \
BSP_PL011_CLOCK_FREQ, BCM2711_IRQ_PL011_UART, arm_pl011_context, \
&arm_pl011_fns, arm_pl011_write_polled, 13, 12, GPIO_AF4)
#endif /* LIBBSP_AARCH64_RASPBERRYPI_BSP_RASPBERRYPI_UART_H */

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@@ -1,527 +0,0 @@
/**
* @file
*
* @ingroup raspberrypi_4_regs
*
* @brief Register definitions.
*/
/*
* Copyright (c) 2022 Mohd Noor Aman
* Copyright (c) 2024 Ning Yang
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.org/license/LICENSE
*
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_RASPBERRYPI_4_H
#define LIBBSP_AARCH64_RASPBERRYPI_RASPBERRYPI_4_H
#include <bspopts.h>
#include <stdint.h>
#include <bsp/utility.h>
/**
* @defgroup raspberrypi_reg Register Definitions
*
* @ingroup RTEMSBSPsARMRaspberryPi
*
* @brief Register Definitions
*
* @{
*/
/**
* @name Register Macros
*
* @{
*/
#define BCM2711_REG(x) (*(volatile uint64_t *)(x))
#define BCM2711_BIT(n) (1 << (n))
#define BCM2835_REG(addr) (*(volatile uint32_t*)(addr))
/** @} */
/**
* @name Peripheral Base Register Address
*
* @{
*/
#define RPI_PERIPHERAL_BASE 0xFE000000
#define BASE_OFFSET 0xFE000000
#define RPI_PERIPHERAL_SIZE 0x01800000
/**
* @name Bus to Physical address translation
* Macro.
* @{
*/
#define BUS_TO_PHY(x) ((x) - BASE_OFFSET)
/** @} */
/**
* @name Internal ARM Timer Registers
*
* @{
*/
#define BCM2711_CLOCK_FREQ 250000000
#define BCM2711_TIMER_BASE (RPI_PERIPHERAL_BASE + 0xB400)
#define BCM2711_TIMER_LOD (BCM2711_TIMER_BASE + 0x00)
#define BCM2711_TIMER_VAL (BCM2711_TIMER_BASE + 0x04)
#define BCM2711_TIMER_CTL (BCM2711_TIMER_BASE + 0x08)
#define BCM2711_TIMER_CLI (BCM2711_TIMER_BASE + 0x0C)
#define BCM2711_TIMER_RIS (BCM2711_TIMER_BASE + 0x10)
#define BCM2711_TIMER_MIS (BCM2711_TIMER_BASE + 0x14)
#define BCM2711_TIMER_RLD (BCM2711_TIMER_BASE + 0x18)
#define BCM2711_TIMER_DIV (BCM2711_TIMER_BASE + 0x1C)
#define BCM2711_TIMER_CNT (BCM2711_TIMER_BASE + 0x20)
#define BCM2711_TIMER_PRESCALE 0xF9
/** @} */
/**
* @name Power Management and Watchdog Registers
*
* @{
*/
#define BCM2711_PM_PASSWD_MAGIC 0x5a000000
#define BCM2711_PM_BASE (RPI_PERIPHERAL_BASE + 0x100000)
#define BCM2711_PM_GNRIC (BCM2711_PM_BASE + 0x00)
#define BCM2711_PM_GNRIC_POWUP 0x00000001
#define BCM2711_PM_GNRIC_POWOK 0x00000002
#define BCM2711_PM_GNRIC_ISPOW 0x00000004
#define BCM2711_PM_GNRIC_MEMREP 0x00000008
#define BCM2711_PM_GNRIC_MRDONE 0x00000010
#define BCM2711_PM_GNRIC_ISFUNC 0x00000020
#define BCM2711_PM_GNRIC_RSTN 0x00000fc0
#define BCM2711_PM_GNRIC_ENAB 0x00001000
#define BCM2711_PM_GNRIC_CFG 0x007f0000
#define BCM2711_PM_AUDIO (BCM2711_PM_BASE + 0x04)
#define BCM2711_PM_AUDIO_APSM 0x000fffff
#define BCM2711_PM_AUDIO_CTRLEN 0x00100000
#define BCM2711_PM_AUDIO_RSTN 0x00200000
#define BCM2711_PM_STATUS (BCM2711_PM_BASE + 0x18)
#define BCM2711_PM_RSTC (BCM2711_PM_BASE + 0x1c)
#define BCM2711_PM_RSTC_DRCFG 0x00000003
#define BCM2711_PM_RSTC_WRCFG 0x00000030
#define BCM2711_PM_RSTC_WRCFG_FULL 0x00000020
#define BCM2711_PM_RSTC_WRCFG_CLR 0xffffffcf
#define BCM2711_PM_RSTC_SRCFG 0x00000300
#define BCM2711_PM_RSTC_QRCFG 0x00003000
#define BCM2711_PM_RSTC_FRCFG 0x00030000
#define BCM2711_PM_RSTC_HRCFG 0x00300000
#define BCM2711_PM_RSTC_RESET 0x00000102
#define BCM2711_PM_RSTS (BCM2711_PM_BASE + 0x20)
#define BCM2711_PM_RSTS_HADDRQ 0x00000001
#define BCM2711_PM_RSTS_HADDRF 0x00000002
#define BCM2711_PM_RSTS_HADDRH 0x00000004
#define BCM2711_PM_RSTS_HADWRQ 0x00000010
#define BCM2711_PM_RSTS_HADWRF 0x0000002
#define BCM2711_PM_RSTS_HADWRH 0x00000040
#define BCM2711_PM_RSTS_HADSRQ 0x00000100
#define BCM2711_PM_RSTS_HADSRF 0x00000200
#define BCM2711_PM_RSTS_HADSRH 0x00000400
#define BCM2711_PM_RSTS_HADPOR 0x00001000
#define BCM2711_PM_WDOG (BCM2711_PM_BASE + 0x24)
#define BCM2711_PM_WDOG_MASK 0x000fffff
/** @} */
/** @} */
/**
* @name AUX Registers
*
* @{
*/
#define BCM2711_AUX_BASE (RPI_PERIPHERAL_BASE + 0x215000)
#define AUX_ENABLES (BCM2711_AUX_BASE + 0x04)
#define AUX_MU_IO_REG (BCM2711_AUX_BASE + 0x40)
#define AUX_MU_IER_REG (BCM2711_AUX_BASE + 0x44)
#define AUX_MU_IIR_REG (BCM2711_AUX_BASE + 0x48)
#define AUX_MU_LCR_REG (BCM2711_AUX_BASE + 0x4C)
#define AUX_MU_MCR_REG (BCM2711_AUX_BASE + 0x50)
#define AUX_MU_LSR_REG (BCM2711_AUX_BASE + 0x54)
#define AUX_MU_MSR_REG (BCM2711_AUX_BASE + 0x58)
#define AUX_MU_SCRATCH (BCM2711_AUX_BASE + 0x5C)
#define AUX_MU_CNTL_REG (BCM2711_AUX_BASE + 0x60)
#define AUX_MU_STAT_REG (BCM2711_AUX_BASE + 0x64)
#define AUX_MU_BAUD_REG (BCM2711_AUX_BASE + 0x68)
/** @} */
/**
* @name PL011 UARTs
*
* @{
*/
#define BCM2711_PL011_BASE (RPI_PERIPHERAL_BASE + 0x201000)
#define BCM2711_PL011_SIZE 0xc00
#define BCM2711_PL011_DEVICE_SIZE 0x200
#define BCM2711_UART0_BASE (BCM2711_PL011_BASE + 0x000)
#define BCM2711_UART0_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART2_BASE (BCM2711_PL011_BASE + 0x400)
#define BCM2711_UART2_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART3_BASE (BCM2711_PL011_BASE + 0x600)
#define BCM2711_UART3_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART4_BASE (BCM2711_PL011_BASE + 0x800)
#define BCM2711_UART4_SIZE BCM2711_PL011_DEVICE_SIZE
#define BCM2711_UART5_BASE (BCM2711_PL011_BASE + 0xa00)
#define BCM2711_UART5_SIZE BCM2711_PL011_DEVICE_SIZE
/** @} */
/**
* @name GPU Timer Registers
*
* @{
*/
/**
* NOTE: The GPU uses Compare registers 0 and 2 for
* it's own RTOS. 1 and 3 are available for use in
* RTEMS.
*/
#define BCM2711_GPU_TIMER_BASE (RPI_PERIPHERAL_BASE + 0x3000)
#define BCM2711_GPU_TIMER_CS (BCM2711_GPU_TIMER_BASE + 0x00)
#define BCM2711_GPU_TIMER_CS_M0 0x00000001
#define BCM2711_GPU_TIMER_CS_M1 0x00000002
#define BCM2711_GPU_TIMER_CS_M2 0x00000004
#define BCM2711_GPU_TIMER_CS_M3 0x00000008
#define BCM2711_GPU_TIMER_CLO (BCM2711_GPU_TIMER_BASE + 0x04)
#define BCM2711_GPU_TIMER_CHI (BCM2711_GPU_TIMER_BASE + 0x08)
#define BCM2711_GPU_TIMER_C0 (BCM2711_GPU_TIMER_BASE + 0x0C)
#define BCM2711_GPU_TIMER_C1 (BCM2711_GPU_TIMER_BASE + 0x10)
#define BCM2711_GPU_TIMER_C2 (BCM2711_GPU_TIMER_BASE + 0x14)
#define BCM2711_GPU_TIMER_C3 (BCM2711_GPU_TIMER_BASE + 0x18)
/**
* NOTE: compatible with the BCM2835 system timer
*/
#define BCM2835_GPU_TIMER_CS_M3 BCM2711_GPU_TIMER_CS_M3
#define BCM2835_GPU_TIMER_C3 BCM2711_GPU_TIMER_C3
#define BCM2835_GPU_TIMER_CLO BCM2711_GPU_TIMER_CLO
#define BCM2835_GPU_TIMER_CS BCM2711_GPU_TIMER_CS
/** @} */
/**
* @name GPIO Registers
*
* @{
*/
#define BCM2711_GPIO_BASE (RPI_PERIPHERAL_BASE + 0x200000)
#define BCM2711_GPIO_SIZE 0xf4
#define BCM2711_GPIO_PIN_COUNT 58
/** @} */
/**
* @name EMMC Registers
*
* @{
*/
/**
* NOTE: Since the SD controller follows the SDHCI standard,
* the rtems-libbsd tree already provides the remaining registers.
*/
#define BCM2711_EMMC_BASE (RPI_PERIPHERAL_BASE + 0x300000)
/** @} */
/**
* @name SPI Registers
*
* @{
*/
#define BCM2711_SPI0_BASE (RPI_PERIPHERAL_BASE + 0x204000)
#define BCM2711_SPI3_BASE (RPI_PERIPHERAL_BASE + 0x204600)
#define BCM2711_SPI4_BASE (RPI_PERIPHERAL_BASE + 0x204800)
#define BCM2711_SPI5_BASE (RPI_PERIPHERAL_BASE + 0x204A00)
#define BCM2711_SPI6_BASE (RPI_PERIPHERAL_BASE + 0x204C00)
/** @} */
/**
* @name Mailbox Registers
*
* @{
*/
#define BCM2711_MBOX_BASE (RPI_PERIPHERAL_BASE+0xB880)
#define BCM2711_MBOX_READ (BCM2711_MBOX_BASE+0x00)
#define BCM2711_MBOX_PEEK (BCM2711_MBOX_BASE+0x10)
#define BCM2711_MBOX_SENDER (BCM2711_MBOX_BASE+0x14)
#define BCM2711_MBOX_STATUS (BCM2711_MBOX_BASE+0x18)
#define BCM2711_MBOX_WRITE (BCM2711_MBOX_BASE+0x20)
#define BCM2711_MBOX_CONFIG (BCM2711_MBOX_BASE+0x1C)
#define BCM2711_MBOX_RESPONSE 0x80000000
#define BCM2711_MBOX_FULL 0x80000000
#define BCM2711_MBOX_EMPTY 0x40000000
/** @} */
/**
* @name Mailbox Channels
*
* @{
*/
/* Power Manager channel */
#define BCM2711_MBOX_CHANNEL_PM 0
/* Framebuffer channel */
#define BCM2711_MBOX_CHANNEL_FB 1
/* Virtual UART channel */
#define BCM2711_MBOX_CHANNEL_VUART 2
/* VCHIQ channel */
#define BCM2711_MBOX_CHANNEL_VCHIQ 3
/* LEDs channel */
#define BCM2711_MBOX_CHANNEL_LED 4
/* Button channel */
#define BCM2711_MBOX_CHANNEL_BUTTON 5
/* Touch screen channel */
#define BCM2711_MBOX_CHANNEL_TOUCHS 6
#define BCM2711_MBOX_CHANNEL_COUNT 7
/* Property tags (ARM <-> VC) channel */
#define BCM2711_MBOX_CHANNEL_PROP_AVC 8
/* Property tags (VC <-> ARM) channel */
#define BCM2711_MBOX_CHANNEL_PROP_VCA 9
/** @} */
/**
* @name Raspberry Pi 2 Interrupt Register Defines
*
* @{
*/
/* Timers interrupt control registers */
#define BCM2711_CORE0_TIMER_IRQ_CTRL_BASE 0xFF800040
#define BCM2711_CORE1_TIMER_IRQ_CTRL_BASE 0xFF800044
#define BCM2711_CORE2_TIMER_IRQ_CTRL_BASE 0xFF800048
#define BCM2711_CORE3_TIMER_IRQ_CTRL_BASE 0xFF80004C
#define BCM2711_CORE_TIMER_IRQ_CTRL(cpuidx) \
(BCM2711_CORE0_TIMER_IRQ_CTRL_BASE + 0x4 * (cpuidx))
/**
* @name Raspberry Pi 4 ARM_LOCAL registers
*
* @{
*/
#define BCM2711_LOCAL_REGS_BASE 0x4C0000000
#define BCM2711_LOCAL_REGS_SIZE 0x100
#define BCM2711_LOCAL_ARM_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x00)
#define BCM2711_LOCAL_CORE_IRQ_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x0c)
#define BCM2711_LOCAL_PMU_CONTROL_SET (BCM2711_LOCAL_REGS_BASE + 0x10)
#define BCM2711_LOCAL_PMU_CONTROL_CLR (BCM2711_LOCAL_REGS_BASE + 0x14)
#define BCM2711_LOCAL_PERI_IRQ_ROUTE0 (BCM2711_LOCAL_REGS_BASE + 0x24)
#define BCM2711_LOCAL_AXI_QUIET_TIME (BCM2711_LOCAL_REGS_BASE + 0x30)
#define BCM2711_LOCAL_LOCAL_TIMER_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x34)
#define BCM2711_LOCAL_LOCAL_TIMER_IRQ (BCM2711_LOCAL_REGS_BASE + 0x38)
#define BCM2711_LOCAL_TIMER_CNTRL0 (BCM2711_LOCAL_REGS_BASE + 0x40)
#define BCM2711_LOCAL_TIMER_CNTRL1 (BCM2711_LOCAL_REGS_BASE + 0x44)
#define BCM2711_LOCAL_TIMER_CNTRL2 (BCM2711_LOCAL_REGS_BASE + 0x48)
#define BCM2711_LOCAL_TIMER_CNTRL3 (BCM2711_LOCAL_REGS_BASE + 0x4c)
#define BCM2711_LOCAL_MAILBOX_CNTRL0 (BCM2711_LOCAL_REGS_BASE + 0x50)
#define BCM2711_LOCAL_MAILBOX_CNTRL1 (BCM2711_LOCAL_REGS_BASE + 0x54)
#define BCM2711_LOCAL_MAILBOX_CNTRL2 (BCM2711_LOCAL_REGS_BASE + 0x58)
#define BCM2711_LOCAL_MAILBOX_CNTRL3 (BCM2711_LOCAL_REGS_BASE + 0x5c)
#define BCM2711_LOCAL_IRQ_SOURCE0 (BCM2711_LOCAL_REGS_BASE + 0x60)
#define BCM2711_LOCAL_IRQ_SOURCE1 (BCM2711_LOCAL_REGS_BASE + 0x64)
#define BCM2711_LOCAL_IRQ_SOURCE2 (BCM2711_LOCAL_REGS_BASE + 0x68)
#define BCM2711_LOCAL_IRQ_SOURCE3 (BCM2711_LOCAL_REGS_BASE + 0x6c)
#define BCM2711_LOCAL_FIQ_SOURCE0 (BCM2711_LOCAL_REGS_BASE + 0x70)
#define BCM2711_LOCAL_FIQ_SOURCE1 (BCM2711_LOCAL_REGS_BASE + 0x74)
#define BCM2711_LOCAL_FIQ_SOURCE2 (BCM2711_LOCAL_REGS_BASE + 0x78)
#define BCM2711_LOCAL_FIQ_SOURCE3 (BCM2711_LOCAL_REGS_BASE + 0x7c)
/**
* @name Raspberry Pi 4 Mailbox registers
*
* @{
*/
#define BCM2711_MAILBOX_00_WRITE_SET_BASE 0x4C000080
#define BCM2711_MAILBOX_01_WRITE_SET_BASE 0x4C000084
#define BCM2711_MAILBOX_02_WRITE_SET_BASE 0x4C000088
#define BCM2711_MAILBOX_03_WRITE_SET_BASE 0x4C00008C
#define BCM2711_MAILBOX_04_WRITE_SET_BASE 0x4C000090
#define BCM2711_MAILBOX_05_WRITE_SET_BASE 0x4C000094
#define BCM2711_MAILBOX_06_WRITE_SET_BASE 0x4C000098
#define BCM2711_MAILBOX_07_WRITE_SET_BASE 0x4C00009C
#define BCM2711_MAILBOX_08_WRITE_SET_BASE 0x4C0000A0
#define BCM2711_MAILBOX_09_WRITE_SET_BASE 0x4C0000A4
#define BCM2711_MAILBOX_10_WRITE_SET_BASE 0x4C0000A8
#define BCM2711_MAILBOX_11_WRITE_SET_BASE 0x4C0000AC
#define BCM2711_MAILBOX_12_WRITE_SET_BASE 0x4C0000B0
#define BCM2711_MAILBOX_13_WRITE_SET_BASE 0x4C0000B4
#define BCM2711_MAILBOX_14_WRITE_SET_BASE 0x4C0000B8
#define BCM2711_MAILBOX_15_WRITE_SET_BASE 0x4C0000BC
#define BCM2711_MAILBOX_00_READ_CLEAR_BASE 0x4C0000C0
#define BCM2711_MAILBOX_01_READ_CLEAR_BASE 0x4C0000C4
#define BCM2711_MAILBOX_02_READ_CLEAR_BASE 0x4C0000C8
#define BCM2711_MAILBOX_03_READ_CLEAR_BASE 0x4C0000CC
#define BCM2711_MAILBOX_04_READ_CLEAR_BASE 0x4C0000D0
#define BCM2711_MAILBOX_05_READ_CLEAR_BASE 0x4C0000D4
#define BCM2711_MAILBOX_06_READ_CLEAR_BASE 0x4C0000D8
#define BCM2711_MAILBOX_07_READ_CLEAR_BASE 0x4C0000DC
#define BCM2711_MAILBOX_08_READ_CLEAR_BASE 0x4C0000E0
#define BCM2711_MAILBOX_09_READ_CLEAR_BASE 0x4C0000E4
#define BCM2711_MAILBOX_10_READ_CLEAR_BASE 0x4C0000E8
#define BCM2711_MAILBOX_11_READ_CLEAR_BASE 0x4C0000EC
#define BCM2711_MAILBOX_12_READ_CLEAR_BASE 0x4C0000F0
#define BCM2711_MAILBOX_13_READ_CLEAR_BASE 0x4C0000F4
#define BCM2711_MAILBOX_14_READ_CLEAR_BASE 0x4C0000F8
#define BCM2711_MAILBOX_15_READ_CLEAR_BASE 0x4C0000FC
/**
* @name Raspberry Pi 4 ARM_C FIQ and IRQ registers
*
* @{
*/
#define BCM2711_ARMC_REGS_BASE (RPI_PERIPHERAL_BASE + 0xB200)
#define BCM2711_ARMC_REGS_SIZE 0x200
#define BCM2711_ARMC_IRQ0_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x00)
#define BCM2711_ARMC_IRQ0_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x04)
#define BCM2711_ARMC_IRQ0_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x08)
#define BCM2711_ARMC_IRQ0_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x10)
#define BCM2711_ARMC_IRQ0_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x14)
#define BCM2711_ARMC_IRQ0_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x18)
#define BCM2711_ARMC_IRQ0_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x20)
#define BCM2711_ARMC_IRQ0_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x24)
#define BCM2711_ARMC_IRQ0_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x28)
#define BCM2711_ARMC_IRQ_STATUS0 (BCM2711_ARMC_REGS_BASE + 0x30)
#define BCM2711_ARMC_IRQ_STATUS1 (BCM2711_ARMC_REGS_BASE + 0x34)
#define BCM2711_ARMC_IRQ_STATUS2 (BCM2711_ARMC_REGS_BASE + 0x38)
#define BCM2711_ARMC_IRQ1_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x40)
#define BCM2711_ARMC_IRQ1_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x44)
#define BCM2711_ARMC_IRQ1_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x48)
#define BCM2711_ARMC_IRQ1_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x50)
#define BCM2711_ARMC_IRQ1_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x54)
#define BCM2711_ARMC_IRQ1_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x58)
#define BCM2711_ARMC_IRQ1_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x60)
#define BCM2711_ARMC_IRQ1_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x64)
#define BCM2711_ARMC_IRQ1_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x68)
#define BCM2711_ARMC_IRQ2_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x80)
#define BCM2711_ARMC_IRQ2_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x84)
#define BCM2711_ARMC_IRQ2_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x88)
#define BCM2711_ARMC_IRQ2_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x90)
#define BCM2711_ARMC_IRQ2_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x94)
#define BCM2711_ARMC_IRQ2_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x98)
#define BCM2711_ARMC_IRQ2_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0xA0)
#define BCM2711_ARMC_IRQ2_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0xA4)
#define BCM2711_ARMC_IRQ2_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0xA8)
#define BCM2711_ARMC_IRQ3_PENDING0 (BCM2711_ARMC_REGS_BASE + 0xC0)
#define BCM2711_ARMC_IRQ3_PENDING1 (BCM2711_ARMC_REGS_BASE + 0xC4)
#define BCM2711_ARMC_IRQ3_PENDING2 (BCM2711_ARMC_REGS_BASE + 0xC8)
#define BCM2711_ARMC_IRQ3_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0xD0)
#define BCM2711_ARMC_IRQ3_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0xD4)
#define BCM2711_ARMC_IRQ3_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0xD8)
#define BCM2711_ARMC_IRQ3_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0xE0)
#define BCM2711_ARMC_IRQ3_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0xE4)
#define BCM2711_ARMC_IRQ3_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0xE8)
#define BCM2711_ARMC_FIQ0_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x100)
#define BCM2711_ARMC_FIQ0_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x104)
#define BCM2711_ARMC_FIQ0_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x108)
#define BCM2711_ARMC_FIQ0_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x110)
#define BCM2711_ARMC_FIQ0_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x114)
#define BCM2711_ARMC_FIQ0_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x118)
#define BCM2711_ARMC_FIQ0_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x120)
#define BCM2711_ARMC_FIQ0_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x124)
#define BCM2711_ARMC_FIQ0_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x128)
#define BCM2711_ARMC_FIQ1_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x140)
#define BCM2711_ARMC_FIQ1_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x144)
#define BCM2711_ARMC_FIQ1_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x148)
#define BCM2711_ARMC_FIQ1_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x150)
#define BCM2711_ARMC_FIQ1_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x154)
#define BCM2711_ARMC_FIQ1_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x158)
#define BCM2711_ARMC_FIQ1_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x160)
#define BCM2711_ARMC_FIQ1_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x164)
#define BCM2711_ARMC_FIQ1_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x168)
#define BCM2711_ARMC_FIQ2_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x180)
#define BCM2711_ARMC_FIQ2_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x184)
#define BCM2711_ARMC_FIQ2_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x188)
#define BCM2711_ARMC_FIQ2_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x190)
#define BCM2711_ARMC_FIQ2_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x194)
#define BCM2711_ARMC_FIQ2_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x198)
#define BCM2711_ARMC_FIQ2_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1A0)
#define BCM2711_ARMC_FIQ2_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1A4)
#define BCM2711_ARMC_FIQ2_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1A8)
#define BCM2711_ARMC_FIQ3_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x1C0)
#define BCM2711_ARMC_FIQ3_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x1C4)
#define BCM2711_ARMC_FIQ3_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x1C8)
#define BCM2711_ARMC_FIQ3_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1D0)
#define BCM2711_ARMC_FIQ3_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1D4)
#define BCM2711_ARMC_FIQ3_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1D8)
#define BCM2711_ARMC_FIQ3_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1E0)
#define BCM2711_ARMC_FIQ3_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1E4)
#define BCM2711_ARMC_FIQ3_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1E8)
#define BCM2711_ARMC_SWIRQ_SET (BCM2711_ARMC_REGS_BASE + 0x1F0)
#define BCM2711_ARMC_SWIRQ_CLEAR (BCM2711_ARMC_REGS_BASE + 0x1F4)
/** @} */
#endif /* LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H */

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@@ -1,118 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Raspberry Pi 4B specific GPIO definitions.
*/
/*
* Copyright (C) 2023 Utkarsh Verma
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_GPIO_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_GPIO_H
#include <bspopts.h>
#include <rtems/rtems/status.h>
/**
* @brief Raspberry Pi GPIO functions.
*/
typedef enum {
GPIO_INPUT,
GPIO_OUTPUT,
GPIO_AF5,
GPIO_AF4,
GPIO_AF0,
GPIO_AF1,
GPIO_AF2,
GPIO_AF3,
} raspberrypi_gpio_function;
typedef enum {
GPIO_PULL_NONE,
GPIO_PULL_UP,
GPIO_PULL_DOWN,
} raspberrypi_gpio_pull;
/**
* @brief Set the operation of the general-purpose I/O pins. Each of the 58
* GPIO pins has at least two alternative functions as defined.
*
* @param pin The GPIO pin.
* @param value The optional functions are GPIO_INPUT, GPIO_OUTPUT, GPIO_AF5,
* GPIO_AF4, GPIO_AF0, GPIO_AF1, GPIO_AF2, GPIO_AF3.
*
* @retval RTEMS_SUCCESSFUL GPIO function successfully configured.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_set_function(
const unsigned int pin,
const raspberrypi_gpio_function value
);
/**
* @brief Set a GPIO pin.
*
* @param pin The GPIO pin.
*
* @retval RTEMS_SUCCESSFUL GPIO pin set successfully.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_set_pin(const unsigned int pin);
/**
* @brief Clear a GPIO pin.
*
* @param pin The GPIO pin.
*
* @retval RTEMS_SUCCESSFUL GPIO pin clear successfully.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_clear_pin(const unsigned int pin);
/**
* @brief Control the actuation of the internal pull-up/down resistors.
*
* @param pin The GPIO pin.
* @param value The optional value are GPIO_PULL_NONE, GPIO_PULL_UP,
* GPIO_PULL_DOWN.
*
* @retval RTEMS_SUCCESSFUL GPIO pull set successfully.
* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
* number was invalid.
*/
rtems_status_code raspberrypi_gpio_set_pull(
const unsigned int pin,
const raspberrypi_gpio_pull value
);
#endif /* LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_GPIO_H */

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@@ -1,97 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief API of the Watchdog driver for the raspberrypi4 bsp in RTEMS.
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_WATCHDOG_H
#define LIBBSP_AARCH64_RASPBERRYPI_BSP_RPI_WATCHDOG_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @note a brief example of expected usage.
*
* void raspberrypi_watchdog_example()
* {
* raspberrypi_watchdog_init();
* raspberrypi_watchdog_start(15000);
*
* raspberrypi_watchdog_reload();
* ...
* raspberrypi_watchdog_reload();
*
* raspberrypi_watchdog_stop();
* }
*
*/
/**
* @brief Initialize BSP watchdog routines.
*/
void raspberrypi_watchdog_init(void);
/**
* @brief Turn on the watchdog / begin the counter at the desired value.
*
* @param timeout Watchdog timeout value in ms.
* The watchdog device has 20 bits of timeout, so it only
* supports a maximum of 15999 ms for its timeout.
* This value should be between 0 and 15999.
*/
void raspberrypi_watchdog_start(uint32_t timeout_ms);
/**
* @brief Turn off the watchdog.
*/
void raspberrypi_watchdog_stop(void);
/**
* @brief Reload watchdog.
*/
void raspberrypi_watchdog_reload(void);
/**
* @brief Get the remaining time of the watchdog.
* The return value is still valid when the watchdog has been stopped.
*
* @retval Watchdog remaining time in ms.
*/
uint32_t raspberrypi_watchdog_get_remaining_time(void);
#ifdef __cplusplus
}
#endif
#endif

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@@ -1,46 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief BSP tm27 header
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

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@@ -1,582 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief SPI Driver
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/irq.h>
#include <bsp/raspberrypi.h>
#include <bsp/raspberrypi-spi.h>
#include <bsp/rpi-gpio.h>
#include <dev/spi/spi.h>
#include <bspopts.h>
typedef struct {
spi_bus base;
volatile raspberrypi_spi *regs;
const spi_ioc_transfer *msg;
uint32_t msg_todo;
uint8_t *rx_buf;
const uint8_t *tx_buf;
uint32_t todo;
uint8_t num_cs;
uint32_t in_transfer;
rtems_id task_id;
rtems_vector_number irq;
}raspberrypi_spi_bus;
static int raspberrypi_spi_check_msg(
raspberrypi_spi_bus *bus,
const spi_ioc_transfer *msg,
uint32_t n
)
{
while (n > 0) {
if (msg->bits_per_word != 8) {
return -EINVAL;
}
if ((msg->mode &
~(SPI_CPHA | SPI_CPOL | SPI_NO_CS)) != 0) {
return -EINVAL;
}
if (msg->cs >= bus->num_cs) {
return -EINVAL;
}
++msg;
--n;
}
return 0;
}
/* Calculates a clock divider to be used with the GPU core clock rate
* to set a SPI clock rate the closest (<=) to a desired frequency. */
static rtems_status_code rpi_spi_calculate_clock_divider(
uint32_t clock_hz,
uint16_t *clock_divider
)
{
uint16_t divider;
uint32_t clock_rate;
/* Calculates an initial clock divider. */
divider = GPU_CORE_CLOCK_RATE / clock_hz;
/* Because the divider must be a power of two (as per the BCM2835 datasheet),
* calculate the next greater power of two. */
--divider;
divider |= (divider >> 1);
divider |= (divider >> 2);
divider |= (divider >> 4);
divider |= (divider >> 8);
++divider;
clock_rate = GPU_CORE_CLOCK_RATE / divider;
/* If the resulting clock rate is greater than the desired frequency,
* try the next greater power of two divider. */
while (clock_rate > clock_hz) {
divider = (divider << 1);
clock_rate = GPU_CORE_CLOCK_RATE / divider;
}
*clock_divider = divider;
return RTEMS_SUCCESSFUL;
}
static int raspberrypi_spi_config(
raspberrypi_spi_bus *bus,
volatile raspberrypi_spi *regs,
uint32_t speed_hz,
uint32_t mode,
uint8_t cs
)
{
spi_bus *base = &bus->base;
uint32_t spics = regs->spics;
rtems_status_code sc;
uint16_t clock_divider;
/* Calculate the most appropriate clock divider. */
sc = rpi_spi_calculate_clock_divider(speed_hz, &clock_divider);
if (sc != RTEMS_SUCCESSFUL) {
return sc;
}
/* Set the bus clock divider. */
regs->spiclk = RPI_SPICLK_CDIV_SET(regs->spiclk, clock_divider);
if ((mode & SPI_CPHA) != 0) {
spics |= RPI_SPICS_CPHA;
} else {
spics &= ~RPI_SPICS_CPHA;
}
if ((mode & SPI_CPOL) != 0) {
spics |= RPI_SPICS_CPOL;
} else {
spics &= ~RPI_SPICS_CPOL;
}
if ((mode & SPI_CS_HIGH) != 0) {
spics |= RPI_SPICS_CSPOL;
} else {
spics &= ~RPI_SPICS_CSPOL;
}
spics = RPI_SPICS_CS_SET(spics, cs);
regs->spics = spics;
base->speed_hz = speed_hz;
base->mode = mode;
base->cs = cs;
return 0;
}
#ifdef BSP_SPI_USE_INTERRUPTS
static void raspberrypi_spi_done(raspberrypi_spi_bus *bus)
{
volatile raspberrypi_spi *regs;
regs = bus->regs;
regs->spics = regs->spics & ~RPI_SPICS_TA;
rtems_event_transient_send(bus->task_id);
}
static bool raspberrpi_spi_TX_FULL(volatile raspberrypi_spi *regs)
{
return !(regs->spics & RPI_SPICS_TXD);
}
static void raspberrypi_spi_push(
raspberrypi_spi_bus *bus,
volatile raspberrypi_spi *regs
)
{
uint8_t val;
while (bus->todo > 0 && !raspberrpi_spi_TX_FULL(regs)) {
val = 0;
if (bus->tx_buf != NULL) {
val = *bus->tx_buf;
++bus->tx_buf;
}
--bus->todo;
regs->spififo = val;
++bus->in_transfer;
}
}
static void raspberrypi_spi_next_msg(raspberrypi_spi_bus *bus)
{
const spi_ioc_transfer *msg;
spi_bus *base;
volatile raspberrypi_spi *regs;
regs=bus->regs;
if (bus->msg_todo > 0) {
base = &bus->base;
msg = bus->msg;
if (
msg->speed_hz != base->speed_hz
|| msg->mode != base->mode
|| msg->cs != base->cs
) {
raspberrypi_spi_config(
bus,
regs,
msg->speed_hz,
msg->mode,
msg->cs
);
}
bus->todo = msg->len;
bus->rx_buf = msg->rx_buf;
bus->tx_buf = msg->tx_buf;
raspberrypi_spi_push(bus, regs);
} else {
raspberrypi_spi_done(bus);
}
}
static void raspberrypi_spi_start(raspberrypi_spi_bus *bus)
{
volatile raspberrypi_spi *regs;
regs = bus->regs;
regs->spics = regs->spics | RPI_SPICS_INTR | RPI_SPICS_INTD;
/*
* Set TA = 1. This will immediately trigger a first interrupt with
* DONE = 1.
*/
regs->spics = regs->spics | RPI_SPICS_TA;
}
static bool raspberrypi_spi_irq(volatile raspberrypi_spi *regs)
{
/* Check whether the interrupt is generated by this SPI device */
if(regs->spics & RPI_SPICS_INTD && regs->spics & RPI_SPICS_DONE) {
return 1;
}
if(regs->spics & RPI_SPICS_INTR && regs->spics & RPI_SPICS_RXR) {
return 1;
}
return 0;
}
static void raspberrypi_spi_interrupt(void *arg)
{
raspberrypi_spi_bus *bus;
volatile raspberrypi_spi *regs;
uint32_t val;
bus = arg;
regs = bus->regs;
if (raspberrypi_spi_irq(regs)) {
if (bus->todo > 0) {
raspberrypi_spi_push(bus, regs);
} else {
--bus->msg_todo;
++bus->msg;
raspberrypi_spi_next_msg(bus);
}
while (regs->spics & RPI_SPICS_RXD && bus->in_transfer > 0) {
/* RX FIFO contains at least 1 byte. */
val = regs->spififo;
if (bus->rx_buf != NULL) {
*bus->rx_buf = (uint8_t)val;
++bus->rx_buf;
}
--bus->in_transfer;
}
}
}
#else
static void raspberrypi_spi_polling_tx_rx(raspberrypi_spi_bus *bus)
{
volatile raspberrypi_spi *regs = bus->regs;
const unsigned char *sbuffer = bus->tx_buf;
unsigned char *rbuffer;
unsigned int size;
unsigned int read_count, write_count;
unsigned int data;
while (bus->msg_todo) {
rbuffer = bus->rx_buf;
size = bus->todo;
regs->spics = regs->spics | RPI_SPICS_CLEAR_RX | RPI_SPICS_CLEAR_TX
| RPI_SPICS_TA;
read_count = 0;
write_count = 0;
while (read_count < size || write_count < size) {
if (write_count < size && regs->spics & RPI_SPICS_TXD) {
if (sbuffer) {
regs->spififo = *sbuffer++;
} else {
regs->spififo = 0;
}
write_count++;
}
if (read_count < size && regs->spics & RPI_SPICS_RXD) {
data = regs->spififo;
if (rbuffer) {
*rbuffer++ = data;
}
read_count++;
}
}
while (!(regs->spics & RPI_SPICS_DONE)) {
/*wait*/
}
regs->spics = (regs->spics & ~RPI_SPICS_TA);
bus->msg_todo--;
bus->msg++;
bus->rx_buf = bus->msg->rx_buf;
bus->tx_buf = bus->msg->tx_buf;
bus->todo = bus->msg->len;
}
}
static void raspberrypi_spi_transfer_msg(
raspberrypi_spi_bus *bus
)
{
volatile raspberrypi_spi *regs = bus->regs;
uint32_t msg_todo = bus->msg_todo;
const spi_ioc_transfer *msg = bus->msg;
if (msg_todo > 0) {
if (
msg->speed_hz != bus->base.speed_hz
|| msg->mode != bus->base.mode
|| msg->cs != bus->base.cs
) {
raspberrypi_spi_config(
bus,
regs,
msg->speed_hz,
msg->mode,
msg->cs
);
}
bus->todo = msg->len;
bus->rx_buf = msg->rx_buf;
bus->tx_buf = msg->tx_buf;
raspberrypi_spi_polling_tx_rx(bus);
}
}
#endif
static int raspberrypi_spi_transfer(
spi_bus *base,
const spi_ioc_transfer *msgs,
uint32_t msg_count
)
{
int rv = 0;
raspberrypi_spi_bus *bus;
bus = (raspberrypi_spi_bus *) base;
rv = raspberrypi_spi_check_msg(bus, msgs, msg_count);
if (rv == 0) {
bus->msg_todo = msg_count;
bus->msg = msgs;
#ifdef BSP_SPI_USE_INTERRUPTS
bus->task_id = rtems_task_self();
raspberrypi_spi_start(bus);
rtems_event_transient_receive(RTEMS_WAIT, RTEMS_NO_TIMEOUT);
#else
raspberrypi_spi_transfer_msg(bus);
#endif
}
return rv;
}
static void raspberrypi_spi_destroy(spi_bus *base)
{
raspberrypi_spi_bus *bus;
bus = (raspberrypi_spi_bus *) base;
#ifdef BSP_SPI_USE_INTERRUPTS
rtems_interrupt_handler_remove(
bus->irq,
raspberrypi_spi_interrupt,
bus
);
#endif
spi_bus_destroy_and_free(&bus->base);
}
static int raspberrypi_spi_setup(spi_bus *base)
{
raspberrypi_spi_bus *bus;
uint32_t mode = base->mode;
bus = (raspberrypi_spi_bus *) base;
if (mode & SPI_LOOP) {
return -EINVAL;
}
return raspberrypi_spi_config(
bus,
bus->regs,
bus->base.speed_hz,
bus->base.mode,
bus->base.cs
);
}
static rtems_status_code raspberrypi_spi_init_gpio(
raspberrypi_spi_device device
)
{
switch (device) {
case raspberrypi_SPI0:
raspberrypi_gpio_set_function(7, GPIO_AF0); /* CS1 */
raspberrypi_gpio_set_pull(7, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(8, GPIO_AF0); /* CS0 */
raspberrypi_gpio_set_pull(8, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(9, GPIO_AF0); /* MISO */
raspberrypi_gpio_set_function(10, GPIO_AF0); /* MOSI */
raspberrypi_gpio_set_function(11, GPIO_AF0); /* SCLK */
break;
case raspberrypi_SPI3:
raspberrypi_gpio_set_function(24, GPIO_AF5);
raspberrypi_gpio_set_pull(24, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(0, GPIO_AF3);
raspberrypi_gpio_set_pull(0, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(1, GPIO_AF3);
raspberrypi_gpio_set_function(2, GPIO_AF3);
raspberrypi_gpio_set_function(3, GPIO_AF3);
break;
case raspberrypi_SPI4:
raspberrypi_gpio_set_function(25, GPIO_AF5);
raspberrypi_gpio_set_pull(25, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(4, GPIO_AF3);
raspberrypi_gpio_set_pull(4, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(5, GPIO_AF3);
raspberrypi_gpio_set_function(6, GPIO_AF3);
raspberrypi_gpio_set_function(7, GPIO_AF3);
break;
case raspberrypi_SPI5:
raspberrypi_gpio_set_function(26, GPIO_AF5);
raspberrypi_gpio_set_pull(26, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(12, GPIO_AF3);
raspberrypi_gpio_set_pull(12, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(13, GPIO_AF3);
raspberrypi_gpio_set_function(14, GPIO_AF3);
raspberrypi_gpio_set_function(15, GPIO_AF3);
break;
case raspberrypi_SPI6:
raspberrypi_gpio_set_function(27, GPIO_AF5);
raspberrypi_gpio_set_pull(27, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(18, GPIO_AF3);
raspberrypi_gpio_set_pull(18, GPIO_PULL_NONE);
raspberrypi_gpio_set_function(19, GPIO_AF3);
raspberrypi_gpio_set_function(20, GPIO_AF3);
raspberrypi_gpio_set_function(21, GPIO_AF3);
break;
default:
return RTEMS_INVALID_NUMBER;
break;
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code raspberrypi_spi_init(raspberrypi_spi_device device)
{
raspberrypi_spi_bus *bus;
int eno;
volatile raspberrypi_spi *regs;
const char *bus_path;
bus = (raspberrypi_spi_bus *) spi_bus_alloc_and_init(sizeof(*bus));
if (bus == NULL) {
return RTEMS_UNSATISFIED;
}
switch (device) {
case raspberrypi_SPI0:
regs = (volatile raspberrypi_spi *) BCM2711_SPI0_BASE;
bus_path = "/dev/spidev0";
break;
case raspberrypi_SPI3:
regs = (volatile raspberrypi_spi *) BCM2711_SPI3_BASE;
bus_path = "/dev/spidev3";
break;
case raspberrypi_SPI4:
regs = (volatile raspberrypi_spi *) BCM2711_SPI4_BASE;
bus_path = "/dev/spidev4";
break;
case raspberrypi_SPI5:
regs = (volatile raspberrypi_spi *) BCM2711_SPI5_BASE;
bus_path = "/dev/spidev5";
break;
case raspberrypi_SPI6:
regs = (volatile raspberrypi_spi *) BCM2711_SPI6_BASE;
bus_path = "/dev/spidev6";
break;
default:
spi_bus_destroy_and_free(&bus->base);
return RTEMS_INVALID_NUMBER;
break;
}
bus->regs = regs;
bus->num_cs = 2;
bus->base.transfer = raspberrypi_spi_transfer;
bus->base.destroy = raspberrypi_spi_destroy;
bus->base.setup = raspberrypi_spi_setup;
bus->base.bits_per_word = 8;
bus->base.max_speed_hz = 250000000;
bus->base.cs = 0;
#ifdef BSP_SPI_USE_INTERRUPTS
bus->irq = BCM2711_IRQ_SPI;
eno = rtems_interrupt_handler_install(
bus->irq,
"SPI",
RTEMS_INTERRUPT_SHARED,
raspberrypi_spi_interrupt,
bus
);
if (eno != RTEMS_SUCCESSFUL) {
return EAGAIN;
}
#endif
eno = spi_bus_register(&bus->base, bus_path);
if (eno != 0) {
spi_bus_destroy_and_free(&bus->base);
return RTEMS_UNSATISFIED;
}
eno = raspberrypi_spi_init_gpio(device);
if (eno != 0) {
spi_bus_destroy_and_free(&bus->base);
return RTEMS_INVALID_NUMBER;
}
return RTEMS_SUCCESSFUL;
}

View File

@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief BSP Startup
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

View File

@@ -1,55 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief BSP Startup Hooks
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/irq-generic.h>
#include <bsp/start.h>
#include <rtems/score/cpu.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
/* Do nothing */
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
raspberrypi_4_setup_mmu_and_cache();
bsp_start_clear_bss();
}

View File

@@ -1,87 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Raspberrypi4
*
* @brief This source file contains the default MMU tables and setup.
*/
/*
* Copyright (C) 2022 Mohd Noor Aman
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/aarch64-mmu.h>
#include <bsp/raspberrypi.h>
#include <libcpu/mmu-vmsav8-64.h>
BSP_START_DATA_SECTION static const aarch64_mmu_config_entry
raspberrypi_4_mmu_config_table[] = {
AARCH64_MMU_DEFAULT_SECTIONS,
{ /* RPI peripheral address */
.begin = (unsigned)RPI_PERIPHERAL_BASE,
.end = (unsigned)RPI_PERIPHERAL_BASE + (unsigned)RPI_PERIPHERAL_SIZE,
.flags = AARCH64_MMU_DEVICE
},
{ /* RPI ARM local registers */
.begin = (unsigned)BCM2711_LOCAL_REGS_BASE,
.end = (unsigned)BCM2711_LOCAL_REGS_BASE + (unsigned)BCM2711_LOCAL_REGS_SIZE,
.flags = AARCH64_MMU_DEVICE
},
{ /* RPI GIC Interface address */
.begin = 0xFF800000U,
.end = 0xFFA00000U,
.flags = AARCH64_MMU_DEVICE
}
};
/*
* Make weak and let the user override.
*/
BSP_START_TEXT_SECTION void
raspberrypi_4_setup_mmu_and_cache( void ) __attribute__ ((weak));
BSP_START_TEXT_SECTION void
raspberrypi_4_setup_mmu_and_cache( void )
{
aarch64_mmu_control *control = &aarch64_mmu_instance;
aarch64_mmu_setup();
aarch64_mmu_setup_translation_table(
control,
&raspberrypi_4_mmu_config_table[ 0 ],
RTEMS_ARRAY_SIZE( raspberrypi_4_mmu_config_table )
);
aarch64_mmu_enable( control );
}

View File

@@ -1,73 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64RaspberryPi
*
* @brief Watchdog Driver
*/
/*
* Copyright (C) 2024 Ning Yang
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/raspberrypi.h>
#include <bsp/watchdog.h>
#define PM_WDOG BCM2835_REG(BCM2711_PM_WDOG)
#define PM_RSTC BCM2835_REG(BCM2711_PM_RSTC)
uint32_t raspberrypi_watchdog_timeout;
void raspberrypi_watchdog_init()
{
raspberrypi_watchdog_timeout = 0;
}
void raspberrypi_watchdog_start(uint32_t timeout_ms)
{
raspberrypi_watchdog_timeout = timeout_ms;
PM_WDOG = BCM2711_PM_PASSWD_MAGIC |
((timeout_ms * 65536 / 1000) & BCM2711_PM_WDOG_MASK);
PM_RSTC &= BCM2711_PM_RSTC_WRCFG_CLR;
PM_RSTC = (BCM2711_PM_PASSWD_MAGIC | BCM2711_PM_RSTC_WRCFG_FULL);
}
void raspberrypi_watchdog_stop()
{
PM_RSTC = BCM2711_PM_PASSWD_MAGIC | BCM2711_PM_RSTC_RESET;
}
void raspberrypi_watchdog_reload()
{
raspberrypi_watchdog_start(raspberrypi_watchdog_timeout);
}
uint32_t raspberrypi_watchdog_get_remaining_time()
{
return (PM_WDOG & BCM2711_PM_WDOG_MASK)*1000/65536;
}

View File

@@ -1,415 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64 cache defines and implementation.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems.h>
#include <bsp.h>
#include <rtems/score/aarch64-system-registers.h>
#define CPU_DATA_CACHE_ALIGNMENT 64
#define CPU_INSTRUCTION_CACHE_ALIGNMENT 64
#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
#define AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ( (size_t) 64 )
#define AARCH64_CACHE_PREPARE_MVA(mva) (const void *) \
RTEMS_ALIGN_DOWN ( (size_t) mva, AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT )
static inline
void AArch64_data_cache_clean_and_invalidate_line(const void *d_addr)
{
d_addr = AARCH64_CACHE_PREPARE_MVA(d_addr);
__asm__ volatile (
"dc civac, %[d_addr]"
:
: [d_addr] "r" (d_addr)
: "memory"
);
}
static inline void
_CPU_cache_flush_data_range(
const void *d_addr,
size_t n_bytes
)
{
_AARCH64_Data_synchronization_barrier();
if ( n_bytes != 0 ) {
size_t adx = (size_t) AARCH64_CACHE_PREPARE_MVA ( d_addr );
const size_t ADDR_LAST = (size_t) d_addr + n_bytes - 1;
for (; adx <= ADDR_LAST; adx += AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ) {
/* Store and invalidate the Data cache line */
AArch64_data_cache_clean_and_invalidate_line( (void*)adx );
}
/* Wait for L1 store to complete */
_AARCH64_Data_synchronization_barrier();
}
_AARCH64_Data_synchronization_barrier();
}
static inline void AArch64_data_cache_invalidate_line(const void *d_addr)
{
d_addr = AARCH64_CACHE_PREPARE_MVA(d_addr);
__asm__ volatile (
"dc ivac, %[d_addr]"
:
: [d_addr] "r" (d_addr)
: "memory"
);
}
static inline void
_CPU_cache_invalidate_data_range(
const void *d_addr,
size_t n_bytes
)
{
if ( n_bytes != 0 ) {
size_t adx = (size_t) AARCH64_CACHE_PREPARE_MVA ( d_addr );
const size_t end = (size_t)d_addr + n_bytes -1;
/* Back starting address up to start of a line and invalidate until end */
for (;
adx <= end;
adx += AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ) {
/* Invalidate the Instruction cache line */
AArch64_data_cache_invalidate_line( (void*)adx );
}
/* Wait for L1 invalidate to complete */
_AARCH64_Data_synchronization_barrier();
}
}
static inline void _CPU_cache_freeze_data(void)
{
/* TODO */
}
static inline void _CPU_cache_unfreeze_data(void)
{
/* TODO */
}
static inline void AArch64_instruction_cache_invalidate_line(const void *i_addr)
{
/* __builtin___clear_cache is explicitly only for instruction cacche */
__builtin___clear_cache((void *)i_addr, ((char *)i_addr) + sizeof(void*) - 1);
}
static inline void
_CPU_cache_invalidate_instruction_range( const void *i_addr, size_t n_bytes)
{
if ( n_bytes != 0 ) {
__builtin___clear_cache((void *)i_addr, ((char *)i_addr) + n_bytes - 1);
}
_AARCH64_Instruction_synchronization_barrier();
}
static inline void _CPU_cache_freeze_instruction(void)
{
/* TODO */
}
static inline void _CPU_cache_unfreeze_instruction(void)
{
/* TODO */
}
static inline uint64_t AArch64_get_ccsidr_for_level(
uint64_t level, bool instruction
)
{
uint64_t csselr = AARCH64_CSSELR_EL1_LEVEL(level - 1);
csselr |= instruction ? AARCH64_CSSELR_EL1_IND : 0;
_AArch64_Write_csselr_el1(csselr);
_AARCH64_Instruction_synchronization_barrier();
return _AArch64_Read_ccsidr_el1();
}
static inline uint64_t
AArch64_ccsidr_get_line_power(uint64_t ccsidr)
{
return AARCH64_CCSIDR_EL1_LINESIZE_GET(ccsidr) + 4;
}
static inline uint64_t
AArch64_ccsidr_get_associativity(uint64_t ccsidr)
{
return AARCH64_CCSIDR_EL1_ASSOCIATIVITY_GET_0(ccsidr) + 1;
}
static inline uint64_t
AArch64_ccsidr_get_num_sets(uint64_t ccsidr)
{
return AARCH64_CCSIDR_EL1_NUMSETS_GET_0(ccsidr) + 1;
}
static inline void
AArch64_data_cache_clean_and_invalidate_level(uint64_t level)
{
uint64_t ccsidr;
uint64_t line_power;
uint64_t associativity;
uint64_t way;
uint64_t way_shift;
ccsidr = AArch64_get_ccsidr_for_level(level, false);
line_power = AArch64_ccsidr_get_line_power(ccsidr);
associativity = AArch64_ccsidr_get_associativity(ccsidr);
way_shift = __builtin_clz(associativity - 1);
for (way = 0; way < associativity; ++way) {
uint64_t num_sets = AArch64_ccsidr_get_num_sets(ccsidr);
uint64_t set;
for (set = 0; set < num_sets; ++set) {
uint64_t set_and_way = (way << way_shift)
| (set << line_power)
| ((level - 1) << 1);
__asm__ volatile (
"dc cisw, %[set_and_way]"
:
: [set_and_way] "r" (set_and_way)
: "memory"
);
}
}
}
static inline
uint64_t AArch64_clidr_get_cache_type(uint64_t clidr, uint64_t level)
{
return (clidr >> (3 * level)) & 0x7;
}
static inline uint64_t AArch64_clidr_get_level_of_coherency(uint64_t clidr)
{
return AARCH64_CLIDR_EL1_LOC_GET(clidr);
}
static inline void AArch64_data_cache_clean_and_invalidate_all_levels(void)
{
uint64_t clidr = _AArch64_Read_clidr_el1();
uint64_t loc = AArch64_clidr_get_level_of_coherency(clidr);
uint64_t level = 0;
for (level = 1; level <= loc; ++level) {
/* Assume that all levels have a data cache */
AArch64_data_cache_clean_and_invalidate_level(level);
}
}
static inline void _CPU_cache_flush_entire_data(void)
{
rtems_interrupt_level isr_level;
rtems_interrupt_local_disable(isr_level);
_AARCH64_Data_synchronization_barrier();
AArch64_data_cache_clean_and_invalidate_all_levels();
_AARCH64_Data_synchronization_barrier();
rtems_interrupt_local_enable(isr_level);
}
static inline void AArch64_cache_invalidate_level(uint64_t level)
{
uint64_t ccsidr;
uint64_t line_power;
uint64_t associativity;
uint64_t way;
uint64_t way_shift;
ccsidr = AArch64_get_ccsidr_for_level(level, false);
line_power = AArch64_ccsidr_get_line_power(ccsidr);
associativity = AArch64_ccsidr_get_associativity(ccsidr);
way_shift = __builtin_clz(associativity - 1);
for (way = 0; way < associativity; ++way) {
uint64_t num_sets = AArch64_ccsidr_get_num_sets(ccsidr);
uint64_t set;
for (set = 0; set < num_sets; ++set) {
uint64_t set_and_way = (way << way_shift)
| (set << line_power)
| ((level - 1) << 1);
__asm__ volatile (
"dc isw, %[set_and_way]"
:
: [set_and_way] "r" (set_and_way)
: "memory"
);
}
}
}
static inline void AArch64_data_cache_invalidate_all_levels(void)
{
uint64_t clidr = _AArch64_Read_clidr_el1();
uint64_t loc = AArch64_clidr_get_level_of_coherency(clidr);
uint64_t level = 0;
for (level = 1; level <= loc; ++level) {
/* Assume that all levels have a data cache */
AArch64_cache_invalidate_level(level);
}
}
static inline void _CPU_cache_invalidate_entire_data(void)
{
rtems_interrupt_level isr_level;
rtems_interrupt_local_disable(isr_level);
_AARCH64_Data_synchronization_barrier();
AArch64_data_cache_invalidate_all_levels();
_AARCH64_Data_synchronization_barrier();
rtems_interrupt_local_enable(isr_level);
}
static inline void _CPU_cache_enable_data(void)
{
rtems_interrupt_level isr_level;
uint64_t sctlr;
rtems_interrupt_local_disable(isr_level);
sctlr = _AArch64_Read_sctlr_el1();
sctlr |= AARCH64_SCTLR_EL1_C;
_AArch64_Write_sctlr_el1(sctlr);
rtems_interrupt_local_enable(isr_level);
}
static RTEMS_NO_RETURN inline void _CPU_cache_disable_data(void)
{
_Internal_error( INTERNAL_ERROR_CANNOT_DISABLE_DATA_CACHE );
}
static inline void _CPU_cache_invalidate_entire_instruction(void)
{
/*
* There is no way to manage branch prediction in AArch64. See D4.4.12 in
* the ARM Architecture Reference Manual, ARMv8, for ARMv8-A architecture
* profile (ARM DDI 0487D.a).
*/
__asm__ volatile (
#ifdef RTEMS_SMP
/*
* Invalidate all instruction caches up to
* Point of Unification, Inner Shareable.
*/
"ic ialluis\n"
#else
/* Invalidate all instruction caches up to Point of Unification */
"ic iallu\n"
#endif
"isb"
:
:
: "memory"
);
}
static inline void _CPU_cache_enable_instruction(void)
{
rtems_interrupt_level isr_level;
uint64_t sctlr;
rtems_interrupt_local_disable(isr_level);
sctlr = _AArch64_Read_sctlr_el1();
sctlr |= AARCH64_SCTLR_EL1_I;
_AArch64_Write_sctlr_el1(sctlr);
rtems_interrupt_local_enable(isr_level);
}
static inline void _CPU_cache_disable_instruction(void)
{
rtems_interrupt_level isr_level;
uint64_t sctlr;
rtems_interrupt_local_disable(isr_level);
sctlr = _AArch64_Read_sctlr_el1();
sctlr &= ~AARCH64_SCTLR_EL1_I;
_AArch64_Write_sctlr_el1(sctlr);
rtems_interrupt_local_enable(isr_level);
}
static inline size_t AArch64_get_cache_size(
uint64_t level,
bool instruction
)
{
rtems_interrupt_level isr_level;
uint64_t clidr;
uint64_t loc;
uint64_t ccsidr;
clidr = _AArch64_Read_clidr_el1();
loc = AArch64_clidr_get_level_of_coherency(clidr);
if (level > loc) {
return 0;
}
rtems_interrupt_local_disable(isr_level);
ccsidr = AArch64_get_ccsidr_for_level(level, instruction);
rtems_interrupt_local_enable(isr_level);
return (1U << (AArch64_ccsidr_get_line_power(ccsidr)+4))
* AArch64_ccsidr_get_associativity(ccsidr)
* AArch64_ccsidr_get_num_sets(ccsidr);
}
static inline size_t _CPU_cache_get_data_cache_size(uint64_t level)
{
return AArch64_get_cache_size(level, false);
}
static inline size_t _CPU_cache_get_instruction_cache_size(uint64_t level)
{
return AArch64_get_cache_size(level, true);
}
#include "../../shared/cache/cacheimpl.h"

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@@ -1,116 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64-specific ARM GPT system register accessors.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <dev/clock/arm-generic-timer.h>
#include <bsp/irq.h>
uint64_t arm_gt_clock_get_compare_value(void)
{
uint64_t val;
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"mrs %[val], cntv_cval_el0"
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
"mrs %[val], cntps_cval_el1"
#else
"mrs %[val], cntp_cval_el0"
#endif
: [val] "=&r" (val)
);
return val;
}
void arm_gt_clock_set_compare_value(uint64_t cval)
{
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_cval_el0, %[cval]"
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
"msr cntps_cval_el1, %[cval]"
#else
"msr cntp_cval_el0, %[cval]"
#endif
:
: [cval] "r" (cval)
);
}
uint64_t arm_gt_clock_get_count(void)
{
uint64_t val;
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"mrs %[val], cntvct_el0"
#else
"mrs %[val], cntpct_el0"
#endif
: [val] "=&r" (val)
);
return val;
}
void arm_gt_clock_set_control(uint32_t ctl)
{
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_ctl_el0, %[ctl]"
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
"msr cntps_ctl_el1, %[ctl]"
#else
"msr cntp_ctl_el0, %[ctl]"
#endif
:
: [ctl] "r" (ctl)
);
}
void arm_generic_timer_get_config( uint32_t *frequency, uint32_t *irq )
{
uint64_t val;
__asm__ volatile (
"mrs %[val], cntfrq_el0"
: [val] "=&r" (val)
);
*frequency = val;
#ifdef ARM_GENERIC_TIMER_USE_VIRTUAL
*irq = BSP_TIMER_VIRT_PPI;
#elif defined(AARCH64_GENERIC_TIMER_USE_PHYSICAL_SECURE)
*irq = BSP_TIMER_PHYS_S_PPI;
#else
*irq = BSP_TIMER_PHYS_NS_PPI;
#endif
}

View File

@@ -1,23 +0,0 @@
/**
* @file
*
* @ingroup RTEMSImplDoxygen
*
* @brief This header file defines BSP-specific groups.
*/
/**
* @defgroup RTEMSBSPsAArch64 AArch64
*
* @ingroup RTEMSBSPs
*
* @brief This group contains AArch64 Board Support Packages.
*/
/**
* @defgroup RTEMSBSPsAArch64Shared Shared
*
* @ingroup RTEMSBSPsAArch64
*
* @brief This group contains support shared by AArch64 Board Support Packages.
*/

View File

@@ -1,319 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_start
*
* @brief AArch64 MMU configuration.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/aarch64-mmu.h>
#include <bsp/fatal.h>
#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <rtems/score/aarch64-system-registers.h>
#include <rtems/score/assert.h>
aarch64_mmu_control aarch64_mmu_instance = {
.ttb = (uint64_t *) bsp_translation_table_base,
/* One page table is used for the initial setup at the base */
.used_page_tables = 1
};
/* AArch64 uses levels 0, 1, 2, and 3 */
#define MMU_MAX_SUBTABLE_PAGE_BITS ( 3 * MMU_BITS_PER_LEVEL + MMU_PAGE_BITS )
/* setup straight mapped block entries */
BSP_START_TEXT_SECTION static inline void aarch64_mmu_page_table_set_blocks(
uint64_t *page_table,
uint64_t base,
uint32_t bits_offset,
uint64_t default_attr
)
{
uint64_t page_flag = 0;
if ( bits_offset == MMU_PAGE_BITS ) {
page_flag = MMU_DESC_TYPE_PAGE;
}
for ( uint64_t i = 0; i < ( 1 << MMU_BITS_PER_LEVEL ); i++ ) {
page_table[i] = base | ( i << bits_offset );
page_table[i] |= default_attr | page_flag;
}
}
BSP_START_TEXT_SECTION static inline uint64_t *
aarch64_mmu_page_table_alloc( aarch64_mmu_control *control )
{
size_t used_page_tables = control->used_page_tables;
if ( used_page_tables >= AARCH64_MMU_TRANSLATION_TABLE_PAGES ) {
return NULL;
}
control->used_page_tables = used_page_tables + 1;
return (uint64_t *)
( (uintptr_t) control->ttb + ( used_page_tables << MMU_PAGE_BITS ) );
}
BSP_START_TEXT_SECTION static inline uintptr_t aarch64_mmu_get_index(
uintptr_t root_address,
uintptr_t vaddr,
uint32_t shift
)
{
uintptr_t mask = ( 1 << ( MMU_BITS_PER_LEVEL + 1 ) ) - 1;
return ( ( vaddr - root_address ) >> shift ) & mask;
}
BSP_START_TEXT_SECTION static uint64_t *
aarch64_mmu_get_sub_table(
aarch64_mmu_control *control,
uint64_t *page_table_entry,
uintptr_t physical_root_address,
uint32_t shift
)
{
/* check if the index already has a page table */
if ( ( *page_table_entry & MMU_DESC_TYPE_TABLE ) == MMU_DESC_TYPE_TABLE ) {
/* extract page table address */
uint64_t table_pointer = *page_table_entry & MMU_DESC_PAGE_TABLE_MASK;
/* This cast should be safe since the address was inserted in this mode */
return (uint64_t *) (uintptr_t) table_pointer;
}
/* allocate new page table and set block */
uint64_t *sub_table = aarch64_mmu_page_table_alloc( control );
if ( sub_table == NULL ) {
return NULL;
}
aarch64_mmu_page_table_set_blocks(
sub_table,
physical_root_address,
shift - MMU_BITS_PER_LEVEL,
*page_table_entry & ~MMU_DESC_PAGE_TABLE_MASK
);
*page_table_entry = (uintptr_t) sub_table;
*page_table_entry |= MMU_DESC_TYPE_TABLE | MMU_DESC_VALID;
return sub_table;
}
BSP_START_TEXT_SECTION static inline rtems_status_code aarch64_mmu_map_block(
aarch64_mmu_control *control,
uint64_t *page_table,
uint64_t root_address,
uint64_t addr,
uint64_t size,
int8_t level,
uint64_t flags
)
{
uint32_t shift = ( 2 - level ) * MMU_BITS_PER_LEVEL + MMU_PAGE_BITS;
uint64_t granularity = 1LLU << shift;
do {
uintptr_t index = aarch64_mmu_get_index( root_address, addr, shift );
uint64_t block_bottom = RTEMS_ALIGN_DOWN( addr, granularity );
uint64_t chunk_size = granularity;
/* check for perfect block match */
if ( block_bottom == addr ) {
if ( size >= chunk_size ) {
/* level -1 can't contain block descriptors, fall through to subtable */
if ( level != -1 ) {
uint64_t page_flag = 0;
if ( level == 2 ) {
page_flag = MMU_DESC_TYPE_PAGE;
}
/* when page_flag is set the last level must be a page descriptor */
if ( page_flag || ( page_table[index] & MMU_DESC_TYPE_TABLE ) != MMU_DESC_TYPE_TABLE ) {
/* no sub-table, apply block properties */
page_table[index] = addr | flags | page_flag;
size -= chunk_size;
addr += chunk_size;
continue;
}
}
} else {
/*
* Block starts on a boundary, but is short.
*
* The size is >= MMU_PAGE_SIZE since
* aarch64_mmu_set_translation_table_entries() aligns the memory region
* to page boundaries. The minimum chunk_size is MMU_PAGE_SIZE.
*/
_Assert( level < 2 );
chunk_size = size;
}
} else {
uintptr_t block_top = RTEMS_ALIGN_UP( addr, granularity );
chunk_size = block_top - addr;
if ( chunk_size > size ) {
chunk_size = size;
}
}
/* Deal with any subtable modification */
uint64_t new_root_address = root_address + index * granularity;
rtems_status_code sc;
uint64_t *sub_table = aarch64_mmu_get_sub_table(
control,
&page_table[index],
new_root_address,
shift
);
if ( sub_table == NULL ) {
return RTEMS_TOO_MANY;
}
sc = aarch64_mmu_map_block(
control,
sub_table,
new_root_address,
addr,
chunk_size,
level + 1,
flags
);
if ( sc != RTEMS_SUCCESSFUL ) {
return sc;
}
size -= chunk_size;
addr += chunk_size;
} while ( size > 0 );
return RTEMS_SUCCESSFUL;
}
/* Get the maximum number of bits supported by this hardware */
BSP_START_TEXT_SECTION static inline uint64_t
aarch64_mmu_get_cpu_pa_bits( void )
{
#ifdef AARCH64_MMU_PHYSICAL_ADDRESS_RANGE_BITS
return AARCH64_MMU_PHYSICAL_ADDRESS_RANGE_BITS;
#else
uint64_t id_reg = _AArch64_Read_id_aa64mmfr0_el1();
switch ( AARCH64_ID_AA64MMFR0_EL1_PARANGE_GET( id_reg ) ) {
case 0:
return 32;
case 1:
return 36;
case 2:
return 40;
case 3:
return 42;
case 4:
return 44;
case 5:
return 48;
case 6:
return 52;
default:
return 48;
}
return 48;
#endif
}
BSP_START_TEXT_SECTION rtems_status_code
aarch64_mmu_set_translation_table_entries(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config
)
{
uint64_t max_mappable = 1LLU << aarch64_mmu_get_cpu_pa_bits();
/* Align to page boundaries */
uintptr_t begin = RTEMS_ALIGN_DOWN( config->begin, MMU_PAGE_SIZE );
uintptr_t end = RTEMS_ALIGN_UP( config->end, MMU_PAGE_SIZE );
uintptr_t size = end - begin;
if ( config->begin == config->end ) {
return RTEMS_SUCCESSFUL;
}
if ( begin >= max_mappable ) {
return RTEMS_INVALID_ADDRESS;
}
if ( size > max_mappable - begin ) {
return RTEMS_INVALID_SIZE;
}
return aarch64_mmu_map_block(
control,
control->ttb,
0x0,
begin,
size,
-1,
config->flags
);
}
BSP_START_TEXT_SECTION void aarch64_mmu_setup_translation_table(
aarch64_mmu_control *control,
const aarch64_mmu_config_entry *config_table,
size_t config_count
)
{
size_t i;
aarch64_mmu_page_table_set_blocks(
control->ttb,
(uintptr_t) NULL,
MMU_MAX_SUBTABLE_PAGE_BITS,
0
);
/* Configure entries required for each memory section */
for ( i = 0; i < config_count; ++i ) {
rtems_status_code sc;
sc = aarch64_mmu_set_translation_table_entries( control, &config_table[i] );
if ( sc != RTEMS_SUCCESSFUL ) {
bsp_fatal( AARCH64_FATAL_MMU_CANNOT_MAP_BLOCK );
}
}
}

View File

@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64 MMU dummy implementation.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <libcpu/mmu-vmsav8-64.h>
/*
* This must have a non-header implementation because it is used by libdebugger.
*/
rtems_status_code aarch64_mmu_map(
uintptr_t addr,
uint64_t size,
uint64_t flags
)
{
return RTEMS_SUCCESSFUL;
}

View File

@@ -1,78 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64 MMU implementation.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/aarch64-mmu.h>
#include <rtems/score/cpu.h>
/*
* This must have a non-header implementation because it is used by libdebugger.
*/
rtems_status_code aarch64_mmu_map(
uintptr_t addr,
uint64_t size,
uint64_t flags
)
{
aarch64_mmu_config_entry config = {
.begin = addr,
.end = addr + size,
.flags = flags
};
rtems_status_code sc;
ISR_Level level;
aarch64_mmu_control *control = &aarch64_mmu_instance;
/*
* Disable interrupts so they don't run while the MMU tables are being
* modified.
*/
_ISR_Local_disable( level );
sc = aarch64_mmu_set_translation_table_entries(
control,
&config
);
_AARCH64_Data_synchronization_barrier();
__asm__ volatile(
"tlbi vmalle1\n"
);
_AARCH64_Data_synchronization_barrier();
_AARCH64_Instruction_synchronization_barrier();
_ISR_Local_enable( level );
return sc;
}

View File

@@ -1,87 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief SMP startup and interop code.
*/
/*
* Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/score/smpimpl.h>
#include <bsp/irq.h>
static void bsp_inter_processor_interrupt( void *arg )
{
_SMP_Inter_processor_interrupt_handler( _Per_CPU_Get() );
}
uint32_t _CPU_SMP_Initialize( void )
{
return arm_gic_irq_processor_count();
}
static rtems_interrupt_entry aarch64_ipi_entry;
void _CPU_SMP_Finalize_initialization( uint32_t cpu_count )
{
rtems_status_code sc;
rtems_interrupt_entry_initialize(
&aarch64_ipi_entry,
bsp_inter_processor_interrupt,
NULL,
"IPI"
);
sc = rtems_interrupt_entry_install(
ARM_GIC_IRQ_SGI_0,
RTEMS_INTERRUPT_UNIQUE,
&aarch64_ipi_entry
);
_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
}
void _CPU_SMP_Prepare_start_multitasking( void )
{
/* Do nothing */
}
void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
{
arm_gic_trigger_sgi(
ARM_GIC_IRQ_SGI_0,
1U << target_processor_index
);
}
uint32_t _CPU_SMP_Get_current_processor( void )
{
return _Per_CPU_Get_index( _CPU_Get_current_per_CPU_control() );
}

View File

@@ -1,443 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup bsp_linker
*
* @brief Linker command base file.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
ENTRY (_start)
STARTUP (start.o)
/*
* Global symbols that may be defined externally
*/
bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 16;
bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 0;
bsp_stack_exception_size = ALIGN (bsp_stack_exception_size, bsp_stack_align);
bsp_vector_table_size = DEFINED (bsp_vector_table_size) ? bsp_vector_table_size : 64;
bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_xbarrier_align : 1;
bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1;
bsp_stack_hyp_size = DEFINED (bsp_stack_hyp_size) ? bsp_stack_hyp_size : 0;
bsp_stack_hyp_size = ALIGN (bsp_stack_hyp_size, bsp_stack_align);
MEMORY {
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffffffffffff, LENGTH = 0
}
SECTIONS {
.start : ALIGN_WITH_INPUT {
bsp_section_start_begin = .;
KEEP (*(.bsp_start_text))
KEEP (*(.bsp_start_data))
bsp_section_start_end = .;
} > REGION_START AT > REGION_START
bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin;
.xbarrier : ALIGN_WITH_INPUT {
. = ALIGN (bsp_section_xbarrier_align);
} > REGION_VECTOR AT > REGION_VECTOR
.text : ALIGN_WITH_INPUT {
bsp_section_text_begin = .;
*(.text.unlikely .text.*_unlikely)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
} > REGION_TEXT AT > REGION_TEXT_LOAD
.init : ALIGN_WITH_INPUT {
KEEP (*(.init))
} > REGION_TEXT AT > REGION_TEXT_LOAD
.fini : ALIGN_WITH_INPUT {
KEEP (*(.fini))
bsp_section_text_end = .;
} > REGION_TEXT AT > REGION_TEXT_LOAD
bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin;
bsp_section_text_load_begin = LOADADDR (.text);
bsp_section_text_load_end = bsp_section_text_load_begin + bsp_section_text_size;
.robarrier : ALIGN_WITH_INPUT {
. = ALIGN (bsp_section_robarrier_align);
} > REGION_RODATA AT > REGION_RODATA
.rodata : ALIGN_WITH_INPUT {
bsp_section_rodata_begin = .;
*(.rodata .rodata.* .gnu.linkonce.r.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rodata1 : ALIGN_WITH_INPUT {
*(.rodata1)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.ARM.extab : ALIGN_WITH_INPUT {
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.ARM.exidx : ALIGN_WITH_INPUT {
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
.eh_frame : ALIGN_WITH_INPUT {
KEEP (*(.eh_frame))
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gcc_except_table : ALIGN_WITH_INPUT {
*(.gcc_except_table .gcc_except_table.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tdata : ALIGN_WITH_INPUT {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tbss : ALIGN_WITH_INPUT {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.preinit_array : ALIGN_WITH_INPUT {
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.init_array : ALIGN_WITH_INPUT {
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.fini_array : ALIGN_WITH_INPUT {
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.data.rel.ro : ALIGN_WITH_INPUT {
*(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*)
*(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.jcr : ALIGN_WITH_INPUT {
KEEP (*(.jcr))
} > REGION_RODATA AT > REGION_RODATA_LOAD
.interp : ALIGN_WITH_INPUT {
*(.interp)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.note.gnu.build-id : ALIGN_WITH_INPUT {
*(.note.gnu.build-id)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.hash : ALIGN_WITH_INPUT {
*(.hash)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.hash : ALIGN_WITH_INPUT {
*(.gnu.hash)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.dynsym : ALIGN_WITH_INPUT {
*(.dynsym)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.dynstr : ALIGN_WITH_INPUT {
*(.dynstr)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.version : ALIGN_WITH_INPUT {
*(.gnu.version)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.version_d : ALIGN_WITH_INPUT {
*(.gnu.version_d)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.gnu.version_r : ALIGN_WITH_INPUT {
*(.gnu.version_r)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rel.dyn : ALIGN_WITH_INPUT {
*(.rel.init)
*(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
*(.rel.fini)
*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
*(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
*(.rel.ctors)
*(.rel.dtors)
*(.rel.got)
*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
PROVIDE_HIDDEN (__rel_iplt_start = .);
*(.rel.iplt)
PROVIDE_HIDDEN (__rel_iplt_end = .);
PROVIDE_HIDDEN (__rela_iplt_start = .);
PROVIDE_HIDDEN (__rela_iplt_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rela.dyn : ALIGN_WITH_INPUT {
*(.rela.init)
*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
*(.rela.fini)
*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
*(.rela.ctors)
*(.rela.dtors)
*(.rela.got)
*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
*(.rela.rtemsroset*)
*(.rela.rtemsrwset*)
PROVIDE_HIDDEN (__rel_iplt_start = .);
PROVIDE_HIDDEN (__rel_iplt_end = .);
PROVIDE_HIDDEN (__rela_iplt_start = .);
*(.rela.iplt)
PROVIDE_HIDDEN (__rela_iplt_end = .);
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rel.plt : ALIGN_WITH_INPUT {
*(.rel.plt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rela.plt : ALIGN_WITH_INPUT {
*(.rela.plt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.plt : ALIGN_WITH_INPUT {
*(.plt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.iplt : ALIGN_WITH_INPUT {
*(.iplt)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.dynamic : ALIGN_WITH_INPUT {
*(.dynamic)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.tm_clone_table : ALIGN_WITH_INPUT {
*(.tm_clone_table)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.got : ALIGN_WITH_INPUT {
*(.got.plt) *(.igot.plt) *(.got) *(.igot)
} > REGION_RODATA AT > REGION_RODATA_LOAD
.rtemsroset : ALIGN_WITH_INPUT {
/* Special FreeBSD linker set sections */
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = .;
*(set_domain_*);
*(set_pseudo_*);
KEEP (*(SORT(.rtemsroset.*)))
bsp_section_rodata_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin;
bsp_section_rodata_load_begin = LOADADDR (.rodata);
bsp_section_rodata_load_end = bsp_section_rodata_load_begin + bsp_section_rodata_size;
.rwbarrier : ALIGN_WITH_INPUT {
. = ALIGN (bsp_section_rwbarrier_align);
} > REGION_DATA AT > REGION_DATA
.vector : ALIGN_WITH_INPUT {
bsp_section_vector_begin = .;
. = . + DEFINED (bsp_vector_table_in_start_section) ? 0 : bsp_vector_table_size;
bsp_section_vector_end = .;
} > REGION_VECTOR AT > REGION_VECTOR
bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_begin;
bsp_vector_table_begin = DEFINED (bsp_vector_table_in_start_section) ? bsp_section_start_begin : bsp_section_vector_begin;
bsp_vector_table_end = bsp_vector_table_begin + bsp_vector_table_size;
.fast_text : ALIGN_WITH_INPUT {
bsp_section_fast_text_begin = .;
*(.bsp_fast_text)
bsp_section_fast_text_end = .;
} > REGION_FAST_TEXT AT > REGION_FAST_TEXT_LOAD
bsp_section_fast_text_size = bsp_section_fast_text_end - bsp_section_fast_text_begin;
bsp_section_fast_text_load_begin = LOADADDR (.fast_text);
bsp_section_fast_text_load_end = bsp_section_fast_text_load_begin + bsp_section_fast_text_size;
.fast_data : ALIGN_WITH_INPUT {
bsp_section_fast_data_begin = .;
*(.bsp_fast_data)
bsp_section_fast_data_end = .;
} > REGION_FAST_DATA AT > REGION_FAST_DATA_LOAD
bsp_section_fast_data_size = bsp_section_fast_data_end - bsp_section_fast_data_begin;
bsp_section_fast_data_load_begin = LOADADDR (.fast_data);
bsp_section_fast_data_load_end = bsp_section_fast_data_load_begin + bsp_section_fast_data_size;
.data : ALIGN_WITH_INPUT {
bsp_section_data_begin = .;
*(.data .data.* .gnu.linkonce.d.*)
SORT(CONSTRUCTORS)
} > REGION_DATA AT > REGION_DATA_LOAD
.data1 : ALIGN_WITH_INPUT {
*(.data1)
} > REGION_DATA AT > REGION_DATA_LOAD
.rtemsrwset : ALIGN_WITH_INPUT {
KEEP (*(SORT(.rtemsrwset.*)))
bsp_section_data_end = .;
} > REGION_DATA AT > REGION_DATA_LOAD
bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin;
bsp_section_data_load_begin = LOADADDR (.data);
bsp_section_data_load_end = bsp_section_data_load_begin + bsp_section_data_size;
.bss : ALIGN_WITH_INPUT {
bsp_section_bss_begin = .;
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
bsp_section_bss_end = .;
} > REGION_BSS AT > REGION_BSS
bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin;
.rtemsstack (NOLOAD) : ALIGN_WITH_INPUT {
bsp_section_rtemsstack_begin = .;
*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.rtemsstack*)))
bsp_section_rtemsstack_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_rtemsstack_size = bsp_section_rtemsstack_end - bsp_section_rtemsstack_begin;
.noinit (NOLOAD) : ALIGN_WITH_INPUT {
bsp_section_noinit_begin = .;
*(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
bsp_section_noinit_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_noinit_size = bsp_section_noinit_end - bsp_section_noinit_begin;
.work : ALIGN_WITH_INPUT {
/*
* The work section will occupy the remaining REGION_WORK region and
* contains the RTEMS work space and heap.
*/
bsp_section_work_begin = .;
. += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.);
bsp_section_work_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin;
.stack : ALIGN_WITH_INPUT {
/*
* The stack section will occupy the remaining REGION_STACK region and may
* contain the task stacks. Depending on the region distribution this
* section may be of zero size.
*/
bsp_section_stack_begin = .;
. += ORIGIN (REGION_STACK) + LENGTH (REGION_STACK) - ABSOLUTE (.);
bsp_section_stack_end = .;
} > REGION_STACK AT > REGION_STACK
bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_begin;
.nocache : ALIGN_WITH_INPUT {
bsp_section_nocache_begin = .;
*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_nocache*)))
bsp_section_nocache_end = .;
} > REGION_NOCACHE AT > REGION_NOCACHE_LOAD
bsp_section_nocache_size = bsp_section_nocache_end - bsp_section_nocache_begin;
bsp_section_nocache_load_begin = LOADADDR (.nocache);
bsp_section_nocache_load_end = bsp_section_nocache_load_begin + bsp_section_nocache_size;
.nocachenoload (NOLOAD) : ALIGN_WITH_INPUT {
bsp_section_nocachenoload_begin = .;
*(SORT_BY_ALIGNMENT (SORT_BY_NAME (.bsp_noload_nocache*)))
bsp_section_nocacheheap_begin = .;
. += ORIGIN (REGION_NOCACHE) + LENGTH (REGION_NOCACHE) - ABSOLUTE (.);
bsp_section_nocacheheap_end = .;
bsp_section_nocachenoload_end = .;
} > REGION_NOCACHE AT > REGION_NOCACHE
bsp_section_nocacheheap_size = bsp_section_nocacheheap_end - bsp_section_nocacheheap_begin;
bsp_section_nocachenoload_size = bsp_section_nocachenoload_end - bsp_section_nocachenoload_begin;
/* FIXME */
RamBase = ORIGIN (REGION_WORK);
RamSize = LENGTH (REGION_WORK);
RamEnd = RamBase + RamSize;
WorkAreaBase = bsp_section_work_begin;
HeapSize = 0;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1. */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions. */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2. */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2. */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions. */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3. */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* DWARF 5. */
.debug_addr 0 : { *(.debug_addr) }
.debug_line_str 0 : { *(.debug_line_str) }
.debug_loclists 0 : { *(.debug_loclists) }
.debug_macro 0 : { *(.debug_macro) }
.debug_names 0 : { *(.debug_names) }
.debug_rnglists 0 : { *(.debug_rnglists) }
.debug_str_offsets 0 : { *(.debug_str_offsets) }
.debug_sup 0 : { *(.debug_sup) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
/* Addition to let linker know about custom section for GDB pretty-printing support. */
.debug_gdb_scripts 0 : { *(.debug_gdb_scripts) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
/*
* This is a RTEMS specific section to catch all unexpected input
* sections. In case you get an error like
* "section `.unexpected_sections' will not fit in region
* `UNEXPECTED_SECTIONS'"
* you have to figure out the offending input section and add it to the
* appropriate output section definition above.
*/
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
}

View File

@@ -1,47 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief This source file contains the
* _AArch64_Get_current_processor_for_system_start() default implementation
* using the MPIDR_EL1.
*/
/*
* Copyright (C) 2024 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/asm.h>
FUNCTION_ENTRY(_AArch64_Get_current_processor_for_system_start)
/* Return the affinity level 0 reported by the MPIDR_EL1 */
mrs x0, mpidr_el1
and x0, x0, #0xff
ret
FUNCTION_END(_AArch64_Get_current_processor_for_system_start)

View File

@@ -1,346 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief Boot and system start code.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/asm.h>
#include <rtems/score/percpu.h>
#include <bspopts.h>
/* Global symbols */
.globl _start
.section ".bsp_start_text", "ax"
/* Start entry */
_start:
/*
* We do not save the context since we do not return to the boot
* loader but preserve x1 and x2 to allow access to bootloader parameters
*/
#ifndef BSP_START_NEEDS_REGISTER_INITIALIZATION
mov x5, x1 /* machine type number or ~0 for DT boot */
mov x6, x2 /* physical address of ATAGs or DTB */
#else /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
/*
* This block is dead code. No aarch64 targets require this. It might be
* needed for hardware simulations or in future processor variants with
* lock-step cores.
*/
mov x0, XZR
mov x1, XZR
mov x2, XZR
mov x3, XZR
mov x4, XZR
mov x5, XZR
mov x6, XZR
mov x7, XZR
mov x8, XZR
mov x9, XZR
mov x10, XZR
mov x11, XZR
mov x12, XZR
mov x13, XZR
mov x14, XZR
mov x15, XZR
mov x16, XZR
mov x17, XZR
mov x18, XZR
mov x19, XZR
mov x20, XZR
mov x21, XZR
mov x22, XZR
mov x23, XZR
mov x24, XZR
mov x25, XZR
mov x26, XZR
mov x27, XZR
mov x28, XZR
mov x29, XZR
mov x30, XZR
#ifdef AARCH64_MULTILIB_VFP
mov CPTR_EL3, XZR
mov CPTR_EL2, XZR
mov d0, XZR
mov d1, XZR
mov d2, XZR
mov d3, XZR
mov d4, XZR
mov d5, XZR
mov d6, XZR
mov d7, XZR
mov d8, XZR
mov d9, XZR
mov d10, XZR
mov d11, XZR
mov d12, XZR
mov d13, XZR
mov d14, XZR
mov d15, XZR
mov d16, XZR
mov d17, XZR
mov d18, XZR
mov d19, XZR
mov d20, XZR
mov d21, XZR
mov d22, XZR
mov d23, XZR
mov d24, XZR
mov d25, XZR
mov d26, XZR
mov d27, XZR
mov d28, XZR
mov d29, XZR
mov d30, XZR
mov d31, XZR
#endif /* AARCH64_MULTILIB_VFP */
#endif /* BSP_START_NEEDS_REGISTER_INITIALIZATION */
/* Initialize SCTLR_EL1 */
mov x0, XZR
#if defined(RTEMS_DEBUG)
/* Enable Stack alignment checking */
orr x0, x0, #(1<<3)
#endif
msr SCTLR_EL1, x0
#if defined(BSP_START_ENABLE_EL2_START_SUPPORT) || \
defined(BSP_START_ENABLE_EL3_START_SUPPORT)
mrs x0, CurrentEL
cmp x0, #(1<<2)
b.eq .L_el1_start
#endif
#if defined(BSP_START_ENABLE_EL3_START_SUPPORT)
cmp x0, #(2<<2)
b.eq .L_el2_start
.L_el3_start:
/*
* Before leaving the Secure World, we need to initialize the GIC. We
* do that here in an early stack context in EL3. This will NOT work
* on secondary core boot! We assume only the primary boot core will
* start in EL3 if any. Usually on real hardware, we should be running
* on top of trusted firmware and will not boot in EL3. Qemu fakes it
* for us and will start the primary core in EL3 and secondary cores
* will be brought up in EL1NS as expected.
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_ISR_Stack_size
ldr w2, =_ISR_Stack_area_begin
#else
ldr x1, =_ISR_Stack_size
ldr x2, =_ISR_Stack_area_begin
#endif
add x3, x1, x2
/* using SP0 for the early init stack context at EL3 */
msr spsel, #0
mov sp, x3
/*
* Invoke the start hook 0.
* We don't set up exception handling, so this hook better behave.
*/
bl bsp_start_hook_0
/* Drop from EL3 to EL2 */
/* Initialize HCR_EL2 and SCTLR_EL2 */
msr HCR_EL2, XZR
msr SCTLR_EL2, XZR
/* Set EL2 Execution state via SCR_EL3 */
mrs x0, SCR_EL3
/* Set EL2 to AArch64 */
orr x0, x0, #(1<<10)
/* Set EL1 to NS */
orr x0, x0, #1
msr SCR_EL3, x0
/* set EL2h mode for eret */
mov x0, #0b01001
msr SPSR_EL3, x0
/* Set EL2 entry point */
adr x0, .L_el2_start
msr ELR_EL3, x0
eret
#endif
#if defined(BSP_START_ENABLE_EL2_START_SUPPORT) || \
defined(BSP_START_ENABLE_EL3_START_SUPPORT)
.L_el2_start:
/* Drop from EL2 to EL1 */
/* Configure HCR_EL2 */
mrs x0, HCR_EL2
/* Set EL1 Execution state to AArch64 */
orr x0, x0, #(1<<31)
/* Disable ID traps */
bic x0, x0, #(1<<15)
bic x0, x0, #(1<<16)
bic x0, x0, #(1<<17)
bic x0, x0, #(1<<18)
msr HCR_EL2, x0
/* Set to EL1h mode for eret */
mov x0, #0b00101
msr SPSR_EL2, x0
/* Set EL1 entry point */
adr x0, .L_el1_start
msr ELR_EL2, x0
eret
.L_el1_start:
#endif
#ifdef RTEMS_SMP
bl _AArch64_Get_current_processor_for_system_start
/*
* Check that this is a configured processor. If not, then there is
* not much that can be done since we do not have a stack available for
* this processor. Just loop forever in this case.
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_SMP_Processor_configured_maximum
#else
ldr x1, =_SMP_Processor_configured_maximum
#endif
ldr w1, [x1]
cmp x1, x0
bgt .Lconfigured_processor
.Linvalid_processor_wait_for_ever:
wfe
b .Linvalid_processor_wait_for_ever
.Lconfigured_processor:
/*
* Get current per-CPU control and store it in PL1 only Thread ID
* Register (TPIDR_EL1).
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_Per_CPU_Information
#else
ldr x1, =_Per_CPU_Information
#endif
add x1, x1, x0, lsl #PER_CPU_CONTROL_SIZE_LOG2
msr TPIDR_EL1, x1
#endif
/* Calculate interrupt stack area end for current processor */
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =_ISR_Stack_size
#else
ldr x1, =_ISR_Stack_size
#endif
#ifdef RTEMS_SMP
add x3, x0, #1
mul x1, x1, x3
#endif
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w2, =_ISR_Stack_area_begin
#else
ldr x2, =_ISR_Stack_area_begin
#endif
add x3, x1, x2
/* Disable interrupts and debug */
msr DAIFSet, #0xa
#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
mov x8, XZR
mov x9, XZR
mov x10, XZR
mov x11, XZR
mov x12, XZR
mov x13, XZR
mov x14, XZR
mov x15, XZR
#endif
/*
* SPx: the stack pointer corresponding to the current exception level
* Normal operation for RTEMS on AArch64 uses SPx and runs on EL1
* Exception operation (synchronous errors, IRQ, FIQ, System Errors) uses SP0
*/
#ifdef AARCH64_MULTILIB_ARCH_V8_ILP32
ldr w1, =bsp_stack_exception_size
#else
ldr x1, =bsp_stack_exception_size
#endif
/* Switch to SP0 and set exception stack */
msr spsel, #0
mov sp, x3
/* Switch back to SPx for normal operation */
msr spsel, #1
sub x3, x3, x1
/* Set SP1 stack used for normal operation */
mov sp, x3
/* Stay in EL1 mode */
#ifdef AARCH64_MULTILIB_VFP
#ifdef AARCH64_MULTILIB_HAS_CPACR
/* Read CPACR */
mrs x0, CPACR_EL1
/* Enable EL1 access permissions for CP10 */
orr x0, x0, #(1 << 20)
/* Write CPACR */
msr CPACR_EL1, x0
isb
#endif
/* FPU does not need to be enabled on AArch64 */
/* Ensure FPU traps are disabled by default */
mrs x0, FPCR
bic x0, x0, #((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12))
bic x0, x0, #(1 << 15)
msr FPCR, x0
#endif /* AARCH64_MULTILIB_VFP */
/* Branch to start hook 1 */
bl bsp_start_hook_1
/* Branch to boot card */
mov x0, #0
bl boot_card

View File

@@ -1,145 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This source file contains this BSP's console configuration.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/console.h>
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
#include <bsp/irq.h>
#include <dev/serial/arm-pl011.h>
#include <dev/serial/versal-uart.h>
#include <bspopts.h>
static versal_pl011_context versal_uart_instances[2] = {
{
.pl011_ctx = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Versal UART 0"),
.regs = (arm_pl011_uart *) 0xff000000,
.irq = VERSAL_IRQ_UART_0,
.clock = VERSAL_CLOCK_UART,
.initial_baud = VERSAL_UART_DEFAULT_BAUD
}
}, {
.pl011_ctx = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Versal UART 1"),
.regs = (arm_pl011_uart *) 0xff010000,
.irq = VERSAL_IRQ_UART_1,
.clock = VERSAL_CLOCK_UART,
.initial_baud = VERSAL_UART_DEFAULT_BAUD
}
}
};
rtems_status_code console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
size_t i;
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(versal_uart_instances); ++i) {
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
rtems_termios_device_install(
&uart[0],
&versal_uart_handler,
NULL,
&versal_uart_instances[i].pl011_ctx.base
);
if (i == BSP_CONSOLE_MINOR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
return RTEMS_SUCCESSFUL;
}
void versal_debug_console_flush(void)
{
versal_uart_reset_tx_flush(
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base
);
}
static void versal_debug_console_out(char c)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
arm_pl011_write_polled(base, c);
}
static void versal_debug_console_init(void)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
(void) versal_uart_initialize(base);
BSP_output_char = versal_debug_console_out;
}
static void versal_debug_console_early_init(char c)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
(void) versal_uart_initialize(base);
BSP_output_char = versal_debug_console_out;
versal_debug_console_out(c);
}
static int versal_debug_console_in(void)
{
rtems_termios_device_context *base =
&versal_uart_instances[BSP_CONSOLE_MINOR].pl011_ctx.base;
return arm_pl011_read_polled(base);
}
BSP_output_char_function_type BSP_output_char = versal_debug_console_early_init;
BSP_polling_getchar_function_type BSP_poll_char = versal_debug_console_in;
RTEMS_SYSINIT_ITEM(
versal_debug_console_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);

View File

@@ -1,378 +0,0 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2022 Chris Johns <chris@contemporary.software>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <dev/serial/versal-uart.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/irq.h>
#include <bspopts.h>
static uint32_t versal_uart_intr_all(void)
{
return PL011_UARTI_OEI |
PL011_UARTI_BEI |
PL011_UARTI_PEI |
PL011_UARTI_FEI |
PL011_UARTI_RTI |
PL011_UARTI_TXI |
PL011_UARTI_RXI |
PL011_UARTI_DSRMI |
PL011_UARTI_DCDMI |
PL011_UARTI_CTSMI |
PL011_UARTI_RIMI;
}
#ifdef BSP_CONSOLE_USE_INTERRUPTS
static void versal_uart_intr_clear(volatile arm_pl011_uart *regs, uint32_t ints)
{
regs->base.uarticr = ints;
}
static void versal_uart_intr_clearall(volatile arm_pl011_uart *regs)
{
versal_uart_intr_clear(regs, versal_uart_intr_all());
}
static void versal_uart_intr_enable(volatile arm_pl011_uart *regs, uint32_t ints)
{
regs->base.uartimsc |= ints;
}
#endif
static void versal_uart_intr_disable(volatile arm_pl011_uart *regs, uint32_t ints)
{
regs->base.uartimsc &= ~ints;
}
static void versal_uart_intr_disableall(volatile arm_pl011_uart *regs)
{
versal_uart_intr_disable(regs, versal_uart_intr_all());
}
#ifdef BSP_CONSOLE_USE_INTERRUPTS
static bool versal_uart_flags_clear(volatile arm_pl011_uart *regs, uint32_t flags)
{
return (regs->base.uartfr & flags) == 0;
}
static void versal_uart_interrupt(void *arg)
{
rtems_termios_tty *tty = arg;
versal_pl011_context *ctx = rtems_termios_get_device_context(tty);
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
uint32_t uartmis = regs->base.uartmis;
versal_uart_intr_clear(regs, uartmis);
if ((uartmis & (PL011_UARTI_RTI | PL011_UARTI_RXI)) != 0) {
char buf[32];
int c = 0;
while (c < sizeof(buf) &&
versal_uart_flags_clear(regs, PL011_UARTFR_RXFE)) {
buf[c++] = (char) PL011_UARTDR_DATA_GET(regs->base.uartdr);
}
rtems_termios_enqueue_raw_characters(tty, buf, c);
}
if (ctx->transmitting) {
int sent = ctx->pl011_ctx.tx_queued_chars;
ctx->transmitting = false;
ctx->pl011_ctx.tx_queued_chars = 0;
versal_uart_intr_disable(regs, PL011_UARTI_TXI);
rtems_termios_dequeue_characters(tty, sent);
}
}
#endif
void versal_uart_reset_tx_flush(rtems_termios_device_context *base)
{
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) arm_pl011_get_regs(base);
int c = 4;
while (c-- > 0) {
arm_pl011_write_polled(base, '\r');
}
while ((regs->base.uartfr & PL011_UARTFR_TXFE) == 0) {
/* Wait for empty */
}
while ((regs->base.uartfr & PL011_UARTFR_BUSY) != 0) {
/* Wait for empty */
}
}
int versal_uart_initialize(rtems_termios_device_context *base)
{
volatile pl011_base *regs = (volatile pl011_base *)arm_pl011_get_regs(base);
arm_pl011_context *ctx = (arm_pl011_context *) base;
uint32_t maxerr = 3;
uint32_t ibauddiv = 0;
uint32_t fbauddiv = 0;
int rv;
versal_uart_reset_tx_flush(base);
rv = arm_pl011_compute_baudrate_params(
&ibauddiv,
&fbauddiv,
VERSAL_UART_DEFAULT_BAUD,
ctx->clock,
maxerr
);
if (rv != 0) {
return rv;
}
/* Line control: 8-bit word length, no parity, no FIFO, 1 stop bit */
regs->uartlcr_h = PL011_UARTLCR_H_WLEN( PL011_UARTLCR_H_WLEN_8 )
| PL011_UARTLCR_H_FEN;
/* Control: receive, transmit, uart enable, no CTS, no RTS, no loopback */
regs->uartcr = PL011_UARTCR_RXE
| PL011_UARTCR_TXE
| PL011_UARTCR_UARTEN;
regs->uartibrd = ibauddiv;
regs->uartfbrd = fbauddiv;
return 0;
}
static bool versal_uart_first_open(
rtems_termios_tty *tty,
rtems_termios_device_context *base,
struct termios *term,
rtems_libio_open_close_args_t *args
)
{
#ifdef BSP_CONSOLE_USE_INTERRUPTS
versal_pl011_context *ctx = (versal_pl011_context *) base;
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
rtems_status_code sc;
ctx->transmitting = false;
ctx->pl011_ctx.tx_queued_chars = 0;
ctx->pl011_ctx.needs_sw_triggered_tx_irq = true;
#endif
rtems_termios_set_initial_baud(tty, VERSAL_UART_DEFAULT_BAUD);
versal_uart_initialize(base);
#ifdef BSP_CONSOLE_USE_INTERRUPTS
regs->base.uartifls = PL011_UARTIFLS_RXIFLSEL(2) | PL011_UARTIFLS_TXIFLSEL(2);
regs->base.uartlcr_h |= PL011_UARTLCR_H_FEN;
versal_uart_intr_disableall(regs);
sc = rtems_interrupt_handler_install(
ctx->pl011_ctx.irq,
"UART",
RTEMS_INTERRUPT_SHARED,
versal_uart_interrupt,
tty
);
if (sc != RTEMS_SUCCESSFUL) {
return false;
}
versal_uart_intr_clearall(regs);
versal_uart_intr_enable(regs, PL011_UARTI_RTI | PL011_UARTI_RXI);
#endif
return true;
}
#ifdef BSP_CONSOLE_USE_INTERRUPTS
static void versal_uart_last_close(
rtems_termios_tty *tty,
rtems_termios_device_context *base,
rtems_libio_open_close_args_t *args
)
{
versal_pl011_context *ctx = (versal_pl011_context *) base;
rtems_interrupt_handler_remove(ctx->pl011_ctx.irq, versal_uart_interrupt, tty);
}
#endif
static void versal_uart_write_support(
rtems_termios_device_context *base,
const char *buf,
size_t len
)
{
#ifdef BSP_CONSOLE_USE_INTERRUPTS
versal_pl011_context *ctx = (versal_pl011_context *) base;
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
if (len > 0) {
size_t len_remaining = len;
const char *p = &buf[0];
versal_uart_intr_enable(regs, PL011_UARTI_TXI);
/*
* The PL011 IP in the Versal needs preloading the TX FIFO with
* exactly 17 characters for the first TX interrupt to be
* generated.
*/
if (ctx->pl011_ctx.needs_sw_triggered_tx_irq) {
ctx->pl011_ctx.needs_sw_triggered_tx_irq = false;
for (int i = 0; i < 17; ++i) {
regs->base.uartdr = PL011_UARTDR_DATA('\r');
}
}
while (versal_uart_flags_clear(regs, PL011_UARTFR_TXFF) &&
len_remaining > 0) {
regs->base.uartdr = PL011_UARTDR_DATA(*p++);
--len_remaining;
}
ctx->pl011_ctx.tx_queued_chars = len - len_remaining;
ctx->transmitting = true;
}
#else
ssize_t i;
for (i = 0; i < len; ++i) {
arm_pl011_write_polled(base, buf[i]);
}
#endif
}
static bool versal_uart_set_attributes(
rtems_termios_device_context *context,
const struct termios *term
)
{
versal_pl011_context *ctx = (versal_pl011_context *) context;
volatile arm_pl011_uart *regs = (volatile arm_pl011_uart *) ctx->pl011_ctx.regs;
int32_t baud;
uint32_t ibauddiv = 0;
uint32_t fbauddiv = 0;
uint32_t mode = 0;
int rc;
/*
* Determine the baud rate
*/
baud = rtems_termios_baud_to_number(term->c_ospeed);
if (baud > 0) {
uint32_t maxerr = 3;
rc = arm_pl011_compute_baudrate_params(
&ibauddiv,
&fbauddiv,
baud,
ctx->pl011_ctx.clock,
maxerr
);
if (rc != 0) {
return rc;
}
}
/*
* Configure the mode register
*/
mode = regs->base.uartlcr_h & PL011_UARTLCR_H_FEN;
/*
* Parity
*/
if ((term->c_cflag & PARENB) != 0) {
mode |= PL011_UARTLCR_H_PEN;
if ((term->c_cflag & PARODD) == 0) {
mode |= PL011_UARTLCR_H_EPS;
}
}
/*
* Character Size
*/
switch (term->c_cflag & CSIZE)
{
case CS5:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_5);
break;
case CS6:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_6);
break;
case CS7:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_7);
break;
case CS8:
default:
mode = PL011_UARTLCR_H_WLEN_SET(mode, PL011_UARTLCR_H_WLEN_8);
break;
}
/*
* Stop Bits
*/
if (term->c_cflag & CSTOPB) {
/* 2 stop bits */
mode |= PL011_UARTLCR_H_STP2;
}
versal_uart_intr_disableall(regs);
/*
* Wait for any data in the TXFIFO to be sent then wait while the
* transmiter is active.
*/
while ((regs->base.uartfr & PL011_UARTFR_TXFE) == 0 ||
(regs->base.uartfr & PL011_UARTFR_BUSY) != 0) {
/* Wait */
}
regs->base.uartcr = PL011_UARTCR_UARTEN;
/* Ignore baud rate of B0. There are no modem control lines to de-assert */
if (baud > 0) {
regs->base.uartibrd = ibauddiv;
regs->base.uartfbrd = fbauddiv;
}
regs->base.uartlcr_h = mode;
/* Control: receive, transmit, uart enable, no CTS, no RTS, no loopback */
regs->base.uartcr = PL011_UARTCR_RXE
| PL011_UARTCR_TXE
| PL011_UARTCR_UARTEN;
#ifdef BSP_CONSOLE_USE_INTERRUPTS
versal_uart_intr_clearall(regs);
versal_uart_intr_enable(regs, PL011_UARTI_RTI | PL011_UARTI_RXI);
#endif
return true;
}
const rtems_termios_device_handler versal_uart_handler = {
.first_open = versal_uart_first_open,
.set_attributes = versal_uart_set_attributes,
.write = versal_uart_write_support,
#ifdef BSP_CONSOLE_USE_INTERRUPTS
.last_close = versal_uart_last_close,
.mode = TERMIOS_IRQ_DRIVEN
#else
.poll_read = arm_pl011_read_polled,
.mode = TERMIOS_POLLED
#endif
};

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@@ -1,94 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This header file provides the core BSP definitions
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_XILINX_VERSAL_BSP_H
#define LIBBSP_AARCH64_XILINX_VERSAL_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#define BSP_RESET_SMC
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/linker-symbols.h>
#include <bsp/start.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0xf9040000
#define BSP_ARM_GIC_DIST_BASE 0xf9000000
#define BSP_ARM_GIC_REDIST_BASE 0xf9080000
/*
* DDRMC mapping
*/
LINKER_SYMBOL(bsp_r0_ram_base)
LINKER_SYMBOL(bsp_r0_ram_end)
LINKER_SYMBOL(bsp_r1_ram_base)
LINKER_SYMBOL(bsp_r1_ram_end)
/**
* @brief Versal specific set up of the MMU.
*
* Provide in the application to override the defaults in the BSP.
*/
BSP_START_TEXT_SECTION void versal_setup_mmu_and_cache(void);
void versal_debug_console_flush(void);
uint32_t versal_clock_i2c0(void);
uint32_t versal_clock_i2c1(void);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_XILINX_VERSAL_BSP_H */

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@@ -1,64 +0,0 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2022 Chris Johns <chris@contemporary.software>
* Copyright (C) 2014 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_ARM_XILINX_VERSAL_I2C_H
#define LIBBSP_ARM_XILINX_VERSAL_I2C_H
#include <dev/i2c/cadence-i2c.h>
#include <bsp/irq.h>
#include <bsp.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
static inline int versal_register_i2c_0(void)
{
return i2c_bus_register_cadence(
"/dev/i2c-0",
0x00FF020000,
versal_clock_i2c0(),
VERSAL_IRQ_I2C_0
);
}
static inline int versal_register_i2c_1(void)
{
return i2c_bus_register_cadence(
"/dev/i2c-1",
0x00FF030000,
versal_clock_i2c1(),
VERSAL_IRQ_I2C_1
);
}
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_XILINX_VERSAL_I2C_H */

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@@ -1,74 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This header file provides the BSP's IRQ definitions.
*/
/*
* Copyright (C) Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H
#define LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <dev/irq/arm-gic-irq.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_INTERRUPT_VECTOR_COUNT 1020
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_S_PPI 29
#define BSP_TIMER_PHYS_NS_PPI 30
#define VERSAL_IRQ_I2C_0 46
#define VERSAL_IRQ_I2C_1 47
#define VERSAL_IRQ_UART_0 50
#define VERSAL_IRQ_UART_1 51
#define VERSAL_IRQ_ETHERNET_0 88
#define VERSAL_IRQ_ETHERNET_0_WAKEUP 89
#define VERSAL_IRQ_ETHERNET_1 90
#define VERSAL_IRQ_ETHERNET_1_WAKEUP 91
#define VERSAL_IRQ_QSPI 157
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H */

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@@ -1,41 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsArmXilinxVersal
*
* @brief This header file provides BSP-specific interfaces.
*/
/*
* Copyright (C) 2024 On-Line Applications Research Corporation (OAR)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_ARM_XILINX_ZYNQMP_RPU_BSP_XIL_COMPAT_H
#define LIBBSP_ARM_XILINX_ZYNQMP_RPU_BSP_XIL_COMPAT_H
#include <bsp/xil-compat-common.h>
#endif

View File

@@ -1,73 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup versal_uart
*
* @brief Xilinx Versal UART support.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_ARM_XILINX_VERSAL_UART_H
#define LIBBSP_ARM_XILINX_VERSAL_UART_H
#include <rtems/termiostypes.h>
#include <dev/serial/arm-pl011.h>
#include <dev/serial/arm-pl011-regs.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup versal_uart Xilinx Versal UART Support
* @ingroup RTEMSBSPsARMVersal
* @brief UART Support
*
* This driver operates an instance of the Xilinx UART present in the
* family of Xilinx Versal SoCs.
*/
typedef struct {
arm_pl011_context pl011_ctx;
volatile bool transmitting;
} versal_pl011_context;
extern const rtems_termios_device_handler versal_uart_handler;
#define VERSAL_UART_DEFAULT_BAUD 115200
int versal_uart_initialize(rtems_termios_device_context *base);
void versal_uart_reset_tx_flush(rtems_termios_device_context *base);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_XILINX_VERSAL_UART_H */

View File

@@ -1,45 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This header file provides functionality for the tm27 test.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */

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@@ -1,60 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This source file contains the implementation of bsp_start().
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
#include <rtems/score/basedefs.h>
RTEMS_WEAK uint32_t versal_clock_i2c0(void)
{
return VERSAL_CLOCK_I2C0;
}
RTEMS_WEAK uint32_t versal_clock_i2c1(void)
{
return VERSAL_CLOCK_I2C1;
}
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}

View File

@@ -1,54 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This source file contains the implementation of this BSP's startup
* hooks.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/irq-generic.h>
#include <bsp/start.h>
#ifdef BSP_START_ENABLE_EL3_START_SUPPORT
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
bsp_interrupt_facility_initialize();
}
#endif
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
versal_setup_mmu_and_cache();
bsp_start_clear_bss();
}

View File

@@ -1,136 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxVersal
*
* @brief This source file contains the default MMU tables and setup.
*/
/*
* Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/aarch64-mmu.h>
#include <libcpu/mmu-vmsav8-64.h>
#include <rtems/malloc.h>
#include <rtems/sysinit.h>
BSP_START_DATA_SECTION static const aarch64_mmu_config_entry
versal_mmu_config_table[] = {
AARCH64_MMU_DEFAULT_SECTIONS,
{ /* Devices */
.begin = 0xf1000000U,
.end = 0xf2000000U,
.flags = AARCH64_MMU_DEVICE
}, { /* APU GIC */
.begin = 0xf9000000U,
.end = 0xf90c0000U,
.flags = AARCH64_MMU_DEVICE
}, { /* FPD CSRs */
.begin = 0xfd000000U,
.end = 0xfe000000U,
.flags = AARCH64_MMU_DEVICE
}, { /* LPD CSRs */
.begin = 0xfe000000U,
.end = 0xfe800000U,
.flags = AARCH64_MMU_DEVICE
}, { /* LPD IOP CSRs and LPD peripherals */
.begin = 0xff000000U,
.end = 0xffc00000U,
.flags = AARCH64_MMU_DEVICE
}, { /* DDRMC0_region1_mem, if not used size is 0 and ignored */
.begin = (uintptr_t) bsp_r1_ram_base,
.end = (uintptr_t) bsp_r1_ram_end,
.flags = AARCH64_MMU_DATA_RW_CACHED
}
};
/*
* Create an MMU table to get the R1 base and end. This avoids
* relocation errors as the R1 addresses are in the upper A64 address
* space.
*
* The versal_mmu_config_table table cannot be used because the regions
* in that table have no identifiers to indicate which region is the
* the DDRMC0_region1_mem region.
*/
static const struct mem_region {
uintptr_t begin;
uintptr_t end;
} bsp_r1_region[] = {
{ /* DDRMC0_region1_mem, if not used size is 0 and ignored */
.begin = (uintptr_t) bsp_r1_ram_base,
.end = (uintptr_t) bsp_r1_ram_end,
}
};
/*
* Make weak and let the user override.
*/
BSP_START_TEXT_SECTION void
versal_setup_mmu_and_cache( void ) __attribute__ ((weak));
BSP_START_TEXT_SECTION void
versal_setup_mmu_and_cache( void )
{
aarch64_mmu_control *control = &aarch64_mmu_instance;
aarch64_mmu_setup();
aarch64_mmu_setup_translation_table(
control,
&versal_mmu_config_table[ 0 ],
RTEMS_ARRAY_SIZE( versal_mmu_config_table )
);
aarch64_mmu_enable( control );
}
void bsp_r1_heap_extend(void);
void bsp_r1_heap_extend(void)
{
const struct mem_region* r1 = &bsp_r1_region[0];
if (r1->begin != r1->end) {
rtems_status_code sc =
rtems_heap_extend((void*) r1->begin, r1->end - r1->begin);
if (sc != RTEMS_SUCCESSFUL) {
bsp_fatal(BSP_FATAL_HEAP_EXTEND_ERROR);
}
}
}
/*
* Initialise after the IDLE thread exists so the protected heap
* extend call has a valid context.
*/
RTEMS_SYSINIT_ITEM(
bsp_r1_heap_extend,
RTEMS_SYSINIT_IDLE_THREADS,
RTEMS_SYSINIT_ORDER_LAST
);

View File

@@ -1,101 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxZynqMP
*
* @brief This source file contains this BSP's console configuration.
*/
/*
* Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/console.h>
#include <rtems/endian.h>
#include <rtems/sysinit.h>
#include <rtems/termiostypes.h>
#include <bsp/aarch64-mmu.h>
#include <bsp/fdt.h>
#include <bsp/irq.h>
#include <dev/serial/zynq-uart.h>
#include <dev/serial/zynq-uart-regs.h>
#include <bspopts.h>
#include <libfdt.h>
#include <libchip/ns16550.h>
static zynq_uart_context zynqmp_uart_instances[2] = {
{
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),
.regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR,
.irq = ZYNQMP_IRQ_UART_0
}, {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),
.regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR,
.irq = ZYNQMP_IRQ_UART_1
}
};
rtems_status_code console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
size_t i;
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) {
zynq_uart_context *ctx = &zynqmp_uart_instances[i];
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
rtems_termios_device_install(
&uart[0],
&zynq_uart_handler,
NULL,
&ctx->base
);
if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
zynqmp_management_console_termios_init();
return RTEMS_SUCCESSFUL;
}
void zynqmp_debug_console_flush(void)
{
zynq_uart_reset_tx_flush((zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR);
}

View File

@@ -1,41 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxZynqMP
*
* @brief This source file contains the management console implementation.
*/
/*
* Copyright (C) 2024 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
void zynqmp_management_console_termios_init(void)
{
}

View File

@@ -1,190 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxZynqMP
*
* @brief This source file contains the management console implementation.
*/
/*
* Copyright (C) 2024 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/aarch64-mmu.h>
#include <bsp/fdt.h>
#include <libchip/ns16550.h>
#include <libfdt.h>
#include <rtems/endian.h>
#include <rtems/sysinit.h>
uint32_t mgmt_uart_reg_shift = 0;
static uint8_t get_register(uintptr_t addr, uint8_t i)
{
volatile uint8_t *reg = (uint8_t *) addr;
i <<= mgmt_uart_reg_shift;
return reg [i];
}
static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
{
volatile uint8_t *reg = (uint8_t *) addr;
i <<= mgmt_uart_reg_shift;
reg [i] = val;
}
static ns16550_context zynqmp_mgmt_uart_context = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management UART 0"),
.get_reg = get_register,
.set_reg = set_register,
.port = 0,
.irq = 0,
.clock = 0,
.initial_baud = 0,
};
__attribute__ ((weak)) void zynqmp_configure_management_console(rtems_termios_device_context *base)
{
/* This SLIP-encoded watchdog command sets timeouts to 0xFFFFFFFF seconds. */
const char mgmt_watchdog_cmd[] =
"\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0";
/* Send the system watchdog configuration command */
for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) {
ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]);
}
}
static void zynqmp_management_console_init(void)
{
/* Find the management console in the device tree */
const void *fdt = bsp_fdt_get();
const uint32_t *prop;
uint32_t outprop[4];
int proplen;
int node;
const char *alias = fdt_get_alias(fdt, "mgmtport");
if (alias == NULL) {
return;
}
node = fdt_path_offset(fdt, alias);
prop = fdt_getprop(fdt, node, "clock-frequency", &proplen);
if ( prop == NULL || proplen != 4 ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
zynqmp_mgmt_uart_context.clock = outprop[0];
prop = fdt_getprop(fdt, node, "current-speed", &proplen);
if ( prop == NULL || proplen != 4 ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
zynqmp_mgmt_uart_context.initial_baud = outprop[0];
prop = fdt_getprop(fdt, node, "interrupts", &proplen);
if ( prop == NULL || proplen != 12 ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]);
outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]);
/* proplen is in bytes, interrupt mapping expects a length in 32-bit cells */
zynqmp_mgmt_uart_context.irq = bsp_fdt_map_intr(outprop, proplen / 4);
if ( zynqmp_mgmt_uart_context.irq == 0 ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
prop = fdt_getprop(fdt, node, "reg", &proplen);
if ( prop == NULL || proplen != 16 ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]);
outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]);
outprop[3] = rtems_uint32_from_big_endian((const uint8_t *) &prop[3]);
zynqmp_mgmt_uart_context.port = ( ( (uint64_t) outprop[0] ) << 32 ) | outprop[1];
uintptr_t uart_base = zynqmp_mgmt_uart_context.port;
size_t uart_size = ( ( (uint64_t) outprop[2] ) << 32 ) | outprop[3];
rtems_status_code sc = aarch64_mmu_map( uart_base,
uart_size,
AARCH64_MMU_DEVICE);
if ( sc != RTEMS_SUCCESSFUL ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
prop = fdt_getprop(fdt, node, "reg-offset", &proplen);
if ( prop == NULL || proplen != 4 ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
zynqmp_mgmt_uart_context.port += outprop[0];
prop = fdt_getprop(fdt, node, "reg-shift", &proplen);
if ( prop == NULL || proplen != 4 ) {
zynqmp_mgmt_uart_context.port = 0;
return;
}
outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]);
mgmt_uart_reg_shift = outprop[0];
ns16550_probe(&zynqmp_mgmt_uart_context.base);
zynqmp_configure_management_console(&zynqmp_mgmt_uart_context.base);
}
RTEMS_SYSINIT_ITEM(
zynqmp_management_console_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_FIRST
);
void zynqmp_management_console_termios_init(void)
{
if ( zynqmp_mgmt_uart_context.port != 0 ) {
rtems_termios_device_install(
"/dev/ttyMGMT0",
&ns16550_handler_interrupt,
NULL,
&zynqmp_mgmt_uart_context.base
);
}
}

View File

@@ -1,129 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64XilinxZynqMP
*
* @brief This source file contains the implementation of zynqmp_ecc_init().
*/
/*
* Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/ecc_priv.h>
#include <bsp/irq.h>
#include <bsp/utility.h>
#include <rtems/score/aarch64-system-registers.h>
static Cache_Error_RAM_ID get_l1_ramid(uint64_t ramid)
{
switch (ramid) {
case 0x0:
return RAM_ID_L1I_TAG;
case 0x1:
return RAM_ID_L1I_DATA;
case 0x8:
return RAM_ID_L1D_TAG;
case 0x9:
return RAM_ID_L1D_DATA;
case 0xa:
return RAM_ID_L1D_DIRTY;
case 0x18:
return RAM_ID_TLB;
default:
return RAM_ID_UNKNOWN;
}
}
static Cache_Error_RAM_ID get_l2_ramid(uint64_t ramid)
{
switch (ramid) {
case 0x10:
return RAM_ID_L2_TAG;
case 0x11:
return RAM_ID_L2_DATA;
case 0x12:
return RAM_ID_SCU;
default:
return RAM_ID_UNKNOWN;
}
}
static void cache_handler(void *arg)
{
uint64_t l1val = _AArch64_Read_cpumerrsr_el1();
_AArch64_Write_cpumerrsr_el1(l1val);
uint64_t l2val = _AArch64_Read_l2merrsr_el1();
_AArch64_Write_l2merrsr_el1(l2val);
(void) arg;
if (l1val & AARCH64_CPUMERRSR_EL1_VALID) {
/* parse L1 data */
Cache_Error_Info cerr = {0, };
cerr.abort = l1val & AARCH64_CPUMERRSR_EL1_FATAL;
cerr.repeats = AARCH64_CPUMERRSR_EL1_REPEATERR_GET(l1val);
cerr.other_errors = AARCH64_CPUMERRSR_EL1_OTHERERR_GET(l1val);
cerr.ramid = get_l1_ramid(AARCH64_CPUMERRSR_EL1_RAMID_GET(l1val));
cerr.segment = AARCH64_CPUMERRSR_EL1_CPUIDWAY_GET(l1val);
cerr.address = AARCH64_CPUMERRSR_EL1_ADDR_GET(l1val);
zynqmp_invoke_ecc_handler(L1_CACHE, &cerr);
}
if (l2val & AARCH64_L2MERRSR_EL1_VALID) {
/* parse L2 data */
Cache_Error_Info cerr = {0, };
cerr.abort = l2val & AARCH64_L2MERRSR_EL1_FATAL;
cerr.repeats = AARCH64_L2MERRSR_EL1_REPEATERR_GET(l2val);
cerr.other_errors = AARCH64_L2MERRSR_EL1_OTHERERR_GET(l2val);
cerr.ramid = get_l2_ramid(AARCH64_L2MERRSR_EL1_RAMID_GET(l2val));
cerr.segment = AARCH64_L2MERRSR_EL1_CPUIDWAY_GET(l2val);
cerr.address = AARCH64_L2MERRSR_EL1_ADDR_GET(l2val);
zynqmp_invoke_ecc_handler(L2_CACHE, &cerr);
}
}
static rtems_interrupt_entry zynqmp_cache_ecc_entry;
rtems_status_code zynqmp_configure_cache_ecc( void )
{
rtems_interrupt_entry_initialize(
&zynqmp_cache_ecc_entry,
cache_handler,
NULL,
"L1/L2 Cache Errors"
);
return rtems_interrupt_entry_install(
ZYNQMP_IRQ_CACHE,
RTEMS_INTERRUPT_SHARED,
&zynqmp_cache_ecc_entry
);
}

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