QEMU is known to fail certain tests intermittently due to clock tick
delivery issues. This defines those tests as intermittent for BSPs
intended to run on QEMU alone.
Updates #4922
Updates #4072
Previously, the erase ioctl call would ignore flash regions and erase at
the absolute address passed in. This adds a check for if the region is
set and adds the region offset accordingly.
The NOR driver was not written with SMP systems and caching in mind.
This makes the IsBusy flag volatile for updates across cores and
introduces cache flushing and invalidation where necessary for data
manipulated by the DMA engine in the QSPI peripheral.
The page size ioctl requires an int pointer to retrieve the page size.
The test currently uses a size_t which mostly works fine for systems
where size_t and int are the same size, but can leave junk data in the
upper bits when they differ in size causing an assert in the test to
fail in some cases. This updates the variable to the correct type.
When given the exact bounds of a sector, the current algorithm
calculates that 3 sectors need to be erased. This corrects the
calculation such that only 1 sector needs to be erased for erasures that
exactly match sector boundaries.
This change causes NOR writes to be broken according to page boundaries.
Writes across page boundaries cause the writes beyond the boundary to
fail silently. This also introduces a new function that will explicitly
write pages.
Add <rtems/termiosdevice.h> which does not depend on <rtems/libio.h> to
provide rtems_termios_device_context and rtems_termios_device_handler.
For polled serial device drivers, this removes a header file dependency
to the full file system support.
On most i.MX* the upper bits in SW_PAD_CTL are reserved. On some chips,
like the i.MXRT1166, they are a domain write protection. Setting them to
1 can have unexpected side effects.
The device tree uses these bits for some flags. Make sure that they are
not accidentally written to some value.
The different variants of the i.MXRT have some minimal differences in
the fsl_flexspi_nor_config.h. Make sure that the header supports the
different chips.
The defines for the different clock frequencies in the
fsl_clock_config.h do not represent the clock frequencies that have been
set up in the registers. Remove them to avoid someone trusting in
correct values.
If a different chip variant is used in the i.mxrt BSP, a different
header would have to be included. Make sure that the fsl-edma driver
uses a header that doesn't have to be adapted.
The mcux_sdk has a different interface for getting the clock for
IMXRT11xx than for getting it in IMXRT10xx. Adapt simple drivers to
support that interface.
