Note: The changes have been done with portability in mind. The driver
should (in theory) be able to replace the original one in the MPC BSPs
too. For full compatibility an adaption layer and especially a test
would be necessary. Because both are missing, don't integrate it into
the MPC BSP now.
Update #4180
Use the targets parameter to determine the targets of the SGI. Change
targets parameter type to 32-bit to ease the parameter passing. GICv3
supports up to 16 targets.
Update #4202.
The zynq-uart set_attributes implementation was configured to always
return false which causes spconsole01 to fail. This restores the
disabled implementation which sets the baud rate registers
appropriately and allows spconsole01 to pass. This also expands the
set_attributes functionality to allow setting of the stop bits,
character width, and parity.
The strlcpy() function ensures there is always a NUL character
at the end of the string. Hence it is safer as strncpy() and it avoids the
compiler warning
This breaks AArch32-specific portions of the ARM GPT driver into their
own file so that the generic code can be moved for reuse by other
architectures.
If we interrupt a thread dispatch critical section (thread dispatch
disable level != ISR nest level), then we should not do the fast idle
mode since this may delay an ongoing system call forever.
CLOCK_DRIVER_ISRS_PER_TICK is the configuration define,
CLOCK_DRIVER_ISRS_PER_TICK_VALUE is the actual value of ISRS per clock
tick, therefore use this one to reset the Clock_driver_isrs after each
tick.
This patch will allow the user to pass a function to calculate
the baud divisor.
This will allow for more flexibility, since for some BSPs
like raspberrypi, the calculation of baud divisor is different
from what is in the current driver.
Use RTEMS_SYSINIT_ORDER_LAST_BUT_5 instead of RTEMS_SYSINIT_ORDER_LAST
to allow applications and support functions to place system
initialization handlers behind the standard handlers.
Update #3838.
Rename _SMP_Get_processor_count() in _SMP_Get_processor_maximum() to be
in line with the API level rtems_scheduler_get_processor_maximum().
Update #3732.
- Use CamelCase as it is not used in our C code. Enables simple search and
replace.
- Prefix with "RTEMS" to aid deployment and integration. It aids
searching and sorting.
Update #3706.
In order to simplify the use of CPU counter values it is beneficial to
have monotonic increasing values within the range of the CPU counter
ticks data type, e.g. 32-bit unsigned integer. This eases the use of
CPU counter timestamps in external tools which do not know the details
of the CPU counter hardware. The CPU counter is the fastest way to get
a time on an RTEMS system.
Such a CPU counter may be also used as the timecounter. Use it on SPARC
for this purpose to simplify the clock drivers.
Update #3456.
The precision clock synthesizer support broke the driver on the QorIQ
P1020. On this device the Alternate Function Register is accessed with
DLAB == 1 instead of the FIFO Control Register (FCR). Restructure the
code to account for this.
Set the FIFO control register while DLAB == 1 in the line control
register. At least on the QorIQ T4240 the driver still works with the
re-ordered FIFO control register access.
The aim of this clock driver hook was to stop clock tick interrupts at
some late point in the exit() procedure.
The use of atexit() pulls in malloc() which pulls in errno. It is
incompatible with the intention of the
CONFIGURE_DISABLE_NEWLIB_REENTRANCY configuration option.
The exit() function must be called from thread context, so accompanied
clock tick interrupts should cause no harm. On the contrary, someone
may assume a normal operating system operation, e.g. working timeouts.
Remove the Clock_driver_support_shutdown_hardware() clock driver hook.
Close#3436.
Add rtems_counter_frequency() API function. Use it to initialize the
counter value converter via the new system initialization step
(RTEMS_SYSINIT_CPU_COUNTER). This decouples the counter implementation
and the counter converter. It avoids an unnecessary pull in of the
64-bit integer division from libgcc.
Update #3456.
