Implement new cache functions for or1k and create new bspstart function
for or1ksim to initialize instruction and data caches. Also, sim.cfg
is modified to enable/confiure cache units.
Modify README to provide instruction on how to run or1ksim BSP on
latest or1ksim emulator built from github repo and add commands
to run or1ksim BSP on QEMU.
This patch avoids unexpected behavior when initializing tick timer registers.
Initializing these registers fires unexpected exceptions and interrupts even
though RTEMS has not enabled interrupts yet. So, a little long interval added
to allow RTEMS to finish the remaining initialization work before running the
application. The tick timer interval is adjusted to reflect an accurate
timing for RTEMS applications.
This patch allocate a space in the stack to account for red-zone
that gcc may utilize for the use of leaf functions. Care must be
taken to handle this red-zone from many places:
1- Upon creation of a new thread stack.
2- Once an interrupt entred.
Also moving the enable-thread-dispach() and increment ISR level before
checking if dispatch needed was required.
The previous modifications solved the printf bug which disabled ticker
to output strings after context switches that arise from Thread_Delay_ended.
Do not invalidate the entire L2 cache since it is a uniform cache in
_CPU_cache_invalidate_entire_instruction(). For consitency do not touch
the L2 cache even for the range function
_CPU_cache_invalidate_instruction_range().
There is support for the LEON3 processor available in Binutils 2.24 and
the GCC 4.8 branch and GCC mainline.
GCC 4.8 branch:
http://gcc.gnu.org/viewcvs/gcc/branches/?view=log&pathrev=205331
GCC mainline:
http://gcc.gnu.org/viewcvs/gcc/trunk/?view=log&pathrev=202664
It is mandatory to use this option for SMP on LEON3 since it enables
usage of C11 atomic operations. It makes it also possible to use an
inline function for _CPU_SMP_Get_current_processor() which avoids the
function call overhead in critical sections.
OpenRISC/or1ksim BSP: The new sim.cfg file configures or1ksim emulator with HW
capabilities that the current RTEMS/or1ksim BSP supports.
README: HOWTO run the or1ksim simulator.