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Code Pull Requests Activity
35,877 Commits 7 Branches 54 Tags
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Commit Graph

1423 Commits

Author SHA1 Message Date
Chris Johns
a3b0f7d5a8 bsps/xilinx/versal: Add Cadence I2C driver support 2022-08-25 09:25:03 +10:00
Stephen Clark
c738be92a0 bsps/amd64: remove -Werror from ABI flags 
The ABI flags for the amd64 BSP contain the -Werror=return-type flag. There is no reason for this to be there so it has been removed. The same option has also been removed amd64.cfg file.
 2022-08-23 11:37:21 -05:00
Sebastian Huber
21a36ed19b bsps: Fix .data.rel.ro placement 
The .data.rel.ro* linker input section pattern accidentally matches with
writeable data those symbol name starts with "ro".

Close #4701.
 2022-08-12 10:10:17 +02:00
Chris Johns
51ffa21011 aarch64/versal: Support DDRMC0 region 0 and 1 
- Support DDRMC0 region 0 up to 2G in size

- Support DDRMC0 region 1 with DDR memory greater than 2G
  up to the DDRMC0 max amount

- Extend the heap with region 1's memory

Closes #4684
 2022-07-28 09:04:46 +10:00
Chris Johns
b868d0a722 basp/aarch64: Make the unexpected sections origin address 64bit 
Update #4684
 2022-07-28 09:04:46 +10:00
Sebastian Huber
5810a08b57 Use __asm__ for standard C compatibility 2022-07-27 17:01:14 +02:00
Kinsey Moore
10ef7087f6 aarch64: Use page table level 0 
This alters the AArch64 page table generation and mapping code and MMU
configuration to use page table level 0 in addition to levels 1, 2, and
3. This allows the mapping of up to 48 bits of memory space and is the
maximum that can be mapped without relying on additional processor
extensions. Mappings are restricted based on the number of physical
address bits that the CPU supports.
 2022-07-21 12:26:35 -05:00
Kinsey Moore
1e360d3140 aarch64: Memory map the noinit section 
This section was added recently and must be mapped to be accessed
without generating an exception.
 2022-07-18 09:33:32 +10:00
Sebastian Huber
5ed0035377 bsps: Sort .noinit* sections 
Sort the .noinit* input sections by name first, then by alignment if two
sections have the same name.  This allows the placement of begin/end symbols to
initialize some areas with a special value.

Update #4678.
 2022-07-15 10:46:02 +02:00
Joel Sherrill
405639a67d bsps/v850/gdbv850sim: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:42 -05:00
Joel Sherrill
c1008e9da1 bsps/sparc64/usiii: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:42 -05:00
Joel Sherrill
ae71cf38eb bsps/sparc64/shared: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:42 -05:00
Joel Sherrill
a49acb6bef bsps/sparc64/niagara: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:42 -05:00
Joel Sherrill
749e9b63bd bsps/sparc64/include: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:42 -05:00
Joel Sherrill
f436fc7a18 bsps/sh/shsim: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:42 -05:00
Joel Sherrill
00913bb163 bsps/sh/shared: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:42 -05:00
Joel Sherrill
aacf9e23fb bsps/sh/gensh2: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
0fc7a4499c bsps/sh/gensh1: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
a73615a948 bsps/powerpc/virtex5: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
8a41efe424 bsps/powerpc/virtex4: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
77f1ae05dd bsps/powerpc/virtex: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
22d861ab9a bsps/powerpc/tqm8xx: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
a1fb8b7edb bsps/powerpc/t32mppc: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
9375d24dc8 bsps/powerpc/shared: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
8f4878ae1f bsps/powerpc/qoriq: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
a29b9bb4dd bsps/powerpc/qemuppc: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
5aea703542 bsps/powerpc/psim: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
88cf40e63c bsps/powerpc/mpc8260ads: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
bc374cd7a5 bsps/powerpc/mpc55xxevb: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
5ba0bb2afd bsps/powerpc/include: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
fe8b4b6c79 bsps/powerpc/83xx: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
a965590d64 bsps/powerpc/gen5200: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
d9d2cdff21 bsps/powerpc/beatnik: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
a3571e39fa bsps/no_cpu/no_bsp: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
5ee313155d bsps/nios2/nios2_iss: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
78a63729fa bsps/moxie/moxiesim: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
fdda5dfe41 bsps/mips/rbtx4938: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
01c5b57d39 bsps/mips/rbtx4925: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
36be074d36 bsps/mips/malta: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
d1dcf24924 bsps/mips/jmr3904: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
654ff835bb bsps/mips/include: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
334d90e324 bsps/mips/hurricane: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
5806ba0f56 bsps/mips/csb350: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Joel Sherrill
96a4b8c494 bsps/mips/shared: Change license to BSD-2 
Updates #3053.
 2022-07-12 08:15:41 -05:00
Sebastian Huber
5cc075712e irq/arm-gicv3.h: Customize CPU Interface init 
Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers.  This fixes the build for the AArch32 target.

Add BSP options which define the initial values of CPU Interface registers.
 2022-07-12 08:26:46 +02:00
Joel Sherrill
1be68d8093 bsps/m68k/uC5282: Change license to BSD-2 
Updates #3053.
 2022-07-11 17:14:47 -05:00
Joel Sherrill
a9a9916471 bsps/m68k/shared: Change license to BSD-2 
Updates #3053.
 2022-07-11 17:14:47 -05:00
Joel Sherrill
c1137c7f04 bsps/m68k/mvme162: Change license to BSD-2 
Updates #3053.
 2022-07-11 17:14:47 -05:00
Joel Sherrill
c669338a7e bsps/m68k/mvme147s: Change license to BSD-2 
Updates #3053.
 2022-07-11 17:14:47 -05:00
Joel Sherrill
b4c3de78ea bsps/m68k/mvme147: Change license to BSD-2 
Updates #3053.
 2022-07-11 17:14:47 -05:00