Add Thread_Control::is_in_the_air field if configured for SMP. This
helps to simplify the extract operation and avoids superfluous
inter-processor interrupts. Move the processor allocation step into the
enqueue operation.
Add and use _Scheduler_simple_smp_Get_highest_ready(). Add and use
_Scheduler_SMP_Get_lowest_scheduled().
Delete _Priority_bit_map_Handler_initialization() and rely on BSS
initialization. Move definition of _Priority_Major_bit_map and
_Priority_Bit_map to separate file. Move definition of __log2table also
to this file.
Add call to _Scheduler_Schedule() in missing path after
_Thread_Set_transient() in _Thread_Change_priority(). See also
sptests/spintrcritical19.
Add thread parameter to _Scheduler_Schedule(). This parameter is
currently unused but may be used in future SMP schedulers.
Do heir selection in _Scheduler_Schedule(). Use
_Scheduler_Update_heir() for this in the particular scheduler
implementation.
Add and use _Scheduler_Generic_block().
CSB336 i.MX1/i.MXS memory map organization
- SDRAM starts at address 0x08000000 but 2 MB are reserved
for boot-block/loader (or other use) before RTEMS image
origin/load address (that is kept from previous setup)
- Caching of 30 MB of SDRAM used for RTEMS (start at 0x08200000)
is changed to writeback mode which provides higher throughput.
- The first 1 MB of RTEMS dedicated SDRAM is remapped to address 0
to provide area for ARM CPU exceptions table.
- Internal registers and rest of the Flash (above 1 MB) are mapped
one to one. Registers region is extended to 2 MB to cover
eSRAM found on i.MX1 chip variant.
- The first two megabytes of SDRAM unused by RTEMS are mapped
with attributes to allow specific purposes.
- the first MB (at address 0x08000000) is nocached to allow
directly set some values read by booot-block after warm reset
- the second MB (at address 0x08100000) is set for write-through
caching. That allows to use memory for LCD frame-buffer without
need to flush cache after each redraw.
Jump to start provided at address 0x08200000 allows
to load application image even as plain binary file
and start it by jump to image start address.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Change pthread_once from using disabled pre-emption to using a
pthread mutex making it SMP safe. GCC using a posix threading
model uses pthread_once.
The pthread mutex requires at least 1 mutex is configured so
confdefs.h has been updated to account for the internal
mutex.
The recursive field in the pthread_mutexattr_t is now not used. The
code in pthread_mutexattr_settype only sets the type field and not
the recursive field.
The commit partially restores the _ISR_Handler code to the original
version in commit b8fc2de1ce. A list of
reverted changes follows.
commit c236082873
Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Tue Jul 30 15:54:53 2013 +0200
smp: Provide cache optimized Per_CPU_Control
Delete _Per_CPU_Information_p.
This commit was completely reverted.
commit 39e51758c8
Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Fri Jun 14 14:00:38 2013 +0200
smp: Add and use _CPU_SMP_Get_current_processor()
Add and use _SMP_Get_current_processor() and
rtems_smp_get_current_processor().
Delete bsp_smp_interrupt_cpu().
Change type of current processor index from int to uint32_t to match
_SMP_Processor_count type.
This commit was completely reverted.
commit e94aa61b68
Author: Till Straumann <strauman@slac.stanford.edu>
Date: Fri Aug 5 00:15:50 2011 +0000
2011-08-04 Till Straumann <strauman@slac.stanford.edu>
* shared/irq/irq_asm.S: BUGFIX (introduced by SMP changes
which moved code around, apparently): *must* store i8259
mask to frame *before* switching to IRQ stack. The code
retrieves the mask after switching back to original stack.
Also, the IRQ stack has no reserved space for the mask;
storing it there could overwrite memory!
This commit was completely reverted.
commit 01f2692e33
Author: Jennifer Averett <Jennifer.Averett@OARcorp.com>
Date: Mon Aug 1 13:41:50 2011 +0000
2011-08-01 Jennifer Averett <Jennifer.Averett@OARcorp.com>
PR 1802
* shared/irq/irq_asm.S, shared/irq/irq_init.c, shared/smp/smp-imps.c,
shared/smp/smp-imps.h: Add SMP support for i386.
* shared/smp/getcpuid.c: New file.
The parts modifying the code of _ISR_Handler were reverted.
commit 66729db311
Author: Joel Sherrill <joel.sherrill@OARcorp.com>
Date: Wed Mar 16 20:05:17 2011 +0000
2011-03-16 Jennifer Averett <jennifer.averett@OARcorp.com>
PR 1729/cpukit
* shared/irq/irq_asm.S: Add next step in SMP support. This adds an
allocated array of the Per_CPU structures to support multiple cpus vs
a single instance of the structure which is still used if SMP support
is disabled. Configuration support is also added to explicitly enable
or disable SMP. But SMP can only be enabled for the CPUs which will
support it initially -- SPARC and i386. With the stub BSP support, a
BSP can be run as a single core SMP system from an RTEMS data
structure standpoint.
This commit was completely reverted.
