* mpc505/ictrl/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc505/timer/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc505/vectors/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc6xx/clock/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc6xx/exceptions/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc6xx/mmu/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc6xx/timer/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8260/clock/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8260/console-generic/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8260/cpm/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8260/exceptions/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8260/mmu/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8260/timer/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8xx/clock/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8xx/console-generic/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8xx/cpm/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8xx/exceptions/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8xx/mmu/Makefile.am: Use .$(OBJEXT) instead of .o.
* mpc8xx/timer/Makefile.am: Use .$(OBJEXT) instead of .o.
* ppc403/clock/Makefile.am: Use .$(OBJEXT) instead of .o.
* ppc403/console/Makefile.am: Use .$(OBJEXT) instead of .o.
* ppc403/ictrl/Makefile.am: Use .$(OBJEXT) instead of .o.
* ppc403/timer/Makefile.am: Use .$(OBJEXT) instead of .o.
* ppc403/tty_drv/Makefile.am: Use .$(OBJEXT) instead of .o.
* ppc403/vectors/Makefile.am: Use .$(OBJEXT) instead of .o.
* shared/include/Makefile.am: Use .$(OBJEXT) instead of .o.
* shared/src/Makefile.am: Use .$(OBJEXT) instead of .o.
* shared/include/io.h: Per PR215 address the following issues:
- _IO_BASE, _ISA_MEM_BASE and PCI_DRAM_OFFSET
are no longer defined by libcpu (powerpc/shared/include/io.h)
but by the BSP (who is the only one to know the values)
- the affected BSP (shared/motorola) headers have been fixed
in a separate "libbsp/powerpc/shared" patch.
- the DEC 21140 driver (libchip/network/dec21140.c) has been
fixed to use PCI_DRAM_OFFSET instead of PREP_PCI_DRAM_OFFSET.
and PCI_MEM_BASE instead of PREP_ISA_MEM_BASE. PCI_MEM_BASE
is to be defined by the BSP who is using this driver.
- the DEC driver also has been fixed to use the newer
rtems_bsp_delay_in_bus_cycles() instead of the obsolete
delay_in_bus_cycles().
* rtems/powerpc/registers.h, rtems/score/ppc.h: Per PR213, add
the following:
- support for the MPC74000 (AKA G4); there is no
AltiVec support yet, however.
- the cache flushing assembly code uses hardware-flush on the G4.
Also, a couple of hardcoded numerical values were replaced
by more readable symbolic constants.
- extended interrupt-disabled code section so enclose the entire
cache flush/invalidate procedure (as recommended by the book).
This is not (latency) critical as it is only used by
init code but prevents possible corruption.
- Trivial page table support as been added.
(1:1 effective-virtual-physical address mapping which is only
useful only on CPUs which feature hardware TLB replacement,
e.g. >604. This allows for write-protecting memory regions,
e.g. text/ro-data which makes catching corruptors a lot easier.
It also frees one DBAT/IBAT and gives more flexibility
for setting up address maps :-)
- setdbat() allows changing BAT0 also (since the BSP may use
a page table, BAT0 could be available...).
- asm_setdbatX() violated the SVR ABI by using
r20 as a scratch register; changed for r0
- according to the book, a context synchronizing instruction is
necessary prior to and after changing a DBAT -> isync added
* mpc6xx/clock/c_clock.c: Include rtems/bspIo.h instead of bspIo.h.
* mpc6xx/mmu/bat.h: Include rtems/bspIo.h instead of bspIo.h.
* mpc8260/console-generic/console-generic.c: Include rtems/bspIo.h instead of bspIo.h.
* mpc8260/cpm/brg.c: Include rtems/bspIo.h instead of bspIo.h.
* mpc8xx/console-generic/console-generic.c: Include rtems/bspIo.h instead of bspIo.h.
* shared/include/cpuIdent.c: Include rtems/bspIo.h instead of bspIo.h.
* old_exception_processing/cpu.h: Renamed delay() to rtems_bsp_delay().
Renamed delay_in_bus_cycles() to rtems_bsp_delay_in_bus_cycles().
* shared/include/cpu.h: Renamed delay() to rtems_bsp_delay().
Renamed delay_in_bus_cycles() to rtems_bsp_delay_in_bus_cycles().
* new_exception_processing/Makefile.am: Use 'PREINSTALL_FILES ='.
* old_exception_processing/Makefile.am: Use 'PREINSTALL_FILES ='.
* mpc6xx/mmu/Makefile.am: Use 'PREINSTALL_FILES ='.
* mpc6xx/clock/Makefile.am: Use 'PREINSTALL_FILES ='.
* mpc6xx/exceptions/Makefile.am: Use 'PREINSTALL_FILES ='.
* mpc8xx/include/Makefile.am: Use 'PREINSTALL_FILES ='.
* mpc8xx/exceptions/Makefile.am: Use 'PREINSTALL_FILES ='.
* shared/include/Makefile.am: Use 'PREINSTALL_FILES ='.
* shared/src/Makefile.am: Use 'PREINSTALL_FILES ='.
* shared/src/Makefile.am: Use 'CLEANFILES ='.
* mpc8xx/exceptions/.cvsignore, mpc8xx/exceptions/Makefile.am,
mpc8xx/exceptions/asm_utils.S, mpc8xx/exceptions/raw_exception.c,
mpc8xx/exceptions/raw_exception.h: New files.
* configure.in, mpc6xx/mmu/bat.h, mpc8xx/Makefile.am,
mpc8xx/clock/clock.c,
mpc8xx/console-generic/console-generic.c,
mpc8xx/include/mpc8xx.h, mpc8xx/mmu/mmu.c,
new_exception_processing/cpu.h, shared/include/byteorder.h,
wrapup/Makefile.am: This is conversion of the
mpc8xx CPU to the "new exception processing model."
<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:
+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040
and PowerPC
+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
same code base.
+ Rework of eth_comm BSP to utiltize above.
John reports this works on the 821 and 860
Ralf Corsepius <corsepiu@faw.uni-ulm.de> that contain:
* Modifications, (minor) corrections, cleanups to most existing
Makefile.ams
* Adds automake support to all remaining BSPs which have not yet been
converted to automake.
* Makefile.am for all remaining wrapup/Makefile.ams
which adds partial automake support to libcpu/<cpu>/*.
Until now I have only implemented full automake support for the sh (my
demonstration example :) and the i386 (inevitiable for structural
reasons of this subdirectory). For all other cpus only their toplevel
directories (exception: powerpc), include subdirectories and a few
selected subdirectories have been converted to automake.
I did this on purpose, because add automake support to each subdirectory
requires individual adaptations which to be tested individually.
Additionally the weirdnesses of the powerpc subdirectories hit again,
esp. some powerpc cpu-models
* install files to $(PROJECT_INCLUDE)/<cpu-model>/ while others install
them to $(PROJECT_INCLUDE)/
* the scheme used to configure libcpu/powerpc/ is difficult to implement
using automake, therefore this subdirectory still is configured by
autoconf (The one out of an unlimited set selection scheme hits again
:), though powerpc/*/* subdirectories already apply automake.
The patch also reveils structural weaknesses in RTEMS:
E.g. There seem to exist at least 5 different general schemes:
* Not using libcpu at all (eg. i960)
* Strictly tree-style a libcpu/<cpu-variant>/* (eg. m68k, sh)
* Flat libcpu directory layout with cpu-variants merged into sources or
not destinguishing cpu-variants (i386)
* Not supporting variants with deep source tree (sparc, hppa, mips64orion)
* Woven directory structure with shared directories (powerpc)
I regret having to say this, but from my POV this means, that there
doesn't exist a general implementation scheme for libcpu at all.
To apply:
rm -rf ./c/src/lib/libcpu/i386/wrapup
rm -rf ./c/src/lib/libcpu/mips64orion/include
rm -rf ./c/src/lib/libcpu/powerpc/ppc403/include
patch -p1 < rtems-rc-19991203-7.diff
./bootstrap
unnecessarily uses any variables defined by the BSP. On this
sweep, use of BSP_Configuration and Cpu_table was eliminated.
A significant part of this modification was the addition of
macros to access fields in the RTEMS configuration structures.
This is necessary to strengthen the division between the BSP independent
parts of RTEMS and the BSPs themselves. This started after
comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
A bug in acpolish made it into rtems-rc-19990709-0.diff, which
unfortunately affects all Makefile.ins:
* The maintainer mode conditional was erroniously applied to the
dependencies of "Makefile".
In case you already checked in rtems-rc-19990709-0.diff to CVS you have
to check in all Makefile.ins again after applying the patch below :).
Please apply the patch below as follows:
patch -p1 < rtems-rc-19990709-1.diff
tools/update/rtems-polish.sh -ac
Note: There is no need to rerun your tests if you have used
--enable-maintainer-mode to configure RTEMS, because this patch converts
all Makefile.ins to the same settings as used for
--enable-maintainer-mode.
to move RTEMS more to automake/autoconf and GNU compliance.
Finally, here they are: the "big-patch" patches - merged into one big
patch (~1.5MB).
Sorry for the delay, but testing took much more time than I had expected
- esp. reworking the acpolish script triggered many more tiny issues
than I had expected (cf. below).
At least, now you've got something to spend your weekend with :-.
WARNINGS:
* I've gone a little (??) further than I had announced before.
* Several directories have been moved.
* Several files have been added and removed
* I have tested it with many BSPs/CPUs and a variety of permutiations of
configuration flags, but not with all.
* Most parts of the patch are automatically generated, however there are
many tiny manual modifications.
APPLYING THE PATCH:
./autogen -c
mkdir tools
mv c/src/exec/score/tools tools/cpu
mv c/build-tools tools/build
mv c/update-tools tools/update
patch -p1 -E < rtems-rc-19990709-0.diff
./autogen
If the patch doesn't apply to rtems-cvs, I would suggest that you should
try to apply it brute-force and then to run tools/update/rtems-polish.sh
-ac -am afterwards. A recursive diff between rtems-19990709 + patch and
rtems-cvs + patch then should report only a few dozen significant
changes to configuration files which need to be merged manually (IIRC, I
did not change any source files).
*** Attention: There are files to be removed, moved, copied and added
in/to CVS!
NEWS/CHANGES:
1. Configuration takes place in 3 stages: 1. per host (toplevel
configure script), 2. per target (c/configure), 3. per bsp
c/src/configure automatically triggered from ./configure and
c/Makefile.am.
2. Building of subdirectory c/ takes place in c/$(target_alias) for
cross-targets in c/ for native targets
3. Building of subdirectory c/src takes place in c/${target_alias}/<bsp>
for cross-targets, c/<bsp> for native targets
4. c/build-tools moved to tools/build
5. c/src/exec/score/cpu/tools moved to tools/cpu (=cpu-tools split out)
6. c/update-tools moved to tools/update
7. New subdirectory c/src/make, handles files from make/ on a per BSP
basis
8. Maintainer mode support: Ie. if configuring with
--enable-maintainer-mode disabled (the default), then tracking of many
dependencies will be disabled in Makefiles. Esp. many dependencies for
auto* generated files will be switched off in Makefiles. Ie. if not
using "--enable-maintainer-mode" many auto* generated files will not be
updated automatically, i.e. normal users should not be required to have
auto* tools anymore (untested).
9. Independent configuration scripts for / (toplevel), tools/build,
tools/cpu, tools/update, c/, c/src/, c/src/exec, c/src/lib, c/src/tests,
c/src/make
10. Automake support for all directories above and besides c/src
11. "preinstall" now is implemented as depth-first recursive make target
12. host compiled tools (exception bsp-tools) are accessed in location
in the build tree instead of inside the build-tree when building RTEMS.
13. RTEMS_ROOT and PROJECT_ROOT now point to directories inside the
build-tree - many tiny changes as consequence from this.
14. --with-cross-host support removed (offically announced obsolete by
cygnus)
15. Changing the order of building libraries below c/src/lib/
16. Former toplevel configure script broken into aclocal/*.m4 macros
17. Newlib now detected by configure macros, RTEMS_HAS_NEWLIB removed
from *cfg.
18. sptables.h now generated by autoconf
19. Rules for "mkinstalldirs temporary installation tree" moved from
c/Makefile to subdirectories.
20. Cpu-tools do not get installed.
21. FIX: Use ACLOCAL_AMFLAGS instead of ACLOCAL = -I ... in Makefile.ams
which are in directories with own configure scripts.
22. Hardcoding BSP names into libbsp/.../tools to avoid RTEMS_BSP get
overridden from the environment.
22. FIX: Handling of MP_PIECES in various Makefiles
23. FIX: Removing "::" rules from some Makefile.ins
24. FIX: File permission chaos: (-m 444 and -m 555 vs. -m 644 and -m
755) - Now all include files use -m 644.
25. Removed many gnumake-conditionals in Makefile.ins - Partially
replaced with automake-conditional, partially replaced with
conditionalized Makefile variables (... _yes_V)
26. Massively reworked acpolish: acpolish now parses Makefile.ins and
interprets parts of the Makefile.ins.
27. FIX: Some $(wildcard $(srcdir)/*.h) macros removed / replaced with
explicit lists of files in Makefile.ins.
28. FIX: Replacing MKLIB with RANLIB in Makefile.ins
29. HACK: Add preinstallation for pc386 specific
$(PROJECT_RELEASE)/BootImgs directory
... many more details, I can't recall
KNOWN BUGS:
1. make [debug|profile]_install do not do what they are promissing.
"make [debug|profile] install" does what "make [debug|profile]_install"
has been doing. Proposal: remove [debug|profile]_install
2. Dependencies between temporary installation tree and source tree are
not yet handled correctly.
3. Dependencies between temporary installation tree and source tree are
handled ineffencently (Using INSTALL_CHANGE instead of make
dependencies)
4. RTEMS_ROOT, PROJECT_ROOT, top_builddir, RTEMS_TOPdir now are
redundant.
5. The new configure scripts still are in their infancy. They contain
redundant checks and might still contain bugs, too.
6. RTEMS autoconf Makefile.ins use a mixture of configuration
information gathered in c/$(target_alias)/<bsp>/make and of information
collected from their configure scripts.
7. make dist is not fully functional
8. Subdirectory host-/build-/target- configure options (--target,
--host, --build) do not conform to Cygnus/GNU conventions.
9. Some RTEMS autoconf Makefile.in's makefile targets are not supported
in automake Makefile.ams/ins (e.g. get, clobber).
10. Some automake standard targets are not propagated from toplevel and
c/Makefile.am to autoconf subdirectories (eg. make dist).
11. rpcgen generated files are not part of the source-tree (Automake
conventions favor supplying generated files inside the source-tree,
however there is no support for rpcgen generated files in automake, cf.
yacc/lex support in automake).
12. RTEMS_HAS_RDBG handling is flaky. make/*.cfg use RTEMS_HAS_RDBG per
CPU, while librdb's sources can only be built per BSP. Raises the more
general question whether librdbg located correctly in the source-tree.
13. All make/*cfg files are configured per cpu, currently there is no
location to store per-bsp configuration information --> bsp.cfg, per
aconfig.h?
14. "make install" without having run "make all" beforehand does not
work.
15. handling of --enable-multiprocessing seems to be broken in
make/custom/*
16. Makefile.ins still exploit many gmake features.
17. File permisson chaos on libraries (no explict -m for
libraries/rels/etc).
18. mcp750 Makefiles are broken (Note: I *do* mean buggy - I am not
talking about "not-conforming to conventions", here :-).
19. Dependencies between configure scripts are not handled, eg. aborting
"make RTEMS_BSP=<bsp>" can leave the build-tree in an unusable state.
20. "make clean" does not delete <build-tree>/<bsp>. This is intentional
for now, because rerunning "make" after "make clean" requires an
explicit "make preinstall" afterwards now. This should be done
automatically, but doesn't work in this case for now. To work around
this problem <build-tree>/<bsp> is kept during "make clean" for now
(HACK).
TODO:
1. split out host-compiled bsp-tools
2. Use Cygnus/GNU standards for cross-compiling target-subdir
(CC=CC_FOR_TARGET .. configure --host=${target_alias}
--build=`config.guess'}), to be added to toplevel configure script after
splitting out bsp-tools.
3. Exploit per cpu support directory (c/src/<cpu>)- Splitting out
per-cpu libraries - Are there any?
4. Further automake support
5. Converting subdirectories into standalone / self-contained
subdirectories (Esp. moving their headers to the same common root as
their sources, eg. mv lib/include/rtems++
lib/librtems++/include/rtems++) - This is the main obstacle which
prevents moving further towards automake.
6. Propagating values from *.cfg into Makefiles instead of propagating
them at make time via Makefile-fragments (i.e. try to avoid using
*.cfg).
7. Testing on cygwin host (I *do* expect cygwin specific problems).
8. The ARCH in o-$(ARCH)-$(VARIANT) build-subdirectories is not needed
anymore.
GENERAL ISSUES:
1. Temporary installation tree -- Ian and I seem to disagree basically.
Though I think that I understand his argumentation, I do not share it.
IMO, his way of using the buildtree is mis-using the build-tree, relying
on an inofficial feature of RTEMS's current implementation, which
doesn't even work correctly in the current build-tree, though it
attempts hard to do so. From my very POV, it unnecessarily complicates
the structures of the source- and build-trees. It is not supported by
automake (No automatic generation for the necessary rules) and
complicates the transition to automake significantly (Generating the
rules with an enhanced version of acpolish could be possible).
As Ian correctly pointed out, here a management decision is needed -
though I don't see the need to draw this decision in short terms.
2. preinstallation generally is a sure means to spoil the structure of
the source tree, IMHO (No ranting intended, I am completly serious about
this one). eg. through tree dependencies. The worst problem related to
this I have found in the meantime is bsp_specs. bsp_specs is part of
libbsp, ie. there is *no* way to build *any* part of the source tree
*without* having a BSP *preinstalled*.
Note: This issue is related to issue 1., but is not identical - The
difference is the change of the order make rules have to be triggered.
While preinstallation triggers rules spread all over the source tree
before a "make all" can be run, a temporary installation tree could also
be installed by post "make all" hooks (all-local:, to be run after make
all in a directory is completed) if the directories' dependencies would
be a tree,
3. Stuctural dependencies between subdirectories.
4. Depth of the source tree (Prevents multilibbing and introduces many
unnecessary configure scripts).
5. per cpu vs. per bsp configuration (There are no real per-cpu parts
yets :-).
6. automake does not support $makefiles in AC_OUTPUT. Unlike before, we
now should try to avoid RTEMS_CHECK_MAKEFILE and to hard-code as much
paths to Makefiles as possible.
7. General redesign of the source tree
8. Main installation point - Changing it to ${prefix}/${target_alias}. ?
Besides item 8. (which is a must, IMHO), as far as I see most of them
can not be solved soon and will remain issues in the mid- to long-term
:-.
REMARKS:
* You (as the maintainer) should always use --enable-maintainer-mode
when building RTEMS to ensure that maintainer mode generated files (esp.
those in c/src/make) will be updated when make/* files have changed.
* Use @RTEMS_BSP@ in Makefile.ins and Makefile.ams below c/src/,
$(RTEMS_BSP) or ${RTEMS_BSP} will be overridden from environment
variables when using make RTEMS_BSP="....".
* c/src/make is a temporary cludge until configuration issues are
solved. At the moment it is configured per bsp, but contains
per-target/cpu info only. Its main purpose now is to circumvent
modifying make/*.cfg files, because I consider make/* to be frozen for
backward compatibilty.
* This patch should only affect configuration files. At least I do not
remember having touched any source files.
* To build the bare bsp you now need to mention it in --enable-rtemsbsp.
Example: building gensh1 and sh1/bare simultaneously:
../rtems-rc-19990709-1/configure --target=sh-rtems \
--enable-rtemsbsp="bare gensh1" \
--prefix=/tmp/rtems \
--enable-bare-cpu-cflags='-DMHZ=20 -m1
-DCPU_CONSOLE_DEVNAME=\"/dev/null\"' \
--enable-bare-cpu-model=sh7032 \
--enable-maintainer-mode \
--enable-cxx
make
make install
* The next steps in development would be to split out bsp-tools and then
to change to Cygnus/GNU canonicalization conventions for building the c/
subdirectory afterwards (i.e. many standard AC_*.m4 macros could be used
instead of customized versions)
FINAL REMARK:
The issues mentioned in the lists above sound much worser than the
situation actually is. Most of them are not specific to this patch, but
are also valid for the snapshot. I just wrote down what I came across
when working on the patch over the last few weeks.
I wouldn't be too surprised if you don't like the patch at the current
point in development. I am willing to discuss details and problems, I
also have no problem if you would post-pone applying this patch to times
after 4.1, but rejecting it as a whole for all times would be a false
management decision, IMHO.
Therefore I would suggest that you, if your time constaints allow it,
should at least play a little while with this patch to understand what
is going on and before drawing a decision on how to handle this
proposal. I know this patch is neither perfect nor complete, but I
consider it to be a major breakthrough. Don't be anxious because of the
size of the patch, the core of the patch is rather small, the size is
mainly the side effect of some systematic cleanups inside the Makefiles
(result of acpolish).
Feel free to ask if you encounter problems, if you don't understand
something or if you meet bugs - I am far from being perfect and am
prepared to answer them.
Ralf.
--
Ralf Corsepius
Forschungsinstitut fuer Anwendungsorientierte Wissensverarbeitung (FAW)
Helmholtzstr. 16, 89081 Ulm, Germany Tel: +49/731/501-8690
mailto:corsepiu@faw.uni-ulm.de FAX: +49/731/501-999
http://www.faw.uni-ulm.de
described in the message following this paragraph. This patch also includes
a mcp750 BSP.
From valette@crf.canon.fr Mon Jun 14 10:03:08 1999
Date: Tue, 18 May 1999 01:30:14 +0200 (CEST)
From: VALETTE Eric <valette@crf.canon.fr>
To: joel@oarcorp.com
Cc: raguet@crf.canon.fr, rtems-snapshots@oarcorp.com, valette@crf.canon.fr
Subject: Questions/Suggestion regarding RTEMS PowerPC code (long)
Dear knowledgeable RTEMS powerpc users,
As some of you may know, I'm currently finalizing a port
of RTEMS on a MCP750 Motorola board. I have done most
of it but have some questions to ask before submitting
the port.
In order to understand some of the changes I have made
or would like to make, maybe it is worth describing the
MCP750 Motorola board.
the MCP750 is a COMPACT PCI powerpc board with :
1) a MPC750 233 MHz processor,
2) a raven bus bridge/PCI controller that
implement an OPENPIC compliant interrupt controller,
3) a VIA 82C586 PCI/ISA bridge that offers a PC
compliant IO for keyboard, serial line, IDE, and
the well known PC 8259 cascaded PIC interrupt
architecture model,
4) a DEC 21140 Ethernet controller,
5) the PPCBUG Motorola firmware in flash,
6) A DEC PCI bridge,
This architecture is common to most Motorola 60x/7xx
board except that :
1) on VME board, the DEC PCI bridge is replaced by
a VME chipset,
2) the VIA 82C586 PCI/ISA bridge is replaced by
another bridge that is almost fully compatible
with the via bridge...
So the port should be a rather close basis for many
60x/7xx motorola board...
On this board, I already have ported Linux 2.2.3 and
use it both as a development and target board.
Now the questions/suggestions I have :
1) EXCEPTION CODE
-------------------
As far as I know exceptions on PPC are handled like
interrupts. I dislike this very much as :
a) Except for the decrementer exception (and
maybe some other on mpc8xx), exceptions are
not recoverable and the handler just need to print
the full context and go to the firmware or debugger...
b) The interrupt switch is only necessary for the
decrementer and external interrupt (at least on
6xx,7xx).
c) The full context for exception is never saved and
thus cannot be used by debugger... I do understand
the most important for interrupts low level code
is to save the minimal context enabling to call C
code for performance reasons. On non recoverable
exception on the other hand, the most important is
to save the maximum information concerning proc status
in order to analyze the reason of the fault. At
least we will need this in order to implement the
port of RGDB on PPC
==> I wrote an API for connecting raw exceptions (and thus
raw interrupts) for mpc750. It should be valid for most
powerpc processors... I hope to find a way to make this coexist
with actual code layout. The code is actually located
in lib/libcpu/powerpc/mpc750 and is thus optional
(provided I write my own version of exec/score/cpu/powerpc/cpu.c ...)
See remark about files/directory layout organization in 4)
2) Current Implementation of ISR low level code
-----------------------------------------------
I do not understand why the MSR EE flags is cleared
again in exec/score/cpu/powerpc/irq_stubs.S
#if (PPC_USE_SPRG)
mfmsr r5
mfspr r6, sprg2
#else
lwz r6,msr_initial(r11)
lis r5,~PPC_MSR_DISABLE_MASK@ha
ori r5,r5,~PPC_MSR_DISABLE_MASK@l
and r6,r6,r5
mfmsr r5
#endif
Reading the doc, when a decrementer interrupt or an
external interrupt is active, the MSR EE flag is already
cleared. BTW if exception/interrupt could occur, it would
trash SRR0 and SRR1. In fact the code may be useful to set
MSR[RI] that re-enables exception processing. BTW I will need
to set other value in MSR to handle interrupts :
a) I want the MSR[IR] and MSR[DR] to be set for
performance reasons and also because I need DBAT
support to have access to PCI memory space as the
interrupt controller is in the PCI space.
Reading the code, I see others have the same kind of request :
/* SCE 980217
*
* We need address translation ON when we call our ISR routine
mtmsr r5
*/
This is just another prof that even the lowest level
IRQ code is fundamentally board dependent and
not simply processor dependent especially when
the processor use external interrupt controller
because it has a single interrupt request line...
Note that if you look at the PPC code high level interrupt
handling code, as the "set_vector" routine that really connects
the interrupt is in the BSP/startup/genpvec.c,
the fact that IRQ handling is BSP specific is DE-FACTO
acknowledged.
I know I have already expressed this and understand that this
would require some heavy change in the code but believe
me you will reach a point where you will not be able
to find a compatible while optimum implementation for low level
interrupt handling code...) In my case this is already true...
So please consider removing low level IRQ handling from
exec/score/cpu/* and only let there exception handling code...
Exceptions are usually only processor dependent and do
not depend on external hardware mechanism to be masked or
acknowledged or re-enabled (there are probably exception but ...)
I have already done this for pc386 bsp but need to make it again.
This time I will even propose an API.
3) R2/R13 manipulation for EABI implementation
----------------------------------------------
I do not understand the handling of r2 and r13 in the
EABI case. The specification for r2 says pointer to sdata2,
sbss2 section => constant. However I do not see -ffixed-r2
passed to any compilation system in make/custom/*
(for info linux does this on PPC).
So either this is a default compiler option when choosing
powerpc-rtems and thus we do not need to do anything with
this register as all the code is compiled with this compiler
and linked together OR this register may be used by rtems code
and then we do not need any special initialization or
handling.
The specification for r13 says pointer to the small data
area. r13 argumentation is the same except that as far
as I know the usage of the small data area requires
specific compiler support so that access to variables is
compiled via loading the LSB in a register and then
using r13 to get full address... It is like a small
memory model and it was present in IBM C compilers.
=> I propose to suppress any specific code for r2 and
r13 in the EABI case.
4) Code layout organization (yes again :-))
-------------------------------------------
I think there are a number of design flaws in the way
the code is for ppc organized and I will try to point them out.
I have been beaten by this again on this new port, and
was beaten last year while modifying code for pc386.
a) exec/score/cpu/* vs lib/libcpu/cpu/*.
I think that too many things are put in exec/score/cpu that
have nothing to do with RTEMS internals but are rather
related to CPU feature.
This include at least :
a) registers access routine (e.g GET_MSR_Value),
b) interrupt masking/unmasking routines,
c) cache_mngt_routine,
d) mmu_mngt_routine,
e) Routines to connect the raw_exception, raw_interrupt
handler,
b) lib/libcpu/cpu/powerpc/*
With a processor family as exuberant as the powerpc family,
and their well known subtle differences (604 vs 750) or
unfortunately majors (8xx vs 60x) the directory structure
is fine (except maybe the names that are not homogeneous)
powerpc
ppc421 mpc821 ...
I only needed to add mpc750. But the fact that libcpu.a was not
produced was a pain and the fact that this organization may
duplicates code is also problematic.
So, except if the support of automake provides a better solution
I would like to propose something like this :
powerpc
mpc421 mpc821 ... mpc750 shared wrapup
with the following rules :
a) "shared" would act as a source container for sources that may
be shared among processors. Needed files would be compiled inside
the processor specific directory using the vpath Makefile
mechanism. "shared" may also contain compilation code
for routine that are really shared and not worth to inline...
(did not found many things so far as registers access routine
ARE WORTH INLINING)... In the case something is compiled there,
it should create libcpushared.a
b) layout under processor specific directory is free provided
that
1)the result of the compilation process exports :
libcpu/powerpc/"PROC"/*.h in $(PROJECT_INCLUDE)/libcpu
2) each processor specific directory creates
a library called libcpuspecific.a
Note that this organization enables to have a file that
is nearly the same than in shared but that must differ
because of processor differences...
c) "wrapup" should create libcpu.a using libcpushared.a
libcpuspecific.a and export it $(PROJECT_INCLUDE)/libcpu
The only thing I have no ideal solution is the way to put shared
definitions in "shared" and only processor specific definition
in "proc". To give a concrete example, most MSR bit definition
are shared among PPC processors and only some differs. if we create
a single msr.h in shared it will have ifdef. If in msr.h we
include libcpu/msr_c.h we will need to have it in each prowerpc
specific directory (even empty). Opinions are welcomed ...
Note that a similar mechanism exist in libbsp/i386 that also
contains a shared directory that is used by several bsp
like pc386 and i386ex and a similar wrapup mechanism...
NB: I have done this for mpc750 and other processors could just use
similar Makefiles...
c) The exec/score/cpu/powerpc directory layout.
I think the directory layout should be the same than the
libcpu/powerpc. As it is not, there are a lot of ifdefs
inside the code... And of course low level interrupt handling
code should be removed...
Besides that I do not understand why
1) things are compiled in the wrap directory,
2) some includes are moved to rtems/score,
I think the "preinstall" mechanism enables to put
everything in the current directory (or better in a per processor
directory),
5) Interrupt handling API
-------------------------
Again :-). But I think that using all the features the PIC
offers is a MUST for RT system. I already explained in the
prologue of this (long and probably boring) mail that the MCP750
boards offers an OPENPIC compliant architecture and that
the VIA 82586 PCI/ISA bridge offers a PC compatible IO and
PIC mapping. Here is a logical view of the RAVEN/VIA 82586
interrupt mapping :
--------- 0 ------
| OPEN | <-----|8259|
| PIC | | | 2 ------
|(RAVEN)| | | <-----|8259|
| | | | | | 11
| | | | | | <----
| | | | | |
| | | | | |
--------- ------ | |
^ ------
| VIA PCI/ISA bridge
| x
-------- PCI interrupts
OPENPIC offers interrupt priorities among PCI interrupts
and interrupt selective masking. The 8259 offers the same kind
of feature. With actual powerpc interrupt code :
1) there is no way to specify priorities among
interrupts handler. This is REALLY a bad thing.
For me it is as importnat as having priorities
for threads...
2) for my implementation, each ISR should
contain the code that acknowledge the RAVEN
and 8259 cascade, modify interrupt mask on both
chips, and reenable interrupt at processor level,
..., restore then on interrupt return,.... This code
is actually similar to code located in some
genpvec.c powerpc files,
3) I must update _ISR_Nesting_level because
irq.inl use it...
4) the libchip code connects the ISR via set_vector
but the libchip handler code does not contain any code to
manipulate external interrupt controller hardware
in order to acknoledge the interrupt or re-enable
them (except for the target hardware of course)
So this code is broken unless set_vector adds an
additionnal prologue/epilogue before calling/returning
from in order to acknoledge/mask the raven and the
8259 PICS... => Anyway already EACH BSP MUST REWRITE
PART OF INTERRUPT HANDLING CODE TO CORRECTLY IMPLEMENT
SET_VECTOR.
I would rather offer an API similar to the one provided
in libbsp/i386/shared/irq/irq.h so that :
1) Once the driver supplied methods is called the
only things the ISR has to do is to worry about the
external hardware that triggered the interrupt.
Everything on openpic/VIA/processor would have been
done by the low levels (same things as set-vector)
2) The caller will need to supply the on/off/isOn
routine that are fundamental to correctly implements
debuggers/performance monitoring is a portable way
3) A globally configurable interrupt priorities
mechanism...
I have nothing against providing a compatible
set_vector just to make libchip happy but
as I have already explained in other
mails (months ago), I really think that the ISR
connection should be handled by the BSP and that no
code containing irq connection should exist the
rtems generic layers... Thus I really dislike
libchip on this aspect because in a long term
it will force to adopt the less reach API
for interrupt handling that exists (set_vector).
Additional note : I think the _ISR_Is_in_progress()
inline routine should be :
1) Put in a processor specific section,
2) Should not rely on a global variable,
As :
a) on symmetric MP, there is one interrupt level
per CPU,
b) On processor that have an ISP (e,g 68040),
this variable is useless (MSR bit testing could
be used)
c) On PPC, instead of using the address of the
variable via __CPU_IRQ_info.Nest_level a dedicated
SPR could be used.
NOTE: most of this is also true for _Thread_Dispatch_disable_level
END NOTE
--------
Please do not take what I said in the mail as a criticism for
anyone who submitted ppc code. Any code present helped me
a lot understanding PPC behavior. I just wanted by this
mail to :
1) try to better understand the actual code,
2) propose concrete ways of enhancing current code
by providing an alternative implementation for MCP750. I
will make my best effort to try to brake nothing but this
is actually hard due to the file layout organisation.
3) make understandable some changes I will probably make
if joel let me do them :-)
Any comments/objections are welcomed as usual.
--
__
/ ` Eric Valette
/-- __ o _. Canon CRF
(___, / (_(_(__ Rue de la touche lambert
35517 Cesson-Sevigne Cedex
FRANCE
Tel: +33 (0)2 99 87 68 91 Fax: +33 (0)2 99 84 11 30
E-mail: valette@crf.canon.fr
