forked from Imagelibrary/rtems
Typo corrected from John Cotton <john.cotton@nrc.ca>.
This commit is contained in:
@@ -60,7 +60,7 @@ void _CPU_cache_disable_data (
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PPC_Set_HID0( value );
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}
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void _CPU_cache_enable_inst (
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void _CPU_cache_enable_instruction (
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void )
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{
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unsigned32 value;
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@@ -69,7 +69,7 @@ void _CPU_cache_enable_inst (
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PPC_Set_HID0( value );
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}
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void _CPU_cache_disable_inst (
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void _CPU_cache_disable_instruction (
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void )
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{
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unsigned32 value;
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@@ -78,7 +78,7 @@ void _CPU_cache_disable_inst (
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PPC_Set_HID0( value );
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}
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#elif ( defined(mpc860) || defined(mpc821) )
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#elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) )
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#define mtspr(_spr,_reg) \
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__asm__ volatile ( "mtspr %0, %1\n" : : "i" ((_spr)), "r" ((_reg)) )
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@@ -120,18 +120,18 @@ void _CPU_cache_disable_data ( void )
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isync;
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}
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void _CPU_cache_invalidate_1_inst_line(
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void _CPU_cache_invalidate_1_instruction_line(
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const void * _address )
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{
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register const void *__address = _address;
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asm volatile ( "icbi 0,%0" :: "r" (__address) );
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}
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void _CPU_cache_invalidate_entire_inst ( void ) {}
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void _CPU_cache_freeze_inst ( void ) {}
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void _CPU_cache_unfreeze_inst ( void ) {}
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void _CPU_cache_invalidate_entire_instruction ( void ) {}
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void _CPU_cache_freeze_instruction ( void ) {}
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void _CPU_cache_unfreeze_instruction ( void ) {}
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void _CPU_cache_enable_inst ( void )
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void _CPU_cache_enable_instruction ( void )
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{
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unsigned32 r1;
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r1 = (0x2<<24);
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@@ -139,7 +139,7 @@ void _CPU_cache_enable_inst ( void )
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isync;
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}
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void _CPU_cache_disable_inst ( void )
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void _CPU_cache_disable_instruction ( void )
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{
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unsigned32 r1;
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r1 = (0x4<<24);
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