Commit Graph

374 Commits

Author SHA1 Message Date
Karel Gardas
8604b46ab6 bsps/stm32h7: set default SDRAM x sizes on stm32h747i-disco BSP
This means:

SDRAM 1: 0
SDRAM 2: 32 MB

Sponsored-By:	Precidata
2022-06-01 15:49:19 +02:00
Karel Gardas
587ce75111 bsps/stm32h7: disable all unsupported U(S)ARTs on stm32h747i-disco BSP
This patch disables all U(S)ARTs which are not supported by the board
itself and its provided connectors. That means only USART1 and 2
and UART8 are enabled.

Sponsored-By:	Precidata
2022-06-01 15:49:19 +02:00
Karel Gardas
8abb339640 bsps/stm32h7: add configuration and enable build of stm32h747i-disco BSP
Sponsored-By:	Precidata
2022-06-01 15:49:19 +02:00
Karel Gardas
04fd4ef2b6 bsps/stm32h7: set default SDRAM x sizes on stm32h757i-eval-m4 BSP
This means:

SDRAM 1: 0
SDRAM 2: 32 MB

Sponsored-By:   Precidata
2022-06-01 11:20:59 +02:00
Karel Gardas
30b2ad318b bsps/stm32h7: disable all U(S)ARTs except USART1 on stm32h757i-eval-m4 BSP
This patch disables all U(S)ARTs which are not supported by the board
itself and its provided connectors.

Sponsored-By:   Precidata
2022-06-01 11:20:59 +02:00
Karel Gardas
250254ff8f bsps/stm32h7: add configuration and enable build of stm32h757i-eval-m4 BSP
This is minimalist configuration for the stm32h757i-eval-m4 BSP provided
here. The only general enhancement worth mention is a flash origin address
configuration which is needed for simplification as M4 core boots
from second flash bank which starts at 0x8100000 by default. The boot
address of the core may be changed by using STM32CubeProgrammer. If done
so then also BSP configuration needs to be changed accordingly.

As the BSP variant is running on M4 core, there is also more configuration
changes required here. E.g. boot core and ABI (compilation flags)
in comparison with stm32h757i-eval BSP. On the other hand, C code is shared
completely with this BSP variant.

Sponsored-By:   Precidata
2022-06-01 11:20:59 +02:00
Karel Gardas
bdfc8d8f4d bsps/stm32h7: move cache implementation from obj to BSPs own yml file
This is done in preparation for future Cortex-M4 based BSP variants
which do not provide cache at all.

Sponsored-By:	Precidata
2022-06-01 11:20:59 +02:00
Karel Gardas
186c891182 bsps/stm32h7: set default SDRAM x sizes on stm32h757i-eval BSP
This means:

SDRAM 1: 0
SDRAM 2: 32 MB

Sponsored-By:	Precidata
2022-05-27 20:17:32 +02:00
Karel Gardas
42ed4a6338 bsps/stm32h7: provide linkcmds for SRAM, FLASH_SDRAM and SRAM_SDRAM linking
Sponsored-By:	Precidata
2022-05-27 20:17:32 +02:00
Karel Gardas
3aab95f3a7 bsps/stm32h7: add and enable test set exclusion for stm32h757i-eval BSP
Sponsored-By:	Precidata
2022-05-27 20:17:32 +02:00
Karel Gardas
1ea6540c62 bsps/stm32h7: disable all U(S)ARTs except USART1 on stm32h757i-eval BSP
This patch disables all U(S)ARTs which are not supported by the board
itself and its provided connectors.

Sponsored-By:	Precidata
2022-05-27 20:17:32 +02:00
Karel Gardas
124912445c bsps/stm32h7: add configuration and enable build of stm32h757i-eval BSP
This is minimalist configuration for the stm32h757i-eval BSP provided
here. The only general enhancement worth mention is boot core
configuration which is needed here as this is the first dual-core board
supported by stm32h7 BSP family and we need to choose boot core in order
to get C files compiling well.

Sponsored-By:	Precidata
2022-05-27 20:17:32 +02:00
Gabriel Moyano
6553bf4ab6 testsuites/sptests: Add sppps01 test
Update #2349.
2022-05-23 09:09:06 +02:00
Karel Gardas
31f756b07c bsp/stm32h7: copy system files to nucleo-h743zi board directory
Also adjust BSP spec file to make it buildable with board files.

Sponsored-By:	Precidata
2022-05-16 10:23:27 +02:00
Karel Gardas
f8a9a47de1 bsp/stm32h7: copy system files to stm32h743i-eval board directory
Also adjust BSP spec file to make it buildable with board files.

Sponsored-By:	Precidata
2022-05-16 10:23:27 +02:00
Karel Gardas
7234516cc5 bsp/stm32h7: copy system files to stm32h7b3i-dk board directory
Also adjust BSP spec file to make it buildable with board files.

Sponsored-By:	Precidata
2022-05-16 10:23:27 +02:00
Karel Gardas
836eeb686b bsp/stm32h7: move compilation of system files to BSPs spec. files
The patch is done in preparation for stm32h7 BSP tree refactoring.

Sponsored-By:	Precidata
2022-05-16 10:23:27 +02:00
Sebastian Huber
4e449f49ac build: Check for psxtests prerequisites
Close #4645.
2022-05-05 08:18:29 +02:00
Sebastian Huber
7beb4fa3b8 build: Remove obsolete test excludes 2022-04-06 16:26:52 +02:00
Sebastian Huber
9abcaaebc3 bsps: Add <dev/irq/arm-gicv3.h>
Separate the Interrupt Manager implementation from the generic Arm GICv3
support.  Move parts of the Arm GICv3 support into a new header file.  This
helps to support systems with a clustered structure in which multiple GICv3
instances are present.  For example, two clusters of two Cortex-R52 cores where
each cluster has a dedicated GICv3 instance.
2022-04-06 09:48:51 +02:00
Sebastian Huber
c1a6e6275b unit: Test red-black trees 2022-04-06 09:38:09 +02:00
Sebastian Huber
7ca6eeee79 unit: Add test for misaligned builtin memcpy() 2022-04-06 09:38:09 +02:00
Sebastian Huber
95e3ade435 unit: Add a unit test suite 2022-04-06 09:38:09 +02:00
Sebastian Huber
39439d4c85 bsp/stm32h7: Disable some tests for a variant
Making this BSP a small memory target is a bit coarse and could be improved.
2022-04-06 09:38:09 +02:00
Karel Gardas
282fba3c88 bsps/stm32h7: link to flash on STM32H7B3I-DK
The patch is needed due to smaller SRAM and completely disabled
SDRAM on the BSP variant.
2022-04-06 08:18:23 +02:00
Karel Gardas
bf64ff2bb7 bsp/stm32h7: use appropriate STM32H7B3xxQ define for STM32H7B3I-DK BSP variant 2022-04-05 09:56:06 +02:00
Karel Gardas
2414d9b151 bsp/stm32h7: configure S(D)RAM values for STM32H7B3I-DK BSP variant
Caveat: SDRAM 1 is completely disabled for now.
2022-04-05 09:56:05 +02:00
Karel Gardas
c2e4128f73 bsp/stm32h7: HSE clock value configuration for STM32H7B3I-DK BSP variant 2022-04-05 09:56:05 +02:00
Karel Gardas
c48bedd13a bsp/stm32h7: add flash latency configuration 2022-04-05 09:56:05 +02:00
Karel Gardas
0acc136039 bsp/stm32h7: add configuration for USART1 GPIO pins, registers and alternate function 2022-04-05 09:56:05 +02:00
Karel Gardas
51db61ae48 bsp/stm32h7: disable UART 5, 7, 8, 9 and USART 3, 6, 10 for STM32H7B3I-DK BSP 2022-04-05 09:56:05 +02:00
Karel Gardas
044bc3ceab bsp/stm32h7: add power supply configuration 2022-04-05 09:56:05 +02:00
Karel Gardas
1050b6294d bsp/stm32h7: add spec file for the STM32H7B3I-DK BSP variant 2022-04-05 09:56:05 +02:00
Sebastian Huber
9f9f1408a1 rtems: Clarify scheduler of created task 2022-03-29 17:19:42 +02:00
Sebastian Huber
c2d7376f06 validation: Use individual names for ident tests
Make the task configuration reusable.

Update #3716.
2022-03-29 17:19:42 +02:00
Sebastian Huber
36615183d6 smp: Add fatal error
Add SMP-specifc SMP_FATAL_MULTITASKING_START_ON_NOT_ONLINE_PROCESSOR
fatal error.  This fatal error helps to diagnose a broken SMP startup
sequence.  Without this error a context switch using the NULL pointer
for the thread control block happens which may be difficult to debug.
2022-03-24 11:10:49 +01:00
Sebastian Huber
14de245d05 validation: Test support functions
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
ab2c04a86f validation: Test thread implementation
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
4a8f4b7202 validation: Test SMP-specific aspects
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
ff50664c5c validation: Test scheduler operations
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
9f283e79f2 validation: Test C libary functions
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
c24747a69b validation: Test <sys/lock.h> mutex operations
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
5fb7ce8835 validation: Test futex support
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
fa660c4d5b validation: Test status code directives
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
7eb4fc8d43 validation: Test timecounter
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
bc0cd6951e validation: Test object services
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
c88db0f5fb validation: Test User Extensions Manager
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Frank Kühndel
565a7e6654 validation: Test Timer Manager
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
6b29390484 validation: Test Task Manager
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00
Sebastian Huber
32e472a765 validation: Test Signal Manager
The test source code is generated from specification items
by the "./spec2modules.py" script contained in the
git://git.rtems.org/rtems-central.git Git repository.

Please read the "How-To" section in the "Software Requirements Engineering"
chapter of the RTEMS Software Engineering manual to get more information about
the process.

Update #3716.
2022-03-24 11:10:49 +01:00