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37,026 Commits 7 Branches 54 Tags
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Author SHA1 Message Date
Sebastian Huber
269f4ca5db bsps/aarch64: Use dependency injection 
Let the caller provide the translation table base and the used page
tables to ease testing.

Simplify the error handling by using early returns.

Return RTEMS_TOO_MANY instead of RTEMS_NO_MEMORY if the page tables are
all used.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
4b1e80dff5 bsps/aarch64: Improve MMU mapping 
Produce only one fatal error.  Fix potential integer overflow errors.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
8c4cc767b5 aarch64/xilinx-zynqmp: Move MMU config table 2024-10-11 01:27:48 +02:00
Sebastian Huber
41ed4b5d26 bsps/aarch64: Assume that all levels have a data cache 
This is the case for all currently supported AArch64 targets.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
aac760584b bsps/aarch64: Fix entire data cache flush/invalidate 
The cache maintenance operations affect only the current PE.  Make sure
that thread dispatching is disabled and interrupts cannot interfere.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
064a672fbb bsps/aarch64: Simplify AArch64_clidr_get_cache_type() 2024-10-11 01:27:48 +02:00
Sebastian Huber
098f8cb079 bsps/aarch64: Fix AArch64_get_ccsidr_for_level() 2024-10-11 01:27:48 +02:00
Sebastian Huber
77094f11b1 bsps/aarch64: Simplify I-cache invalidate 2024-10-11 01:27:48 +02:00
Sebastian Huber
cfd885850a bsps/aarch64: Use fatal error for data cache disable 
On the Cortex-A cores, at least the L1 data cache is required to provide
support for atomic operations.

Update #5050.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
3fd063159d dev/irq: Simplify SMP GIC initialization 
There is no need to wait on secondary processors for the GIC distributor
enable since the BSPs for real targets start the secondary processors
in _CPU_SMP_Start_processor().
 2024-10-11 01:27:48 +02:00
Sebastian Huber
f43042cd06 bsps: Move <bsp/linker-symbols.h> to shared 
Move architecture-independent items to a shared <bsp/linker-symbols.h>.
Allow architectures to customize it through <bsp/linker-symbols-arch.h>.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
c538079ec1 aarch64: Remove trapped FP exceptions support 
Whether a floating-point implementation supports trapping of
floating-point exceptions is implementation defined.  At least Qemu,
Cortex-A53, and Cortex-A72 do not support them.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
42c6f727d6 dev/irq: Remove arm_gic_irq_generate_software_irq() 
Replace uses with API calls.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
5a962e3bb7 arm/aarch64: Optimize _CPU_SMP_Send_interrupt() 
Avoid superfluous error checks.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
5ff5bd3c10 aarch64: More robust SMP system start 
In SMP configurations, check that we run on a configured processor.  If not,
then there is not much that can be done since we do not have a stack available
for this processor.  Just loop forever in this case.  Do this in assemlby to
ensure that no stack memory is used.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
1524b5f923 aarch64/xilinx-zynqmp: Move get I2C clocks 
Not all applications use I2C.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
f630be8933 aarch64/xilinx-zynqmp: Simplify startup 
There is no need to copy sections since the linker command file has no separate
runtime and load regions for the sections.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
8db6a45009 bsps: Assembly implementation for PSCI bsp_reset() 
Avoid issues with potential dead code after the secure monitor or
hypervisor call.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
a8d3efe4b0 dev/irq: Simplify GICv2 set/get affinity 2024-10-11 01:27:48 +02:00
Sebastian Huber
2b36492366 aarch64: Move exception frame support 
The exception frame handling support is optional.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
8d6e8f153c aarch64: Split exception support 
Resuming a non-interrupt exception is optional.
 2024-10-11 01:27:48 +02:00
Sebastian Huber
07217e3f5c bsps/aarch64: Customize EL2/EL3 start support 
Make the support for starting in EL2/EL3 customizable.  A boot loader or
the Arm Trusted Firmware should start RTEMS in non-secure EL1 mode.

In start.S, use local labels.

For the aarch64/xilinx-zynqmp the support for starting in EL2/EL3 is
disabled by default.  For the Qemu xlnx-zcu102 machine, the default is
to start in non-secure EL1 mode.  This can be controlled by options, for
example "-machine xlnx-zcu102,secure=on,virtualization=on".
 2024-10-11 01:27:44 +02:00
Sebastian Huber
dd3bc5bfb7 bsps: Remove superfluous include 2024-10-08 00:30:54 +02:00
Sebastian Huber
c388c3d19e bsps/arm: Add missing GICv3 distributor registers 2024-10-08 00:30:54 +02:00
Sebastian Huber
bd9f5c1eb0 Revert "build: Fix "set-value-enabled-by"" 
This reverts commit a616d26d6d.

The change was accidentally submitted and relates to a different branch.
 2024-10-05 19:31:02 +00:00
Christian Mauderer
98f2ae3449 bsps/arm/beagle: Remove README.md and old script 
The information from the README.md have been merged into the
documentation.

The necessary tools for the sdcard.sh are quite tricky to build. All
necessary information to create an SD image are in the documentation
already. So the script isn't necessary any more.

Update #5088
 2024-10-05 19:29:15 +00:00
alessandronardin
d604ec899d posix/aio_misc.c: Added comment explaining coverity false positive. 
Added comment in rtems_aio_handle() explaining why the Coverity
issue 1592927 is a false positive.
 2024-10-05 19:28:27 +00:00
Kinsey Moore
85ccfe24bf bsps/aarch64/mmu: Align dynamically mapped blocks 
Dynamically mapped blocks must be aligned to the MMU page size just like
startup-configured blocks. This was not being enforced and could cause a
hang with bad input.
 2024-10-04 13:25:42 +00:00
Sebastian Huber
a616d26d6d build: Fix "set-value-enabled-by" 
Fix Python error:

  File "wscript", line 1096, in _set_value_enabled_by
    if _is_enabled(conf.env.ENABLE, value_enabled_by["enabled-by"]):
       ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TypeError: _is_enabled() missing 1 required positional argument: 'enabled_by'
 2024-10-04 03:01:16 +02:00
Chris Johns
ea475e8719 waf: Update waf to version 2.1.2 2024-10-03 17:59:30 +00:00
Chris Johns
43e201e210 git: Remove auto* files from git ignore 2024-10-03 18:37:05 +10:00
Kinsey Moore
a9055cbf10 cpukit/aarch64: Fix spelling 2024-10-03 03:02:54 +00:00
Kinsey Moore
f80cee565b spec/libtests: Exclude Thumb-only BSPs from building dl13 
This test requires ARM instruction support and causes build failures on
Thumb-only BSPs.
 2024-10-03 02:03:09 +00:00
Sebastian Huber
410436b800 arm/xilinx-zynqmp-rpu: Use UART 0 by default 
This simplifies the setup for sequential test runs of the APU and RPU
BSPs.
 2024-10-02 05:36:00 +02:00
Sebastian Huber
9624b31408 arm/xilinx-zynqmp-rpu: Implement bsp_reset() 2024-10-02 05:36:00 +02:00
Sebastian Huber
95649a0aca arm/xilinx-zynqmp-rpu: Add section for the OCM 2024-10-02 05:36:00 +02:00
Sebastian Huber
75062c2dbf arm/xilinx-zynqmp-rpu: Simplify MPU configuration 
Use the PMSAv7 support from <rtems/score/armv7-pmsa.h> instead of the
one from the Xilinx support.
 2024-10-02 05:36:00 +02:00
Sebastian Huber
dddbdf4d9a arm/xilinx-zynqmp-rpu: Add split mode BSP variants 
Rename xilinx_zynqmp_rpu BSP variant to zynqmp_rpu_lock_step to
emphasize that this BSP is for the lock-step mode RPU configuration.
Add BSP variants zynqmp_rpu_split_0 and zynqmp_rpu_split_1 for the split
mode RPU configuration for core 0 and 1 respectively.
 2024-10-02 05:35:47 +02:00
Sebastian Huber
5f1a9d3346 arm/xilinx-zynqmp-rpu: Simplify startup 
There is no need to copy sections since the linker command file has no separate
runtime and load regions for the sections.
 2024-10-02 05:24:30 +02:00
Sebastian Huber
1b2ebe1516 arm/xilinx-zynqmp-rpu: Remove superfluous defines 2024-10-02 05:24:30 +02:00
Sebastian Huber
08f27b35aa arm/xilinx-zynqmp-rpu: Remove superfluous option 2024-10-02 05:24:30 +02:00
Sebastian Huber
a78d31de7f arm/xilinx-zynqmp-rpu: Fix file header and copyrights 
Remove copyright from DornerWorks since the files contain not contributions
from this company.  Fix the copyright years of the embedded brains
contributions.
 2024-10-02 05:24:30 +02:00
Sebastian Huber
c91b26ef76 arm/xilinx-zynqmp-rpu: Add cache manager support 2024-10-02 05:24:30 +02:00
Sebastian Huber
4515a7b593 arm/xilinx-zynqmp-rpu: Remove superfluous object 2024-10-02 05:24:30 +02:00
Sebastian Huber
7d9914b90e arm/xilinx-zynqmp-rpu: Use -O2 2024-10-02 05:24:30 +02:00
Sebastian Huber
c4a5dfeb5d arm/xilinx-zynqmp-rpu: Include standard header 2024-10-02 05:24:30 +02:00
Sebastian Huber
ddef4ed1b0 dev/irq: Conditionally enable GIC get/set group 2024-10-02 05:24:30 +02:00
Sebastian Huber
a947bba9df dev/irq: Add BSP_IRQ_HAVE_GET_SET_AFFINITY 
Allow BSPs to provide the interrupt get/set affinity implementation even for
non-SMP configurations.
 2024-10-02 05:24:30 +02:00
Sebastian Huber
2c2f9a1451 dev/irq: Add BSP_ARM_GIC_MULTI_PROCESSOR_SECONDARY 
Add support for the BSP_ARM_GIC_MULTI_PROCESSOR_SECONDARY build option
for the GICv2 support.  This option is useful for multiprocessor systems
without SMP support.
 2024-10-02 05:24:30 +02:00
Sebastian Huber
54c64352d5 bsps/arm: Add files to Doxygen group 2024-10-02 05:24:30 +02:00