This imports the full xil_exception.h instead of an empty stub. This is
required for some Xilinx drivers. The imported files adhere to the
current VERSION file.
This makes xil/sleep.h a stub to prevent multiple differing definitions
of sleep functions from toolchain and local headers. The non-standard
sleep definitions were not in use and can be added later if needed.
There are different cases for _ISR_lock_ISR_disable() and
_ISR_lock_ISR_enable() in the case RTEMS_SMP is defined or
RTEMS_PROFILING is defined, so remove the related code.
../../../cpukit/include/rtems/score/threaddispatch.h: In function '_Thread_Dispatch_disable':
../../../cpukit/include/rtems/score/threaddispatch.h:231:14: warning: 'lock_context' may be used uninitialized [-Wmaybe-uninitialized]
231 | cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../cpukit/include/rtems/score/threaddispatch.h:210:32: note: by argument 1 of type 'const ISR_lock_Context *' to '_Thread_Dispatch_disable_critical' declared here
210 | static inline Per_CPU_Control *_Thread_Dispatch_disable_critical(
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../cpukit/include/rtems/score/threaddispatch.h:225:21: note: 'lock_context' declared here
225 | ISR_lock_Context lock_context;
| ^~~~~~~~~~~~
Update #4662.
The objxilinxsupport build object was accidentally included twice in
some of the ZynqMP BSPs by two different drivers that required it. This
commit manually deduplicates the inclusions by moving that inclusion to
the BSP. Duplication of object inclusions is considered a bug and can
cause race conditions in the build system.
The QSPI memory is initialized and used only when the BSP configure file
sets QSPI memory size to non-zero value. Currently QSPI is run in memory
mapped mode which allows future RTEMS binary linkage and upload into QSPI
memory.
Sponsored-By: Precidata
Add an assert to _Thread_Initialize_scheduler_and_wait_nodes() which may
help a static analyzer. Use a do/while loop since we have at least one
scheduler.
Update #4832.
This adds helper functions for working with NOR flash connected to the
Xilinx GQSPI controller. The helper functions are based on Xilinx's
QSPIPSU flash interrupt example.
This adds Xilinx's driver for the Xilinx GQSPI controller embedded in
the ZynqMP SoC. Within that device alone, it is possible to access this
peripheral from MicroBlaze, ARMv7, and ARMv8 cores. The imported files
are and should be able to remain unmodified. Import information is kept
in bsps/shared/dev/spi/VERSION.
This adds basic TLS relocation support for AArch64 to libdl. This lets
loadable modules use TLS symbols hosted in the main binary. This does
not allow loadable modules to host their own TLS symbols.
Merge the "default" and "default-by-variant" attributes. Use an
"enabled-by" expression to select the default value based on the enabled
set. This makes it possible to select default values depending on other
options. For example you could choose memory settings based on whether
RTEMS_SMP is enabled or disabled.
The change was tested by comparing the output of
./waf bspdefaults
before and after the change.
