forked from Imagelibrary/rtems
bsps/stm32h7: import stm32h757i-eval QSPI memory high-level driver
This commit is contained in:
Karel Gardas
@@ -0,0 +1,130 @@
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/* SPDX-License-Identifier: BSD-3-Clause */
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/**
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******************************************************************************
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* @file stm32h747i_eval_config.h
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* @author MCD Application Team
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* @brief STM32H747I_EVAL board configuration file.
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******************************************************************************
|
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* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
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||||
*/
|
||||
/*
|
||||
* RTEMS committer clarification comment on license above:
|
||||
*
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||||
* This file comes from STM32CubeH7 project and is located here:
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* https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Drivers/BSP/STM32H747I-EVAL/stm32h747i_eval_conf_template.h
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*
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* The file root directory is:
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* https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Drivers/BSP/STM32H747I-EVAL
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*
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||||
* This directory contains LICENSE.md file with a following license text:
|
||||
*
|
||||
* Copyright 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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||||
*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H747I_EVAL_CONFIG_H
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#define STM32H747I_EVAL_CONFIG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal.h"
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/* COM define */
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#define USE_COM_LOG 0U
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/* IO class usage define */
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#define USE_BSP_IO_CLASS 1U
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/* JOY usage define */
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#define USE_BSP_JOY_FEATURE 1U
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/* POT usage define */
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#define USE_BSP_POT_FEATURE 1U
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/* LCD controllers defines */
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#define USE_LCD_CTRL_OTM8009A 1U
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#define USE_LCD_CTRL_ADV7533 1U
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#define LCD_LAYER_0_ADDRESS 0xD0000000U
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#define LCD_LAYER_1_ADDRESS 0xD0200000U
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/* SD high performance usage define */
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#define USE_SD_HIGH_PERFORMANCE 0U
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/*DMA2D to fill RGB rectangle usage define*/
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#define USE_DMA2D_TO_FILL_RGB_RECT 0U
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/* Audio codecs defines */
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#define USE_AUDIO_CODEC_WM8994 1U
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#define USE_AUDIO_CODEC_ADV7533 1U
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/* Default Audio IN internal buffer size */
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#define DEFAULT_AUDIO_IN_BUFFER_SIZE 256U
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/* TS supported features defines */
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#define USE_TS_GESTURE 1U
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#define USE_TS_MULTI_TOUCH 1U
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/* Default TS touch number */
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#define TS_TOUCH_NBR 2U
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/* Default EEPROM max trials */
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#define EEPROM_MAX_TRIALS 3000U
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/* IRQ priorities */
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#define BSP_SRAM_IT_PRIORITY 15U
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#define BSP_SDRAM_IT_PRIORITY 15U
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#define BSP_IOEXPANDER_IT_PRIORITY 15U
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#define BSP_BUTTON_USER_IT_PRIORITY 15U
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#define BSP_BUTTON_WAKEUP_IT_PRIORITY 15U
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#define BSP_BUTTON_TAMPER_IT_PRIORITY 15U
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#define BSP_AUDIO_OUT_IT_PRIORITY 14U
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#define BSP_AUDIO_IN_IT_PRIORITY 15U
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#define BSP_SD_IT_PRIORITY 14U
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#define BSP_SD_RX_IT_PRIORITY 14U
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#define BSP_SD_TX_IT_PRIORITY 15U
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#define BSP_TS_IT_PRIORITY 15U
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32H747I_EVAL_CONFIG_H */
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@@ -0,0 +1,105 @@
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/* SPDX-License-Identifier: BSD-3-Clause */
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/**
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******************************************************************************
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* @file stm32h747i_eval_errno.h
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* @author MCD Application Team
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* @brief Error Code.
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
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*/
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/*
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* RTEMS committer clarification comment on license above:
|
||||
*
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||||
* This file comes from STM32CubeH7 project and is located here:
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* https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Drivers/BSP/STM32H747I-EVAL/stm32h747i_eval_errno.h
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*
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* The file root directory is:
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* https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Drivers/BSP/STM32H747I-EVAL
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||||
*
|
||||
* This directory contains LICENSE.md file with a following license text:
|
||||
*
|
||||
* Copyright 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H747I_EVAL_ERRNO_H
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#define STM32H747I_EVAL_ERRNO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Common Error codes */
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#define BSP_ERROR_NONE 0
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#define BSP_ERROR_NO_INIT -1
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#define BSP_ERROR_WRONG_PARAM -2
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#define BSP_ERROR_BUSY -3
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#define BSP_ERROR_PERIPH_FAILURE -4
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#define BSP_ERROR_COMPONENT_FAILURE -5
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#define BSP_ERROR_UNKNOWN_FAILURE -6
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#define BSP_ERROR_UNKNOWN_COMPONENT -7
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#define BSP_ERROR_BUS_FAILURE -8
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#define BSP_ERROR_CLOCK_FAILURE -9
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#define BSP_ERROR_MSP_FAILURE -10
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#define BSP_ERROR_FEATURE_NOT_SUPPORTED -11
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/* BSP OSPI error codes */
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#define BSP_ERROR_QSPI_ASSIGN_FAILURE -24
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#define BSP_ERROR_QSPI_SETUP_FAILURE -25
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#define BSP_ERROR_QSPI_MMP_LOCK_FAILURE -26
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#define BSP_ERROR_QSPI_MMP_UNLOCK_FAILURE -27
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/* BSP TS error code */
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#define BSP_ERROR_TS_TOUCH_NOT_DETECTED -30
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/* BSP BUS error codes */
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#define BSP_ERROR_BUS_TRANSACTION_FAILURE -100
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#define BSP_ERROR_BUS_ARBITRATION_LOSS -101
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#define BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE -102
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#define BSP_ERROR_BUS_PROTOCOL_FAILURE -103
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#define BSP_ERROR_BUS_MODE_FAULT -104
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#define BSP_ERROR_BUS_FRAME_ERROR -105
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#define BSP_ERROR_BUS_CRC_ERROR -106
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#define BSP_ERROR_BUS_DMA_FAILURE -107
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32H747I_EVAL_ERRNO_H */
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1088
bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h747i_eval_qspi.c
Normal file
1088
bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h747i_eval_qspi.c
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,284 @@
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/* SPDX-License-Identifier: BSD-3-Clause */
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/**
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******************************************************************************
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* @file stm32h747i_eval_qspi.h
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* @author MCD Application Team
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* @brief This file contains the common defines and functions prototypes for
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* the stm32h747i_eval_qspi.c driver.
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******************************************************************************
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* @attention
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*
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||||
* Copyright (c) 2019 STMicroelectronics.
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||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
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/*
|
||||
* RTEMS committer clarification comment on license above:
|
||||
*
|
||||
* This file comes from STM32CubeH7 project and is located here:
|
||||
* https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Drivers/BSP/STM32H747I-EVAL/stm32h747i_eval_qspi.h
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*
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* The file root directory is:
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* https://github.com/STMicroelectronics/STM32CubeH7/tree/master/Drivers/BSP/STM32H747I-EVAL
|
||||
*
|
||||
* This directory contains LICENSE.md file with a following license text:
|
||||
*
|
||||
* Copyright 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
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/* Define to prevent recursive inclusion -------------------------------------*/
|
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#ifndef STM32H747I_EVAL_QSPI_H
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#define STM32H747I_EVAL_QSPI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h747i_eval_conf.h"
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#include "stm32h747i_eval_errno.h"
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#include "../Components/mt25tl01g/mt25tl01g.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup STM32H747I_EVAL
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* @{
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*/
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/** @addtogroup STM32H747I_EVAL_QSPI
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup STM32H747I_EVAL_QSPI_Exported_Types QSPI Exported Types
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* @{
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*/
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#define BSP_QSPI_Info_t MT25TL01G_Info_t
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#define BSP_QSPI_Interface_t MT25TL01G_Interface_t
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#define BSP_QSPI_Transfer_t MT25TL01G_Transfer_t
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#define BSP_QSPI_DualFlash_t MT25TL01G_DualFlash_t
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#define BSP_QSPI_ODS_t MT25TL01G_ODS_t
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typedef enum
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{
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BSP_QSPI_ERASE_8K = MT25TL01G_ERASE_4K , /*!< 8K size Sector erase = 2 x 4K as Dual flash mode is used for this board */
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BSP_QSPI_ERASE_64K = MT25TL01G_ERASE_32K , /*!< 64K size Sector erase = 2 x 32K as Dual flash mode is used for this board */
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BSP_QSPI_ERASE_128K = MT25TL01G_ERASE_64K , /*!< 128K size Sector erase = 2 x 64K as Dual mode is used for this board */
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BSP_QSPI_ERASE_CHIP = MT25TL01G_ERASE_CHIP /*!< Whole chip erase */
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} BSP_QSPI_Erase_t;
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|
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typedef enum
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{
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QSPI_ACCESS_NONE = 0, /*!< Instance not initialized, */
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QSPI_ACCESS_INDIRECT, /*!< Instance use indirect mode access */
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QSPI_ACCESS_MMP /*!< Instance use Memory Mapped Mode read */
|
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} BSP_QSPI_Access_t;
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typedef struct
|
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{
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BSP_QSPI_Access_t IsInitialized; /*!< Instance access Flash method */
|
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BSP_QSPI_Interface_t InterfaceMode; /*!< Flash Interface mode of Instance */
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BSP_QSPI_Transfer_t TransferRate; /*!< Flash Transfer mode of Instance */
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uint32_t DualFlashMode; /*!< Flash dual mode */
|
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uint32_t IsMspCallbacksValid;
|
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} BSP_QSPI_Ctx_t;
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|
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typedef struct
|
||||
{
|
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BSP_QSPI_Interface_t InterfaceMode; /*!< Current Flash Interface mode */
|
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BSP_QSPI_Transfer_t TransferRate; /*!< Current Flash Transfer mode */
|
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BSP_QSPI_DualFlash_t DualFlashMode; /*!< Dual Flash mode */
|
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} BSP_QSPI_Init_t;
|
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|
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typedef struct
|
||||
{
|
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uint32_t FlashSize;
|
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uint32_t ClockPrescaler;
|
||||
uint32_t SampleShifting;
|
||||
uint32_t DualFlashMode;
|
||||
}MX_QSPI_Init_t;
|
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#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
|
||||
typedef struct
|
||||
{
|
||||
void(*pMspInitCb)(pQSPI_CallbackTypeDef);
|
||||
void(*pMspDeInitCb)(pQSPI_CallbackTypeDef);
|
||||
}BSP_QSPI_Cb_t;
|
||||
#endif /* (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup STM32H747I_EVAL_QSPI_Exported_Constants QSPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/* QSPI instances number */
|
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#define QSPI_INSTANCES_NUMBER 1U
|
||||
|
||||
/* Definition for QSPI modes */
|
||||
#define BSP_QSPI_SPI_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_MODE /* 1 Cmd Line, 1 Address Line and 1 Data Line */
|
||||
#define BSP_QSPI_SPI_1I2O_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_1I2O_MODE /* 1 Cmd Line, 1 Address Line and 2 Data Lines */
|
||||
#define BSP_QSPI_SPI_2IO_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_2IO_MODE /* 1 Cmd Line, 2 Address Lines and 2 Data Lines */
|
||||
#define BSP_QSPI_SPI_1I4O_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_1I4O_MODE /* 1 Cmd Line, 1 Address Line and 4 Data Lines */
|
||||
#define BSP_QSPI_SPI_4IO_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_4IO_MODE /* 1 Cmd Line, 4 Address Lines and 4 Data Lines */
|
||||
#define BSP_QSPI_DPI_MODE (BSP_QSPI_Interface_t)MT25TL01G_DPI_MODE /* 2 Cmd Lines, 2 Address Lines and 2 Data Lines */
|
||||
#define BSP_QSPI_QPI_MODE (BSP_QSPI_Interface_t)MT25TL01G_QPI_MODE /* 4 Cmd Lines, 4 Address Lines and 4 Data Lines */
|
||||
|
||||
/* Definition for QSPI transfer rates */
|
||||
#define BSP_QSPI_STR_TRANSFER (BSP_QSPI_Transfer_t)MT25TL01G_STR_TRANSFER /* Single Transfer Rate */
|
||||
#define BSP_QSPI_DTR_TRANSFER (BSP_QSPI_Transfer_t)MT25TL01G_DTR_TRANSFER /* Double Transfer Rate */
|
||||
|
||||
/* Definition for QSPI dual flash mode */
|
||||
#define BSP_QSPI_DUALFLASH_DISABLE (BSP_QSPI_DualFlash_t)MT25TL01G_DUALFLASH_DISABLE /* Dual flash mode enabled */
|
||||
/* Definition for QSPI Flash ID */
|
||||
#define BSP_QSPI_FLASH_ID QSPI_FLASH_ID_1
|
||||
|
||||
/* QSPI block sizes for dual flash */
|
||||
#define BSP_QSPI_BLOCK_8K MT25TL01G_SECTOR_4K
|
||||
#define BSP_QSPI_BLOCK_64K MT25TL01G_BLOCK_32K
|
||||
#define BSP_QSPI_BLOCK_128K MT25TL01G_BLOCK_64K
|
||||
|
||||
/* Definition for QSPI clock resources */
|
||||
#define QSPI_CLK_ENABLE() __HAL_RCC_QSPI_CLK_ENABLE()
|
||||
#define QSPI_CLK_DISABLE() __HAL_RCC_QSPI_CLK_DISABLE()
|
||||
#define QSPI_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
|
||||
#define QSPI_BK1_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define QSPI_BK1_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK1_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK1_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK1_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
|
||||
#define QSPI_BK2_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
|
||||
#define QSPI_BK2_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define QSPI_BK2_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
|
||||
#define QSPI_BK2_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
#define QSPI_BK2_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
|
||||
|
||||
|
||||
#define QSPI_FORCE_RESET() __HAL_RCC_QSPI_FORCE_RESET()
|
||||
#define QSPI_RELEASE_RESET() __HAL_RCC_QSPI_RELEASE_RESET()
|
||||
|
||||
/* Definition for QSPI Pins */
|
||||
#define QSPI_CLK_PIN GPIO_PIN_2
|
||||
#define QSPI_CLK_GPIO_PORT GPIOB
|
||||
/* Bank 1 */
|
||||
#define QSPI_BK1_CS_PIN GPIO_PIN_6
|
||||
#define QSPI_BK1_CS_GPIO_PORT GPIOG
|
||||
#define QSPI_BK1_D0_PIN GPIO_PIN_8
|
||||
#define QSPI_BK1_D0_GPIO_PORT GPIOF
|
||||
#define QSPI_BK1_D1_PIN GPIO_PIN_9
|
||||
#define QSPI_BK1_D1_GPIO_PORT GPIOF
|
||||
#define QSPI_BK1_D2_PIN GPIO_PIN_7
|
||||
#define QSPI_BK1_D2_GPIO_PORT GPIOF
|
||||
#define QSPI_BK1_D3_PIN GPIO_PIN_6
|
||||
#define QSPI_BK1_D3_GPIO_PORT GPIOF
|
||||
|
||||
/* Bank 2 */
|
||||
#define QSPI_BK2_CS_PIN GPIO_PIN_11
|
||||
#define QSPI_BK2_CS_GPIO_PORT GPIOC
|
||||
#define QSPI_BK2_D0_PIN GPIO_PIN_2
|
||||
#define QSPI_BK2_D0_GPIO_PORT GPIOH
|
||||
#define QSPI_BK2_D1_PIN GPIO_PIN_3
|
||||
#define QSPI_BK2_D1_GPIO_PORT GPIOH
|
||||
#define QSPI_BK2_D2_PIN GPIO_PIN_9
|
||||
#define QSPI_BK2_D2_GPIO_PORT GPIOG
|
||||
#define QSPI_BK2_D3_PIN GPIO_PIN_14
|
||||
#define QSPI_BK2_D3_GPIO_PORT GPIOG
|
||||
|
||||
|
||||
/* MT25TL01G Micron memory */
|
||||
/* Size of the flash */
|
||||
#define QSPI_FLASH_SIZE 26 /* Address bus width to access whole memory space */
|
||||
#define QSPI_PAGE_SIZE 256
|
||||
|
||||
/* QSPI Base Address */
|
||||
#define QSPI_BASE_ADDRESS 0x90000000
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H747I_EVAL_QSPI_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
extern QSPI_HandleTypeDef hqspi;
|
||||
extern BSP_QSPI_Ctx_t QSPI_Ctx[];
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup STM32H747I_EVAL_QSPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
int32_t BSP_QSPI_Init(uint32_t Instance, BSP_QSPI_Init_t *Init);
|
||||
int32_t BSP_QSPI_DeInit(uint32_t Instance);
|
||||
#if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1)
|
||||
int32_t BSP_QSPI_RegisterMspCallbacks (uint32_t Instance, BSP_QSPI_Cb_t *CallBacks);
|
||||
int32_t BSP_QSPI_RegisterDefaultMspCallbacks (uint32_t Instance);
|
||||
#endif /* (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) */
|
||||
int32_t BSP_QSPI_Read(uint32_t Instance, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
|
||||
int32_t BSP_QSPI_Write(uint32_t Instance, uint8_t *pData, uint32_t WriteAddr, uint32_t Size);
|
||||
int32_t BSP_QSPI_EraseBlock(uint32_t Instance, uint32_t BlockAddress, BSP_QSPI_Erase_t BlockSize);
|
||||
int32_t BSP_QSPI_EraseChip(uint32_t Instance);
|
||||
int32_t BSP_QSPI_GetStatus(uint32_t Instance);
|
||||
int32_t BSP_QSPI_GetInfo(uint32_t Instance, BSP_QSPI_Info_t *pInfo);
|
||||
int32_t BSP_QSPI_EnableMemoryMappedMode(uint32_t Instance);
|
||||
int32_t BSP_QSPI_DisableMemoryMappedMode(uint32_t Instance);
|
||||
int32_t BSP_QSPI_ReadID(uint32_t Instance, uint8_t *Id);
|
||||
int32_t BSP_QSPI_ConfigFlash(uint32_t Instance, BSP_QSPI_Interface_t Mode, BSP_QSPI_Transfer_t Rate);
|
||||
|
||||
/* These functions can be modified in case the current settings
|
||||
need to be changed for specific application needs */
|
||||
HAL_StatusTypeDef MX_QSPI_Init(QSPI_HandleTypeDef *hQspi, MX_QSPI_Init_t *Config);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* __STM32H747I_EVAL_QSPI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
Reference in New Issue
Block a user