* new-exceptions/bspsupport/ppc_exc_async_normal.S: Bugfix for
MPC5674F. Use it for all to be safe.
* mpc55xx/include/emios.h: Fixed eMIOS module count.
* mpc55xx/include/irq.h: Fixed CAN vector numbers.
BSP_INTERRUPT_HANDLER_TABLE_SIZE is now a BSP option.
* mpc55xx/include/fsl-mpc551x.h, mpc55xx/include/fsl-mpc555x.h,
mpc55xx/include/fsl-mpc556x.h, mpc55xx/include/fsl-mpc567x.h,
mpc55xx/include/regs-edma.h, mpc55xx/include/regs-mmu.h: New files.
* Makefile.am, M preinstall.am: Reflect changes above.
* mpc55xx/dspi/dspi.c: Update due to API changes.
* mpc55xx/include/edma.h, mpc55xx/edma/edma.c: Rework to support
multiple eDMA modules. Removed complex error interrupt handling.
* mpc55xx/include/esci.h, mpc55xx/esci/esci.c: Support interrupt mode
and printk(). Use configure options.
* mpc55xx/include/irq.h: More defines. API changes.
* mpc55xx/include/mpc55xx.h: API changes.
* mpc55xx/include/reg-defs.h: Added register defines.
* mpc55xx/include/regs.h: Use new register header files.
* mpc55xx/include/siu.h: Fixed includes.
* mpc55xx/misc/fmpll.S, mpc55xx/misc/copy.S, mpc55xx/misc/flash.S:
Changed sections. API changes. Support MPC5674F.
* mpc55xx/misc/flash_support.c: New file.
* Makefile.am: Reflect change above.
* mpc55xx/include/mpc55xx.h: Add definitions for the FLASH interface
and two memory protect interfaces. Add modifications to eliminate
warnings in some of the cache macros.
* mpc55xx/include/regs.h: Add some structure tag names for some
structures that I needed access to. Don't define the ALTCADR for the
MPC5554 - it is reserved and acess casues an exception. Hide the C99
designated initializers when compiling with C++. Add some support for
the EQADC.
* mpc55xx/include/esci.h, mpc55xx/include/watchdog.h: Add C++
protection.
* mpc6xx/clock/c_clock.c, mpc6xx/mmu/mmuAsm.S,
new-exceptions/bspsupport/ppc_exc_global_handler.c,
shared/include/cpuIdent.c, shared/src/stack.c: Update due to API
changes.
PR 1832/libcpu
* at91rm9200/irq/irq.c: he bsp_interrupt_dispatch routine does not
determine the correct interrupt source number. According to the
datasheet, the reading of the interrupt vector register (AIC_IVR)
notifies the hardware that the OS is taken care of the interrupt.
Only after AIC_IVR have been read can the correct source number be
read from the interrupt status register (AIC_ISR).
* shared/src/cache_.h: Moved implementation from "cache.c" to here.
This avoids the function call overhead.
* shared/src/cache.c: Removed file.
* Makefile.am: Reflect changes above.
PR 1781/bsps
* bf52x/include: Added additional MMR.
* bf52x/interrupt: The BF52X processors have a different
System interrupt controller than present in the 53X range of
processors. The 52X have 8 interrupt assignment registers. The
implementation uses tables to increase predictability.
* serial/uart.?: Added DMA based and interrupt based transfer
support. The uart code used a single ISR for TX and RX and tried
to identify and multiplex inside the ISR. In the new code the
type of interrupt is identified by the central ISR dispatcher
bf52x/interrupt or interrupt/. This simplifies the UART ISR.
* mpc83xx/network/tsec.c: New default MAC configuration. Set MDIO
clock according to actual CCB frequency. Print media info only if we
have a PHY. Avoid infinite loop in media adaption.
