Calls from Thumb code into ARM code require the use of a BLX instruction
and an optional offset prefix instruction. The BLX instruction encoding
requires that the least significant bit be 0 in all cases while the BL
instruction for Thumb-to-Thumb calls includes that bit as part of the
offset. This ensures that bit 0 of the BLX is set to 0 as required by
the instruction encoding specification.
Fix _CPU_SMP_Get_current_processor(), since read from register MPIDR_EL1
(the least significant byte) is not always right,for example the least
significant byte of MPIDR_EL1 is always zero for cortex-a55.
aarch64 has a thread ID register TPIDR_EL1 available for for OS management
purposes. RTEMS stores per-CPU control in TPIDR_EL1 when the core startup,
so we can use _Per_CPU_Get_index() to get current processor index.
update #5064
- Refactor the pl011 driver to be extensible.
- Add IRQ support and baudrate configuration support for pl011 driver.
- Modify related BSP.
- Add doxygen comments for arm-pl011.
Close#5026
Co-authored-by: Ning Yang <yangn0@qq.com>
It is not clear why this is necessary. For example, the
zynq_uart_initialize() does not issue the '\r' before waiting for an
inactive transmission state.
Similar to the recent commit in tms570-sci.c, the assumption that a UART will
only see printable ASCII characters, instead of any value in the range
0x00-0xFF, is wrong.
A non forgiving binary protocol will be thrown off by this driver sending
"\r\r\r\r" when initializing.
If a user wants to flush the interface, they should explicitely use the
dedicated function `tcflush(fd, TCIOFLUSH);`.
Coverity CID 1619144
In rtems_aio_completed_list_op() memory was getting freed without releasing
a lock.
This commit should also solve coverity issues 1619145, 1619143 and 1619142
since they all seem to be generated by rtems_aio_completed_list_op().
Closes#5127
- change type unsigned to uint64_t, it might overflowed if
the size is greater the 4GB.
- increase buffer size is to eliminate the compiler's warning
that the buffer might be too small
For example, printf("%+i", 1) prints "+1". However, kvprintf() did
print just "1" for this example. According to PRINTF(3):
A sign must always be placed before a number produced by a signed
conversion.
For "%+r" radix conversions, keep the "+" handling as it is, since this
is a non-standard conversion. For "%+p" pointer conversions, continue
to ignore the sign modifier to be in line with libc.
This change allows to support the ' conversion modifier in the future.
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1310
The struct timespec tv_sec member is of type time_t. Make sure that all
variables related to this member are of the type time_t. This is important for
targets where long is a 32-bit type and time_t a 64-bit type.
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1373
The IRQ list in this file are specific to PC hardware and should be
part of the BSP. Further, there are paravirtualized environments which
do not follow the PC hardware IRQ list. Moving this avoids collisions.
Resurrect proper file comment. Order copyrights according to template. Remove
white space at the end of line. Do error checks early. Define objects under
optional extern "C".
Update #5047.
Modified the body of lio_listio(), to make sure it return -1 and sets
errno to ENOSYS, when RTEMS_POSIX_API is not defined.
The psxenosys test has been modified to test for lio_listio() only
when RTEMS_POSIX_API is not defined. In the test all the puts() have
been removed. If kept they would have made the output of the test depending
on the build configuration, making the content of psxenosys.scn inconsistent.
Removing the puts() makes the .scn file valid regardless of the build
configuration.
Additionally, rtems_aio_notify() in aio_misc.c has been modified,
simplifying it and reducing the part inside the ifdef.
Closes#5125
This adds support for the 6 SPI interfaces on the STM32H7 series chips
with an initial example for the stm32h750b discovery kit development
board. Configuration is similar to existing peripherals. Chip select
lines are software-controlled since the SPI peripheral only supports a
single hardware-controlled chip select line. This implementation does
not use interrupts.
