Commit Graph

1528 Commits

Author SHA1 Message Date
Joel Sherrill
06fa582130 Patches from Ralf Corsepius <corsepiu@faw.uni-ulm.de> and myself to
make solaris target buildable.

    > 1.  The ipc check fails since solaris does not define union semun.
    > The unix port code actually defines this type itself on solaris.  Doing
    > the same thing lets it get configured.  Then...

    > 2.  It looks like BSDINSTALL is not defined properly.

    BSDINSTALL is defined in make/host.cfg.in as
    BSDINSTALL=@INSTALL@

    @INSTALL@ is generated by autoconf's standard macro AC_PROG_INSTALL, which
    is widely used in almost any autoconf/automake configured package. In case
    there is really something wrong with it, then it must be considered a bug
    in autoconf.

    I can see a doubious fragment in AC_PROG_INSTALL, which is used when no
    appropriate bsd-install is found.

Finally Ralf saw a problem with the find on solaris which I also saw and
fixed.
1998-08-19 12:56:20 +00:00
Joel Sherrill
f2226f4422 Added 68060 definition from Chris Johns. 1998-08-19 12:41:22 +00:00
Joel Sherrill
e013fe3cd0 If 0 out the code which touches the chip in questionable ways for processing
a giant packet.
1998-08-14 16:55:50 +00:00
Joel Sherrill
7ba7108101 Changed tm27 clear interrupt macro on all PPC BSPs except the papyrus. 1998-08-14 15:24:09 +00:00
Joel Sherrill
db8e8a8bef Added information on caching. 1998-08-14 15:23:33 +00:00
Joel Sherrill
0088e39c49 Updated. 1998-08-14 15:23:22 +00:00
Joel Sherrill
2097470057 Fixed version reference 1998-08-13 22:46:59 +00:00
Joel Sherrill
3978eec2e8 Updated. 1998-08-13 22:46:35 +00:00
Joel Sherrill
43abd4d525 Fixed preinstall stanza so the prebuild works. 1998-08-13 22:03:14 +00:00
Joel Sherrill
8626d6dd79 base line -- copied from erc32 1998-08-13 17:46:27 +00:00
Joel Sherrill
af3e81c994 Enable TX interrupts only when we need TDAs. 1998-08-13 16:53:37 +00:00
Joel Sherrill
1253f39fd5 Cleaned up some debugging stuff.
Redid interrupt handler to read imr/isr once and to write the imr once.
1998-08-13 16:20:14 +00:00
Joel Sherrill
70502bc4c5 Don't disable the RX/TX on close in polled mode.
Fixed a comment.
1998-08-13 15:52:40 +00:00
Joel Sherrill
579fc6a3a3 Per request from Chris Johns <ccj@acm.org>, I added code to detect
when the bare bsp was enabled without setting both --enable-cpu-model
and --enable-cpu-cflags.
1998-08-13 14:47:18 +00:00
Joel Sherrill
9898425921 Patch from Chris Johns <ccj@acm.org> to change the way in which the initial
stack pointers are saved.
1998-08-13 14:28:22 +00:00
Joel Sherrill
26e5cd406a Patch from Chris Johns <ccj@acm.org>. Comments follow:
Here is a small patch which allows the m68060 to be used. I have not
    tested the FP switching stuff which we know is broken. This is taken
    against the libchip snapshot but should merge without problems. If you
    have any problems please let me know.

    There are other smaller issues such as superscalar enable and cache
    control which I have not addressed yet. They are different to all other
    m68k processors. These can wait IMO.
1998-08-13 14:23:37 +00:00
Joel Sherrill
7e19c72b13 fixed spacing 1998-08-13 14:22:48 +00:00
Joel Sherrill
ae320e0f3c Removed spurious prints and cleaned up XXX. 1998-08-12 23:53:23 +00:00
Joel Sherrill
9693fac4d7 Added more debug information. There are probably debug prints left in.
Fixed one important bug.  After wrapping the RX Descriptors all had the
EOL bit set which resulted in everything slowing down massively.
1998-08-12 23:10:38 +00:00
Joel Sherrill
4f38b71397 Fixed bug where the last link of the RDA was not initialized properly. 1998-08-12 16:28:17 +00:00
Joel Sherrill
7d07970eed Added SONIC_DEBUG_DESCRIPTORS and changed debug level. 1998-08-11 14:20:26 +00:00
Joel Sherrill
339737bad7 Survives 16-20 packets. Appears to be ok on TX buffer management.
Problem appears to be on the RX buffer initialization side.
1998-08-10 23:20:25 +00:00
Joel Sherrill
3fbd528781 Added prints 1998-08-10 22:23:33 +00:00
Joel Sherrill
7344fba988 Can now reply to multiple successive pings successfully without being in
promiscuous mode.

It still dies somewhere between 16 and 20 pings.
1998-08-10 21:45:01 +00:00
Joel Sherrill
c153a7bd9e replies to ping -- forced into prosmiscuous mode 1998-08-10 21:27:33 +00:00
Joel Sherrill
0c0419a1f1 Reordered some stuff. 1998-08-08 17:57:23 +00:00
Joel Sherrill
18c2320c6e changed version to 980808 1998-08-08 16:51:16 +00:00
Joel Sherrill
870284d103 Corrected spacing. 1998-08-08 16:37:43 +00:00
Joel Sherrill
301a2a3c0b Changed debug level.
Moved CAM Descriptor types to sonic.h.

CAM memory is now malloced to insure it shares the same upper address bits.

Removed increment of RX interrupt count on TX interrupt path.

Added SONIC_DEBUG_FRAGMENTS and SONIC_DEBUG_CAM conditionals.

Fixed bugs in fragment manipulation.  First bug was that the pad overwrote
the last fragment.  The second bug was that the link information overwrote
the size of the last fragment.

Rewrote initialization of TDA to simplify it.
1998-08-08 16:37:25 +00:00
Joel Sherrill
7e2187f4ad changed version to 9800808 1998-08-08 16:26:35 +00:00
Joel Sherrill
13451a384b Removed SonicRegisters structure since we now use register indices
and access routines.

Added revision constants.

Added in_use and EOL field values.
1998-08-06 19:01:03 +00:00
Joel Sherrill
e70a8f16b5 Enabled specific types of debug info.
Added pointer to RDA to sonic structure.

Added macro names for values used in the in_use field of RDA entries.

Rewrote the RX Descriptor Area initialization loop.

Added a check to barf if this is a Rev B sonic chip.

Enabled check that the CAM was properly loaded.
1998-08-06 19:01:02 +00:00
Joel Sherrill
e995f3a1ac Changed debug enable macros to support individually enabling different
types of debug information.

Removed call to rtems_panic which was based on checking a variable which
was no longer being set.
1998-08-06 15:27:08 +00:00
Joel Sherrill
c23118b036 Card Resource Register was a 16-bit register not a 32-bit one.
Used existing constants for bits on the register.
1998-08-06 15:05:59 +00:00
Joel Sherrill
308e18c397 Added support for the Card Resource Register. The new probe routines
check for the presence of the DUART, SCC, and RTC.  The SONIC check
needs to be added in the future as the network driver is libchip'ed.
1998-08-06 00:24:52 +00:00
Joel Sherrill
0eb85ae3e7 Commented out the code which yields the CPU when the serial controller is
busy.  This type of behavior perturbs the tests and many of them will
not pass.
1998-08-05 23:57:35 +00:00
Joel Sherrill
d4bf16c50f Added constants which made the multiple bit settings more readable
for the Data Configuration Register (DCR).
1998-08-05 23:56:48 +00:00
Joel Sherrill
dddc0557e5 DCR setting changed to match what the DY-4 Firmware initialized it to.
This primarily included setting the state of the programmable outputs
and the RX and TX FIFO depths.

Moved all of the TX, RX, and RRA data structure initialization to before
the hardware initialization.  As part of this, the hardware initialization
was consolidated.  More than likely, some of this movement broke stuff.

Used constants added to sonic.h which gave more logical names to some
of the register bit settings.

Switched to calloc to insure the data areas where initialized to 0.

Commented out a panic check in the RX server which may or may not have
been right.

Increased the size of the CAM initialization area.  It is possible
that this could be decreased or code added to handle the management
of multiple hardware addresses.

Added sonic read and write register routines which aid greatly in
debugging and provide the core for the eventual movement of this
driver to libchip.

Added debug code to the read and write register routines which can
print the value read from or written to a register.  This code also
prints the register name which significantly eases reading the log.
1998-08-05 23:56:13 +00:00
Joel Sherrill
bd8c8b2a85 Patch from Eric Valette <valette@crf.canon.fr> which brings the i386ex BSP
inline with the new IRQ structure.
1998-08-05 16:51:39 +00:00
Joel Sherrill
ab0df696d0 Automatic CPU type detection code from Eric Valette <valette@crf.canon.fr>.
Enabled on the pc386.
1998-08-05 15:15:46 +00:00
Joel Sherrill
50947110ec Fixed name of Buffer so this would compile. 1998-08-05 15:12:03 +00:00
Joel Sherrill
4d11a92f3e Redid Makefiles to properly do a preinstall. There was remnants of the
old way of setting th cpu family and model string names.
1998-08-05 15:11:33 +00:00
Joel Sherrill
b31fdf8d03 Added print of the order in which the directories are preinstalled. 1998-08-05 15:10:18 +00:00
Joel Sherrill
7fc5d54e27 Switched to read/write register routines and added some basic debug
help.
1998-08-03 21:01:21 +00:00
Joel Sherrill
92ef2252b8 Under allcoated task stacks. 1998-08-03 15:06:27 +00:00
Joel Sherrill
93e3b8a36e Moved to network demos 1998-08-01 15:01:59 +00:00
Joel Sherrill
8c6e195ae3 Patch from David Fiddes <D.J.Fiddes@hw.ac.uk> to make ASFLAGS include the
CPU_ASFLAGS.
1998-08-01 14:41:45 +00:00
Joel Sherrill
906577f4f6 Patch from David Fiddes <D.J.Fiddes@hw.ac.uk> to not use this file for
ColdFires.  It is just too wrong to fix.
1998-08-01 14:41:20 +00:00
Joel Sherrill
5ef4fae650 Merged patch from David Fiddes <D.J.Fiddes@hw.ac.uk> to add ColdFire
specific register macros and correct code in rtems.s.
1998-08-01 14:40:51 +00:00
Joel Sherrill
f177865318 Added Rod Barman (rodb@cs.ubc.ca) in credits for ColdFire. 1998-08-01 14:39:24 +00:00