- Add support to the BSP to enable irq-generic management
- Update the powerpc shared irq code to support irq-generic. This
is an opt in option for existing powerpc bsps. This change
should be simpler now
- Fix a number of issues in ISA IRQ controller handling by porting
fixes from the i386 (PC) BSP
Closes#4238Closes#4239
This allows an application to get the registers of the LPSPI. That is
usefull for applications that want to use DMA for a very specialized and
highly optimized communication.
Update #4180
Note: The changes have been done with portability in mind. The driver
should (in theory) be able to replace the original one in the MPC BSPs
too. For full compatibility an adaption layer and especially a test
would be necessary. Because both are missing, don't integrate it into
the MPC BSP now.
Update #4180
RTEMS OFW is a FDT only implementation of the OpenFirmWare
interface. This API is created to be compatible with FreeBSD
OpenFirmWare interface. The main intention is to make
porting of FreeBSD drivers to RTEMS easier.
Most functions implemented have an direct one-one mapping
with the original OFW API and some extra auxiliary functions
were implemented to make working with device trees easier in
RTEMS.
Update #3784
This BSP supports the Arm Fixed Virtual Platform. Only the Cortex-R52
processor configuration is supported by the BSP. It should be easy to
add support for other variants if needed.
Update #4202.
Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.
Set the VBAR to the normal vector table in start.S for the main
processor. Secondary processors set it in bsp_start_hook_0().
Update #4202.
Currently, zynq-uart code is always built and has some requirements for
BSPs that use it. Instead of making all BSPs satisfy that requirement or
working around it by setting defaults, this moves the zynq-uart code
into its own spec build object so it can be included if needed.
This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC
(ZynqMP) family of chips. It is configured to be usable on the Qemu
ZCU102 machine definition and should be almost trivially portable to
ZynqMP development boards and custom hardware. It is also configured to
be usable with libbsd.
The spintrcritical03-05 and psx12 tests are known to fail on Qemu when
the host system is heavily loaded. A single run of Qemu per core
during a testsuite run tends to yield positive results, but any
additional load on a system will result in test failures.
This patch also applies the correct expected test state for intermittent
failures so that those tests will still build.
The SUBALIGN(4) required on rtemsroset and rtemsrwset for ILP32 builds
was previously present on LP64 builds and causes no issues within RTEMS,
but causes relocation/alignment issues when building libbsd. This
restricts those alignment changes to ILP32 builds.
This fixes warnings like this:
warning: implicit declaration of function 'rtems_interrupt_disable'
warning: implicit declaration of function 'rtems_interrupt_enable'
warning: implicit declaration of function 'rtems_interrupt_flash'
This breaks AArch32-specific portions of the ARM GPT driver into their
own file so that the generic code can be moved for reuse by other
architectures.
