forked from Imagelibrary/rtems
arm: Move _CPU_ISR_install_vector()
The use of this function is optional. Newer BSPs do not use it.
This commit is contained in:
75
cpukit/score/cpu/arm/armv4-isr-install-vector.c
Normal file
75
cpukit/score/cpu/arm/armv4-isr-install-vector.c
Normal file
@@ -0,0 +1,75 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSScoreCPUARM
|
||||
*
|
||||
* @brief This source file contains the ARM-specific _CPU_ISR_install_vector().
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 2000 Canon Research Centre France SA.
|
||||
* Emmanuel Raguet, mailto:raguet@crf.canon.fr
|
||||
*
|
||||
* Copyright (c) 2002 Advent Networks, Inc
|
||||
* Jay Monkman <jmonkman@adventnetworks.com>
|
||||
*
|
||||
* Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include <rtems/score/cpu.h>
|
||||
|
||||
#ifdef ARM_MULTILIB_ARCH_V4
|
||||
|
||||
void _CPU_ISR_install_vector(
|
||||
uint32_t vector,
|
||||
CPU_ISR_handler new_handler,
|
||||
CPU_ISR_handler *old_handler
|
||||
)
|
||||
{
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Warray-bounds"
|
||||
/* Redirection table starts at the end of the vector table */
|
||||
CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
|
||||
|
||||
CPU_ISR_handler current_handler = table [vector];
|
||||
|
||||
/* The current handler is now the old one */
|
||||
if (old_handler != NULL) {
|
||||
*old_handler = current_handler;
|
||||
}
|
||||
|
||||
/* Write only if necessary to avoid writes to a maybe read-only memory */
|
||||
if (current_handler != new_handler) {
|
||||
table [vector] = new_handler;
|
||||
}
|
||||
#pragma GCC diagnostic pop
|
||||
}
|
||||
|
||||
#endif /* ARM_MULTILIB_ARCH_V4 */
|
||||
@@ -8,8 +8,7 @@
|
||||
* @brief This source file contains static assertions to ensure the consistency
|
||||
* of interfaces used in C and assembler and it contains the ARM-specific
|
||||
* implementation of _CPU_Initialize(), _CPU_ISR_Get_level(),
|
||||
* _CPU_ISR_Set_level(), _CPU_ISR_install_vector(),
|
||||
* _CPU_Context_Initialize(), and _CPU_Fatal_halt().
|
||||
* _CPU_ISR_Set_level(), _CPU_Context_Initialize(), and _CPU_Fatal_halt().
|
||||
*/
|
||||
|
||||
/*
|
||||
@@ -160,31 +159,6 @@ uint32_t _CPU_ISR_Get_level( void )
|
||||
return ( level & ARM_PSR_I ) != 0;
|
||||
}
|
||||
|
||||
void _CPU_ISR_install_vector(
|
||||
uint32_t vector,
|
||||
CPU_ISR_handler new_handler,
|
||||
CPU_ISR_handler *old_handler
|
||||
)
|
||||
{
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Warray-bounds"
|
||||
/* Redirection table starts at the end of the vector table */
|
||||
CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
|
||||
|
||||
CPU_ISR_handler current_handler = table [vector];
|
||||
|
||||
/* The current handler is now the old one */
|
||||
if (old_handler != NULL) {
|
||||
*old_handler = current_handler;
|
||||
}
|
||||
|
||||
/* Write only if necessary to avoid writes to a maybe read-only memory */
|
||||
if (current_handler != new_handler) {
|
||||
table [vector] = new_handler;
|
||||
}
|
||||
#pragma GCC diagnostic pop
|
||||
}
|
||||
|
||||
void _CPU_Initialize( void )
|
||||
{
|
||||
/* Do nothing */
|
||||
|
||||
@@ -41,6 +41,7 @@ source:
|
||||
- cpukit/score/cpu/arm/arm_exc_interrupt.S
|
||||
- cpukit/score/cpu/arm/armv4-exception-default.S
|
||||
- cpukit/score/cpu/arm/armv4-sync-synchronize.c
|
||||
- cpukit/score/cpu/arm/armv4-isr-install-vector.c
|
||||
- cpukit/score/cpu/arm/armv7-thread-idle.c
|
||||
- cpukit/score/cpu/arm/armv7m-context-initialize.c
|
||||
- cpukit/score/cpu/arm/armv7m-context-restore.c
|
||||
|
||||
Reference in New Issue
Block a user