forked from Imagelibrary/rtems
76 lines
2.5 KiB
C
76 lines
2.5 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSScoreCPUARM
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*
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* @brief This source file contains the ARM-specific _CPU_ISR_install_vector().
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*/
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/*
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* COPYRIGHT (c) 2000 Canon Research Centre France SA.
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* Emmanuel Raguet, mailto:raguet@crf.canon.fr
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*
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* Copyright (c) 2002 Advent Networks, Inc
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* Jay Monkman <jmonkman@adventnetworks.com>
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*
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* Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/score/cpu.h>
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#ifdef ARM_MULTILIB_ARCH_V4
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void _CPU_ISR_install_vector(
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uint32_t vector,
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CPU_ISR_handler new_handler,
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CPU_ISR_handler *old_handler
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)
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{
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Warray-bounds"
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/* Redirection table starts at the end of the vector table */
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CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
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CPU_ISR_handler current_handler = table [vector];
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/* The current handler is now the old one */
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if (old_handler != NULL) {
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*old_handler = current_handler;
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}
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/* Write only if necessary to avoid writes to a maybe read-only memory */
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if (current_handler != new_handler) {
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table [vector] = new_handler;
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}
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#pragma GCC diagnostic pop
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}
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#endif /* ARM_MULTILIB_ARCH_V4 */
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