forked from Imagelibrary/rtems
bsp/atsam: Improve SDRAM initialization.
According to the manual, MR has to be read back and a memory barrier has to be added after MR is written during SDRAM initialization.
This commit is contained in:
committed by
Sebastian Huber
parent
d00a7d1c22
commit
a5d49ebd37
@@ -203,6 +203,10 @@ void BOARD_ConfigureSdram(void)
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set Mode to 1 in the Mode Register and perform a write access to
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any SDRAM address.*/
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SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NOP;
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#ifdef __rtems__
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(void) SDRAMC->SDRAMC_MR;
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__DMB();
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#endif /* __rtems__ */
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*pSdram = 0;
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for (i = 0; i < 100000; i++);
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@@ -211,6 +215,10 @@ void BOARD_ConfigureSdram(void)
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The application must set Mode to 2 in the Mode Register and perform a write
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access to any SDRAM address. */
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SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_ALLBANKS_PRECHARGE;
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#ifdef __rtems__
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(void) SDRAMC->SDRAMC_MR;
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__DMB();
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#endif /* __rtems__ */
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*pSdram = 0;
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for (i = 0; i < 100000; i++);
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@@ -220,6 +228,10 @@ void BOARD_ConfigureSdram(void)
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SDRAM location eight times.*/
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for (i = 0; i < 8; i++) {
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SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_AUTO_REFRESH;
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#ifdef __rtems__
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(void) SDRAMC->SDRAMC_MR;
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__DMB();
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#endif /* __rtems__ */
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*pSdram = 0;
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}
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@@ -233,6 +245,10 @@ void BOARD_ConfigureSdram(void)
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4 banks) bank address, the SDRAM write access should be done at the address
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0x70000000.*/
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SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_LOAD_MODEREG;
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#ifdef __rtems__
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(void) SDRAMC->SDRAMC_MR;
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__DMB();
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#endif /* __rtems__ */
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*pSdram = 0;
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for (i = 0; i < 100000; i++);
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@@ -251,6 +267,10 @@ void BOARD_ConfigureSdram(void)
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/* 10. The application must go into Normal Mode, setting Mode to 0 in the
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Mode Register and performing a write access at any location in the SDRAM. */
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SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NORMAL;
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#ifdef __rtems__
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(void) SDRAMC->SDRAMC_MR;
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__DMB();
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#endif /* __rtems__ */
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*pSdram = 0;
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for (i = 0; i < 100000; i++);
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