bsp/atsam: Move clock and SDRAM init to SRAM.

If necessary, the BSP can now have it's clock and SDRAM initialization
in the SRAM instead of the SDRAM. This allows to change the clock
frequency during the startup of an SDRAM application.
This commit is contained in:
Christian Mauderer
2017-11-17 09:21:59 +01:00
committed by Sebastian Huber
parent 3fbaaa8b74
commit d00a7d1c22
9 changed files with 98 additions and 25 deletions

View File

@@ -22,8 +22,11 @@ Use ATSAM_MCK=XYZ to set the MCK frequency that should be used. The default case
evaluation kit. Some other configurations (e.g. 150MHz) would be too fast on
that board.
Your application can also overwrite the clock settings. To overwrite the clock
settings, define the following structures in your application:
Your application can also overwrite the clock settings. If you have a
bootloader with one setting in your internal flash and an application with
another setting in your external SDRAM, you should also use the
ATSAM_CHANGE_CLOCK_FROM_SRAM=1 option. To overwrite the clock settings, define
the following structures in your application:
--------
const struct atsam_clock_config atsam_clock_config = {

View File

@@ -68,6 +68,12 @@ RTEMS_BSPOPTS_HELP([ATSAM_MCK],
[Frequency of the MCK in Hz. Set to 0 to force application defined speed.
See startup/pmc-config.c for available clock configurations.])
RTEMS_BSPOPTS_SET([ATSAM_CHANGE_CLOCK_FROM_SRAM],[*],[0])
RTEMS_BSPOPTS_HELP([ATSAM_CHANGE_CLOCK_FROM_SRAM],
[Move the functions that set up the clock into the SRAM.
This allows to change the clock frequency even if the application is started from SDRAM.
Requires a TCM_SIZE > 0.])
RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_BAUD],[*],[115200])
RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_BAUD],[initial baud for console devices (default 115200)])

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@@ -23,6 +23,14 @@
extern "C" {
#endif /* __cplusplus */
#if ATSAM_CHANGE_CLOCK_FROM_SRAM != 0
/* Note: fast_text is the simplest section to put this code into. Other
* possibilities would include creating a new section. */
#define ATSAM_START_SRAM_SECTION BSP_FAST_TEXT_SECTION
#else
#define ATSAM_START_SRAM_SECTION
#endif
struct atsam_clock_config {
/* Initialization value for the PMC_PLLAR. */
uint32_t pllar_init;
@@ -32,6 +40,7 @@ struct atsam_clock_config {
uint32_t mck_freq;
};
ATSAM_START_SRAM_SECTION
extern const struct atsam_clock_config atsam_clock_config;
#define BOARD_MCK (atsam_clock_config.mck_freq)
@@ -43,6 +52,7 @@ struct BOARD_Sdram_Config {
uint32_t sdramc_cfr1;
};
ATSAM_START_SRAM_SECTION
extern const struct BOARD_Sdram_Config BOARD_Sdram_Config;
#ifdef __cplusplus

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@@ -41,7 +41,11 @@
* Exported functions
*----------------------------------------------------------------------------*/
#ifndef __rtems__
extern void BOARD_ConfigureSdram(void);
#else /* __rtems__ */
extern void BOARD_ConfigureSdram(void) ATSAM_START_SRAM_SECTION;
#endif /* __rtems__ */
extern uint32_t BOARD_SdramValidation(uint32_t baseAddr, uint32_t size);
#endif /* #ifndef BOARD_MEMORIES_H */

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@@ -78,7 +78,11 @@ extern "C" {
* \brief Setup the microcontroller system.
* Initialize the System and update the SystemFrequency variable.
*/
#ifndef __rtems__
void SystemInit(void)
#else /* __rtems__ */
void ATSAM_START_SRAM_SECTION SystemInit(void)
#endif /* __rtems__ */
{
uint32_t read_MOR;
/* Set FWS according to SYS_BOARD_MCKR configuration */

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@@ -29,6 +29,9 @@
#ifndef SYSTEM_SAME70_H_INCLUDED
#define SYSTEM_SAME70_H_INCLUDED
#ifdef __rtems__
#include <bsp/atsam-clock-config.h>
#endif /* __rtems__ */
/* @cond 0 */
/**INDENT-OFF**/
@@ -46,7 +49,11 @@ extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
#ifndef __rtems__
void SystemInit(void);
#else /* __rtems__ */
void ATSAM_START_SRAM_SECTION SystemInit(void);
#endif /* __rtems__ */
/**
* @brief Updates the SystemCoreClock with current core Clock

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@@ -29,6 +29,9 @@
#ifndef SYSTEM_SAMS70_H_INCLUDED
#define SYSTEM_SAMS70_H_INCLUDED
#ifdef __rtems__
#include <bsp/atsam-clock-config.h>
#endif /* __rtems__ */
/* @cond 0 */
/**INDENT-OFF**/
@@ -46,7 +49,11 @@ extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
#ifndef __rtems__
void SystemInit(void);
#else /* __rtems__ */
void ATSAM_START_SRAM_SECTION SystemInit(void);
#endif /* __rtems__ */
/**
* @brief Updates the SystemCoreClock with current core Clock

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@@ -29,6 +29,9 @@
#ifndef SYSTEM_SAMV71_H_INCLUDED
#define SYSTEM_SAMV71_H_INCLUDED
#ifdef __rtems__
#include <bsp/atsam-clock-config.h>
#endif /* __rtems__ */
/* @cond 0 */
/**INDENT-OFF**/
@@ -46,7 +49,11 @@ extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
#ifndef __rtems__
void SystemInit(void);
#else /* __rtems__ */
void ATSAM_START_SRAM_SECTION SystemInit(void);
#endif /* __rtems__ */
/**
* @brief Updates the SystemCoreClock with current core Clock

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@@ -70,33 +70,29 @@ static BSP_START_TEXT_SECTION bool tcm_setup_and_check_if_do_efc_config(
}
}
void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
static bool ATSAM_START_SRAM_SECTION sdram_settings_unchanged(void)
{
return (
(SDRAMC->SDRAMC_CR == BOARD_Sdram_Config.sdramc_cr) &&
(SDRAMC->SDRAMC_TR == BOARD_Sdram_Config.sdramc_tr) &&
(SDRAMC->SDRAMC_MDR == BOARD_Sdram_Config.sdramc_mdr) &&
(SDRAMC->SDRAMC_CFR1 == BOARD_Sdram_Config.sdramc_cfr1)
);
}
static void ATSAM_START_SRAM_SECTION setup_CPU_and_SDRAM(void)
{
SystemInit();
if (!PMC_IsPeriphEnabled(ID_SDRAMC) || !sdram_settings_unchanged()) {
BOARD_ConfigureSdram();
}
}
static void configure_tcm(void)
{
uintptr_t tcm_size;
uint32_t itcmcr_sz;
system_init_flash(BOARD_MCK);
SystemInit();
PIO_Configure(&atsam_pin_config[0], atsam_pin_config_count);
MATRIX->CCFG_SYSIO = atsam_matrix_ccfg_sysio;
if (!PMC_IsPeriphEnabled(ID_SDRAMC)) {
BOARD_ConfigureSdram();
}
if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) {
SCB_EnableICache();
}
if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
SCB_EnableDCache();
}
_SetupMemoryRegion();
/* Configure tightly coupled memory interfaces */
tcm_size = (uintptr_t) atsam_memory_itcm_size;
itcmcr_sz = (SCB->ITCMCR & SCB_ITCMCR_SZ_Msk) >> SCB_ITCMCR_SZ_Pos;
@@ -121,6 +117,35 @@ void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
}
}
void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
{
system_init_flash(BOARD_MCK);
PIO_Configure(&atsam_pin_config[0], atsam_pin_config_count);
MATRIX->CCFG_SYSIO = atsam_matrix_ccfg_sysio;
configure_tcm();
#if ATSAM_CHANGE_CLOCK_FROM_SRAM != 0
/* Early copy of .fast_text section for CPU and SDRAM setup. */
bsp_start_memcpy_libc(
bsp_section_fast_text_begin,
bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
#endif
setup_CPU_and_SDRAM();
if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) {
SCB_EnableICache();
}
if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
SCB_EnableDCache();
}
_SetupMemoryRegion();
}
void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
{
bsp_start_copy_sections_compact();