Add I2C driver framework

This I2C driver framework has some major differences compared to libi2c.

* It is compatible to the Linux I2C user-space API.

* It uses generic IMFS nodes and thus reduces the levels of indirection.

* The drivers don't have to mess around with minor numbers to get their
  state information.

* No arbitrary bus controller model is assumed.  The main task of an I2C
  bus controller driver is to process I2C messages.  How this is done is
  private to the driver.

* Scatter/gather operations are supported (I2C_M_NOSTART).

cpukit/dev/Makefile.am

@@ -1,12 +1,23 @@
 include $(top_srcdir)/automake/compile.am
+include $(top_srcdir)/automake/multilib.am
 
 include_devdir = $(includedir)/dev
 include_dev_HEADERS =
 
+include_dev_i2cdir = $(includedir)/dev/i2c
+include_dev_i2c_HEADERS =
+include_dev_i2c_HEADERS += include/dev/i2c/i2c.h
+
 include_linuxdir = $(includedir)/linux
 include_linux_HEADERS =
 include_linux_HEADERS += include/linux/i2c.h
 include_linux_HEADERS += include/linux/i2c-dev.h
 
+noinst_LIBRARIES = libdev.a
+
+libdev_a_SOURCES =
+libdev_a_SOURCES += i2c/i2c-bus.c
+libdev_a_SOURCES += i2c/i2c-dev.c
+
 include $(srcdir)/preinstall.am
 include $(top_srcdir)/automake/local.am

cpukit/dev/i2c/i2c-bus.c

@@ -0,0 +1,351 @@
+/**
+ * @file
+ *
+ * @brief Inter-Integrated Circuit (I2C) Bus Implementation
+ *
+ * @ingroup I2CBus
+ */
+
+/*
+ * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#if HAVE_CONFIG_H
+  #include "config.h"
+#endif
+
+#include <dev/i2c/i2c.h>
+
+#include <rtems/imfs.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+void i2c_bus_obtain(i2c_bus *bus)
+{
+  rtems_status_code sc;
+
+  sc = rtems_semaphore_obtain(bus->mutex, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
+  _Assert(sc == RTEMS_SUCCESSFUL);
+  (void) sc;
+}
+
+void i2c_bus_release(i2c_bus *bus)
+{
+  rtems_status_code sc;
+
+  sc = rtems_semaphore_release(bus->mutex);
+  _Assert(sc == RTEMS_SUCCESSFUL);
+  (void) sc;
+}
+
+int i2c_bus_transfer(i2c_bus *bus, i2c_msg *msgs, uint32_t msg_count)
+{
+  int err;
+  uint32_t i;
+  uint32_t j;
+
+  _Assert(msg_count > 0);
+
+  for (i = 0, j = 0; i < msg_count; ++i) {
+    if ((msgs[i].flags & I2C_M_NOSTART) != 0) {
+      if ((msgs[i].flags & I2C_M_RD) != (msgs[j].flags & I2C_M_RD)) {
+        return -EINVAL;
+      }
+
+      if (msgs[i].addr != msgs[j].addr) {
+        return -EINVAL;
+      }
+    } else {
+      j = i;
+    }
+  }
+
+  i2c_bus_obtain(bus);
+  err = (*bus->transfer)(bus, msgs, msg_count);
+  i2c_bus_release(bus);
+
+  return err;
+}
+
+static ssize_t i2c_bus_read(
+  rtems_libio_t *iop,
+  void *buffer,
+  size_t count
+)
+{
+  i2c_bus *bus = IMFS_generic_get_context_by_iop(iop);
+  i2c_msg msg = {
+    .addr = bus->default_address,
+    .flags = I2C_M_RD,
+    .len = (uint16_t) count,
+    .buf = buffer
+  };
+  int err;
+
+  if (bus->ten_bit_address) {
+    msg.flags |= I2C_M_TEN;
+  }
+
+  err = i2c_bus_transfer(bus, &msg, 1);
+  if (err == 0) {
+    return msg.len;
+  } else {
+    rtems_set_errno_and_return_minus_one(-err);
+  }
+}
+
+static ssize_t i2c_bus_write(
+  rtems_libio_t *iop,
+  const void *buffer,
+  size_t count
+)
+{
+  i2c_bus *bus = IMFS_generic_get_context_by_iop(iop);
+  i2c_msg msg = {
+    .addr = bus->default_address,
+    .flags = 0,
+    .len = (uint16_t) count,
+    .buf = RTEMS_DECONST(void *, buffer)
+  };
+  int err;
+
+  if (bus->ten_bit_address) {
+    msg.flags |= I2C_M_TEN;
+  }
+
+  err = i2c_bus_transfer(bus, &msg, 1);
+  if (err == 0) {
+    return msg.len;
+  } else {
+    rtems_set_errno_and_return_minus_one(-err);
+  }
+}
+
+static int i2c_bus_ioctl(
+  rtems_libio_t *iop,
+  ioctl_command_t command,
+  void *arg
+)
+{
+  i2c_bus *bus = IMFS_generic_get_context_by_iop(iop);
+  i2c_rdwr_ioctl_data *rdwr;
+  int err;
+
+  switch (command) {
+    case I2C_RDWR:
+      rdwr = arg;
+      if (rdwr->nmsgs > 0) {
+        err = i2c_bus_transfer(bus, rdwr->msgs, rdwr->nmsgs);
+      } else {
+        err = 0;
+      }
+      break;
+    case I2C_BUS_OBTAIN:
+      i2c_bus_obtain(bus);
+      err = 0;
+      break;
+    case I2C_BUS_RELEASE:
+      i2c_bus_release(bus);
+      err = 0;
+      break;
+    case I2C_BUS_GET_CONTROL:
+      *(i2c_bus **) arg = bus;
+      err = 0;
+      break;
+    case I2C_FUNCS:
+      *(unsigned long *) arg = bus->functionality;
+      err = 0;
+      break;
+    case I2C_RETRIES:
+      bus->retries = (unsigned long) arg;
+      err = 0;
+      break;
+    case I2C_TIMEOUT:
+      bus->timeout = RTEMS_MILLISECONDS_TO_TICKS(10 * (unsigned long) arg);
+      err = 0;
+      break;
+    case I2C_SLAVE:
+    case I2C_SLAVE_FORCE:
+      bus->default_address = (unsigned long) arg;
+      err = 0;
+      break;
+    case I2C_TENBIT:
+      bus->ten_bit_address = (unsigned long) arg != 0;
+      err = 0;
+      break;
+    case I2C_PEC:
+      bus->use_pec = (unsigned long) arg != 0;
+      err = 0;
+      break;
+    case I2C_BUS_SET_CLOCK:
+      i2c_bus_obtain(bus);
+      err = (*bus->set_clock)(bus, (unsigned long) arg);
+      i2c_bus_release(bus);
+      break;
+    default:
+      err = -ENOTTY;
+      break;
+  }
+
+  if (err == 0) {
+    return 0;
+  } else {
+    rtems_set_errno_and_return_minus_one(-err);
+  }
+}
+
+static const rtems_filesystem_file_handlers_r i2c_bus_handler = {
+  .open_h = rtems_filesystem_default_open,
+  .close_h = rtems_filesystem_default_close,
+  .read_h = i2c_bus_read,
+  .write_h = i2c_bus_write,
+  .ioctl_h = i2c_bus_ioctl,
+  .lseek_h = rtems_filesystem_default_lseek,
+  .fstat_h = IMFS_stat,
+  .ftruncate_h = rtems_filesystem_default_ftruncate,
+  .fsync_h = rtems_filesystem_default_fsync_or_fdatasync,
+  .fdatasync_h = rtems_filesystem_default_fsync_or_fdatasync,
+  .fcntl_h = rtems_filesystem_default_fcntl,
+  .kqfilter_h = rtems_filesystem_default_kqfilter,
+  .poll_h = rtems_filesystem_default_poll,
+  .readv_h = rtems_filesystem_default_readv,
+  .writev_h = rtems_filesystem_default_writev
+};
+
+static IMFS_jnode_t *i2c_bus_node_destroy(IMFS_jnode_t *node)
+{
+  i2c_bus *bus;
+
+  bus = IMFS_generic_get_context_by_node(node);
+  (*bus->destroy)(bus);
+
+  return node;
+}
+
+static const IMFS_node_control i2c_bus_node_control = {
+  .imfs_type = IMFS_GENERIC,
+  .handlers = &i2c_bus_handler,
+  .node_initialize = IMFS_node_initialize_generic,
+  .node_remove = IMFS_node_remove_default,
+  .node_destroy = i2c_bus_node_destroy
+};
+
+int i2c_bus_register(
+  i2c_bus *bus,
+  const char *bus_path
+)
+{
+  int rv;
+
+  rv = IMFS_make_generic_node(
+    bus_path,
+    S_IFCHR | S_IRWXU | S_IRWXG | S_IRWXO,
+    &i2c_bus_node_control,
+    bus
+  );
+  if (rv != 0) {
+    (*bus->destroy)(bus);
+  }
+
+  return rv;
+}
+
+static int i2c_bus_transfer_default(
+  i2c_bus *bus,
+  i2c_msg *msgs,
+  uint32_t msg_count
+)
+{
+  (void) bus;
+  (void) msgs;
+  (void) msg_count;
+
+  return -EIO;
+}
+
+static int i2c_bus_set_clock_default(i2c_bus *bus, unsigned long clock)
+{
+  (void) bus;
+  (void) clock;
+
+  return -EIO;
+}
+
+static int i2c_bus_do_init(
+  i2c_bus *bus,
+  void (*destroy)(i2c_bus *bus)
+)
+{
+  rtems_status_code sc;
+
+  sc = rtems_semaphore_create(
+    rtems_build_name('I', '2', 'C', ' '),
+    1,
+    RTEMS_BINARY_SEMAPHORE | RTEMS_INHERIT_PRIORITY | RTEMS_PRIORITY,
+    0,
+    &bus->mutex
+  );
+  if (sc != RTEMS_SUCCESSFUL) {
+    (*destroy)(bus);
+
+    rtems_set_errno_and_return_minus_one(ENOMEM);
+  }
+
+  bus->transfer = i2c_bus_transfer_default;
+  bus->set_clock = i2c_bus_set_clock_default;
+  bus->destroy = destroy;
+
+  return 0;
+}
+
+void i2c_bus_destroy(i2c_bus *bus)
+{
+  rtems_status_code sc;
+
+  sc = rtems_semaphore_delete(bus->mutex);
+  _Assert(sc == RTEMS_SUCCESSFUL);
+  (void) sc;
+}
+
+void i2c_bus_destroy_and_free(i2c_bus *bus)
+{
+  i2c_bus_destroy(bus);
+  free(bus);
+}
+
+int i2c_bus_init(i2c_bus *bus)
+{
+  memset(bus, 0, sizeof(*bus));
+
+  return i2c_bus_do_init(bus, i2c_bus_destroy);
+}
+
+i2c_bus *i2c_bus_alloc_and_init(size_t size)
+{
+  i2c_bus *bus = NULL;
+
+  if (size >= sizeof(*bus)) {
+    bus = calloc(1, size);
+    if (bus != NULL) {
+      int rv;
+
+      rv = i2c_bus_do_init(bus, i2c_bus_destroy_and_free);
+      if (rv != 0) {
+        return NULL;
+      }
+    }
+  }
+
+  return bus;
+}

cpukit/dev/i2c/i2c-dev.c

@@ -0,0 +1,291 @@
+/**
+ * @file
+ *
+ * @brief Inter-Integrated Circuit (I2C) Bus Implementation
+ *
+ * @ingroup I2CDevice
+ */
+
+/*
+ * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#if HAVE_CONFIG_H
+  #include "config.h"
+#endif
+
+#include <dev/i2c/i2c.h>
+
+#include <rtems/imfs.h>
+#include <rtems/score/assert.h>
+
+#include <fcntl.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+static ssize_t i2c_dev_read(
+  rtems_libio_t *iop,
+  void *buffer,
+  size_t count
+)
+{
+  i2c_dev *dev = IMFS_generic_get_context_by_iop(iop);
+  ssize_t n;
+
+  n = (*dev->read)(dev, buffer, count, iop->offset);
+  if (n > 0) {
+    iop->offset += n;
+  }
+
+  return n;
+}
+
+static ssize_t i2c_dev_write(
+  rtems_libio_t *iop,
+  const void *buffer,
+  size_t count
+)
+{
+  i2c_dev *dev = IMFS_generic_get_context_by_iop(iop);
+  ssize_t n;
+
+  n = (*dev->write)(dev, buffer, count, iop->offset);
+  if (n > 0) {
+    iop->offset += n;
+  }
+
+  return n;
+}
+
+static int i2c_dev_ioctl(
+  rtems_libio_t *iop,
+  ioctl_command_t command,
+  void *arg
+)
+{
+  i2c_dev *dev = IMFS_generic_get_context_by_iop(iop);
+  int err;
+
+  err = (*dev->ioctl)(dev, command, arg);
+
+  if (err == 0) {
+    return 0;
+  } else {
+    rtems_set_errno_and_return_minus_one(-err);
+  }
+}
+
+static int i2c_dev_fstat(
+  const rtems_filesystem_location_info_t *loc,
+  struct stat *buf
+)
+{
+  i2c_dev *dev = IMFS_generic_get_context_by_location(loc);
+
+  buf->st_size = (*dev->get_size)(dev);
+  buf->st_blksize = (*dev->get_block_size)(dev);
+
+  return IMFS_stat(loc, buf);
+}
+
+static const rtems_filesystem_file_handlers_r i2c_dev_handler = {
+  .open_h = rtems_filesystem_default_open,
+  .close_h = rtems_filesystem_default_close,
+  .read_h = i2c_dev_read,
+  .write_h = i2c_dev_write,
+  .ioctl_h = i2c_dev_ioctl,
+  .lseek_h = rtems_filesystem_default_lseek_file,
+  .fstat_h = i2c_dev_fstat,
+  .ftruncate_h = rtems_filesystem_default_ftruncate,
+  .fsync_h = rtems_filesystem_default_fsync_or_fdatasync,
+  .fdatasync_h = rtems_filesystem_default_fsync_or_fdatasync,
+  .fcntl_h = rtems_filesystem_default_fcntl,
+  .kqfilter_h = rtems_filesystem_default_kqfilter,
+  .poll_h = rtems_filesystem_default_poll,
+  .readv_h = rtems_filesystem_default_readv,
+  .writev_h = rtems_filesystem_default_writev
+};
+
+static IMFS_jnode_t *i2c_dev_node_destroy(IMFS_jnode_t *node)
+{
+  i2c_dev *dev;
+
+  dev = IMFS_generic_get_context_by_node(node);
+  (*dev->destroy)(dev);
+
+  return node;
+}
+
+static const IMFS_node_control i2c_dev_node_control = {
+  .imfs_type = IMFS_GENERIC,
+  .handlers = &i2c_dev_handler,
+  .node_initialize = IMFS_node_initialize_generic,
+  .node_remove = IMFS_node_remove_default,
+  .node_destroy = i2c_dev_node_destroy
+};
+
+int i2c_dev_register(
+  i2c_dev *dev,
+  const char *dev_path
+)
+{
+  int rv;
+
+  rv = IMFS_make_generic_node(
+    dev_path,
+    S_IFCHR | S_IRWXU | S_IRWXG | S_IRWXO,
+    &i2c_dev_node_control,
+    dev
+  );
+  if (rv != 0) {
+    (*dev->destroy)(dev);
+  }
+
+  return rv;
+}
+
+static ssize_t i2c_dev_read_default(
+  i2c_dev *dev,
+  void *buf,
+  size_t n,
+  off_t offset
+)
+{
+  (void) dev;
+  (void) buf;
+  (void) n;
+  (void) offset;
+
+  return -EIO;
+}
+
+static ssize_t i2c_dev_write_default(
+  i2c_dev *dev,
+  const void *buf,
+  size_t n,
+  off_t offset
+)
+{
+  (void) dev;
+  (void) buf;
+  (void) n;
+  (void) offset;
+
+  return -EIO;
+}
+
+static int i2c_dev_ioctl_default(
+  i2c_dev *dev,
+  ioctl_command_t command,
+  void *arg
+)
+{
+  (void) dev;
+  (void) command;
+  (void) arg;
+
+  return -ENOTTY;
+}
+
+static off_t i2c_dev_get_size_default(i2c_dev *dev)
+{
+  (void) dev;
+
+  return 0;
+}
+
+static blksize_t i2c_dev_get_block_size_default(i2c_dev *dev)
+{
+  (void) dev;
+
+  return 1;
+}
+
+static int i2c_dev_do_init(
+  i2c_dev *dev,
+  const char *bus_path,
+  uint16_t address,
+  void (*destroy)(i2c_dev *dev)
+)
+{
+  int fd;
+  int rv;
+
+  fd = open(bus_path, O_RDWR);
+  if (fd < 0) {
+    (*destroy)(dev);
+
+    return -1;
+  }
+
+  rv = ioctl(fd, I2C_BUS_GET_CONTROL, &dev->bus);
+  if (rv != 0) {
+    (*destroy)(dev);
+
+    return -1;
+  }
+
+  dev->read = i2c_dev_read_default;
+  dev->write = i2c_dev_write_default;
+  dev->ioctl = i2c_dev_ioctl_default;
+  dev->get_size = i2c_dev_get_size_default;
+  dev->get_block_size = i2c_dev_get_block_size_default;
+  dev->destroy = destroy;
+  dev->bus_fd = fd;
+  dev->address = address;
+
+  return 0;
+}
+
+void i2c_dev_destroy(i2c_dev *dev)
+{
+  int rv;
+
+  rv = close(dev->bus_fd);
+  _Assert(rv == 0);
+  (void) rv;
+}
+
+void i2c_dev_destroy_and_free(i2c_dev *dev)
+{
+  i2c_dev_destroy(dev);
+  free(dev);
+}
+
+int i2c_dev_init(i2c_dev *dev, const char *bus_path, uint16_t address)
+{
+  return i2c_dev_do_init(dev, bus_path, address, i2c_dev_destroy);
+}
+
+i2c_dev *i2c_dev_alloc_and_init(
+  size_t size,
+  const char *bus_path,
+  uint16_t address
+)
+{
+  i2c_dev *dev = NULL;
+
+  if (size >= sizeof(*dev)) {
+    dev = calloc(1, size);
+    if (dev != NULL) {
+      int rv;
+
+      rv = i2c_dev_do_init(dev, bus_path, address, i2c_dev_destroy_and_free);
+      if (rv != 0) {
+        return NULL;
+      }
+    }
+  }
+
+  return dev;
+}

cpukit/dev/include/dev/i2c/i2c.h

@@ -0,0 +1,430 @@
+/**
+ * @file
+ *
+ * @brief Inter-Integrated Circuit (I2C) Driver API
+ *
+ * @ingroup I2C
+ */
+
+/*
+ * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _DEV_I2C_I2C_H
+#define _DEV_I2C_I2C_H
+
+#include <linux/i2c.h>
+#include <linux/i2c-dev.h>
+
+#include <rtems.h>
+#include <rtems/seterr.h>
+
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef struct i2c_msg i2c_msg;
+
+typedef struct i2c_bus i2c_bus;
+
+typedef struct i2c_dev i2c_dev;
+
+typedef struct i2c_rdwr_ioctl_data i2c_rdwr_ioctl_data;
+
+/**
+ * @defgroup I2C Inter-Integrated Circuit (I2C) Driver
+ *
+ * @brief Inter-Integrated Circuit (I2C) bus and device driver support.
+ *
+ * @{
+ */
+
+/**
+ * @defgroup I2CBus I2C Bus Driver
+ *
+ * @ingroup I2C
+ *
+ * @{
+ */
+
+/**
+ * @name I2C IO Control Commands
+ *
+ * @{
+ */
+
+/**
+ * @brief Obtains the bus.
+ *
+ * This command has no argument.
+ */
+#define I2C_BUS_OBTAIN 0x800
+
+/**
+ * @brief Releases the bus.
+ *
+ * This command has no argument.
+ */
+#define I2C_BUS_RELEASE 0x801
+
+/**
+ * @brief Gets the bus control.
+ *
+ * The argument type is a pointer to i2c_bus pointer.
+ */
+#define I2C_BUS_GET_CONTROL 0x802
+
+/**
+ * @brief Sets the bus clock in Hz.
+ *
+ * The argument type is unsigned long.
+ */
+#define I2C_BUS_SET_CLOCK 0x803
+
+/** @} */
+
+/**
+ * @brief Default I2C bus clock in Hz.
+ */
+#define I2C_BUS_CLOCK_DEFAULT 100000
+
+/**
+ * @brief I2C bus control.
+ */
+struct i2c_bus {
+  /**
+   * @brief Transfers I2C messages.
+   *
+   * @param[in] bus The bus control.
+   * @param[in] msgs The messages to transfer.
+   * @param[in] msg_count The count of messages to transfer.  It must be
+   * positive.
+   *
+   * @retval 0 Successful operation.
+   * @retval negative Negative error number in case of an error.
+   */
+  int (*transfer)(i2c_bus *bus, i2c_msg *msgs, uint32_t msg_count);
+
+  /**
+   * @brief Sets the bus clock.
+   *
+   * @param[in] bus The bus control.
+   * @param[in] clock The desired bus clock in Hz.
+   *
+   * @retval 0 Successful operation.
+   * @retval negative Negative error number in case of an error.
+   */
+  int (*set_clock)(i2c_bus *bus, unsigned long clock);
+
+  /**
+   * @brief Destroys the bus.
+   *
+   * @param[in] bus The bus control.
+   */
+  void (*destroy)(i2c_bus *bus);
+
+  /**
+   * @brief Mutex to protect the bus access.
+   */
+  rtems_id mutex;
+
+  /**
+   * @brief Default slave device address.
+   */
+  uint16_t default_address;
+
+  /**
+   * @brief Use 10-bit addresses.
+   */
+  bool ten_bit_address;
+
+  /**
+   * @brief Use SMBus PEC.
+   */
+  bool use_pec;
+
+  /**
+   * @brief Transfer retry count.
+   */
+  unsigned long retries;
+
+  /**
+   * @brief Transaction timeout in ticks.
+   */
+  rtems_interval timeout;
+
+  /**
+   * @brief Controller functionality.
+   */
+  unsigned long functionality;
+};
+
+/**
+ * @brief Initializes a bus control.
+ *
+ * After a sucessful initialization the bus control must be destroyed via
+ * i2c_bus_destroy().  A registered bus control will be automatically destroyed
+ * in case the device file is unlinked.  Make sure to call i2c_bus_destroy() in
+ * a custom destruction handler.
+ *
+ * @param[in] bus The bus control.
+ *
+ * @retval 0 Successful operation.
+ * @retval -1 An error occurred.  The errno is set to indicate the error.
+ *
+ * @see i2c_bus_register()
+ */
+int i2c_bus_init(i2c_bus *bus);
+
+/**
+ * @brief Allocates a bus control from the heap and initializes it.
+ *
+ * After a sucessful allocation and initialization the bus control must be
+ * destroyed via i2c_bus_destroy_and_free().  A registered bus control will be
+ * automatically destroyed in case the device file is unlinked.  Make sure to
+ * call i2c_bus_destroy_and_free() in a custom destruction handler.
+ *
+ * @param[in] size The size of the bus control.  This enables the addition of
+ * bus controller specific data to the base bus control.  The bus control is
+ * zero initialized.
+ *
+ * @retval non-NULL The new bus control.
+ * @retval NULL An error occurred.  The errno is set to indicate the error.
+ *
+ * @see i2c_bus_register()
+ */
+i2c_bus *i2c_bus_alloc_and_init(size_t size);
+
+/**
+ * @brief Destroys a bus control.
+ *
+ * @param[in] bus The bus control.
+ */
+void i2c_bus_destroy(i2c_bus *bus);
+
+/**
+ * @brief Destroys a bus control and frees its memory.
+ *
+ * @param[in] bus The bus control.
+ */
+void i2c_bus_destroy_and_free(i2c_bus *bus);
+
+/**
+ * @brief Registers a bus control.
+ *
+ * This function claims ownership of the bus control regardless if the
+ * registration is successful or not.
+ *
+ * @param[in] bus The bus control.
+ * @param[in] bus_path The path to the bus device file.
+ *
+ * @retval 0 Successful operation.
+ * @retval -1 An error occurred.  The errno is set to indicate the error.
+ */
+int i2c_bus_register(
+  i2c_bus *bus,
+  const char *bus_path
+);
+
+/**
+ * @brief Obtains the bus.
+ *
+ * @param[in] bus The bus control.
+ */
+void i2c_bus_obtain(i2c_bus *bus);
+
+/**
+ * @brief Releases the bus.
+ *
+ * @param[in] bus The bus control.
+ */
+void i2c_bus_release(i2c_bus *bus);
+
+/**
+ * @brief Transfers I2C messages.
+ *
+ * The bus is obtained before the transfer and released afterwards.
+ *
+ * @param[in] bus The bus control.
+ * @param[in] msgs The messages to transfer.
+ * @param[in] msg_count The count of messages to transfer.  It must be
+ * positive.
+ *
+ * @retval 0 Successful operation.
+ * @retval negative Negative error number in case of an error.
+ */
+int i2c_bus_transfer(i2c_bus *bus, i2c_msg *msgs, uint32_t msg_count);
+
+/** @} */
+
+/**
+ * @defgroup I2CDevice I2C Device Driver
+ *
+ * @ingroup I2C
+ *
+ * @{
+ */
+
+/**
+ * @brief Base number for device IO control commands.
+ */
+#define I2C_DEV_IO_CONTROL 0x900
+
+/**
+ * @brief I2C slave device control.
+ */
+struct i2c_dev {
+  /**
+   * @brief Reads from the device.
+   *
+   * @retval non-negative Bytes transferred from device.
+   * @retval negative Negative error number in case of an error.
+   */
+  ssize_t (*read)(i2c_dev *dev, void *buf, size_t n, off_t offset);
+
+  /**
+   * @brief Writes to the device.
+   *
+   * @retval non-negative Bytes transferred to device.
+   * @retval negative Negative error number in case of an error.
+   */
+  ssize_t (*write)(i2c_dev *dev, const void *buf, size_t n, off_t offset);
+
+  /**
+   * @brief Device IO control.
+   *
+   * @retval 0 Successful operation.
+   * @retval negative Negative error number in case of an error.
+   */
+  int (*ioctl)(i2c_dev *dev, ioctl_command_t command, void *arg);
+
+  /**
+   * @brief Gets the file size.
+   */
+  off_t (*get_size)(i2c_dev *dev);
+
+  /**
+   * @brief Gets the file block size.
+   */
+  blksize_t (*get_block_size)(i2c_dev *dev);
+
+  /**
+   * @brief Destroys the device.
+   */
+  void (*destroy)(i2c_dev *dev);
+
+  /**
+   * @brief The bus control.
+   */
+  i2c_bus *bus;
+
+  /**
+   * @brief The device address.
+   */
+  uint16_t address;
+
+  /**
+   * @brief File descriptor of the bus.
+   *
+   * This prevents destruction of the bus since we hold a reference to it with
+   * this.
+   */
+  int bus_fd;
+};
+
+
+/**
+ * @brief Initializes a device control.
+ *
+ * After a sucessful initialization the device control must be destroyed via
+ * i2c_dev_destroy().  A registered device control will be automatically
+ * destroyed in case the device file is unlinked.  Make sure to call
+ * i2c_dev_destroy_and_free() in a custom destruction handler.
+ *
+ * @param[in] device The device control.
+ * @param[in] bus_path The path to the bus device file.
+ * @param[in] address The address of the device.
+ *
+ * @retval 0 Successful operation.
+ * @retval -1 An error occurred.  The errno is set to indicate the error.
+ *
+ * @see i2c_dev_register()
+ */
+int i2c_dev_init(i2c_dev *dev, const char *bus_path, uint16_t address);
+
+/**
+ * @brief Allocates a device control from the heap and initializes it.
+ *
+ * After a sucessful allocation and initialization the device control must be
+ * destroyed via i2c_dev_destroy_and_free().  A registered device control will
+ * be automatically destroyed in case the device file is unlinked.  Make sure
+ * to call i2c_dev_destroy_and_free() in a custom destruction handler.
+ *
+ * @param[in] size The size of the device control.  This enables the addition
+ * of device specific data to the base device control.  The device control is
+ * zero initialized.
+ * @param[in] bus_path The path to the bus device file.
+ * @param[in] address The address of the device.
+ *
+ * @retval non-NULL The new device control.
+ * @retval NULL An error occurred.  The errno is set to indicate the error.
+ *
+ * @see i2c_dev_register()
+ */
+i2c_dev *i2c_dev_alloc_and_init(
+  size_t size,
+  const char *bus_path,
+  uint16_t address
+);
+
+/**
+ * @brief Destroys a device control.
+ *
+ * @param[in] dev The device control.
+ */
+void i2c_dev_destroy(i2c_dev *dev);
+
+/**
+ * @brief Destroys a device control and frees its memory.
+ *
+ * @param[in] dev The device control.
+ */
+void i2c_dev_destroy_and_free(i2c_dev *dev);
+
+/**
+ * @brief Registers a device control.
+ *
+ * This function claims ownership of the device control regardless if the
+ * registration is successful or not.
+ *
+ * @param[in] dev The dev control.
+ * @param[in] dev_path The path to the device file of the device.
+ *
+ * @retval 0 Successful operation.
+ * @retval -1 An error occurred.  The errno is set to indicate the error.
+ */
+int i2c_dev_register(
+  i2c_dev *dev,
+  const char *dev_path
+);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* _DEV_I2C_I2C_H */

cpukit/dev/preinstall.am

@@ -18,6 +18,15 @@ $(PROJECT_INCLUDE)/dev/$(dirstamp):
 	@: > $(PROJECT_INCLUDE)/dev/$(dirstamp)
 PREINSTALL_DIRS += $(PROJECT_INCLUDE)/dev/$(dirstamp)
 
+$(PROJECT_INCLUDE)/dev/i2c/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)/dev/i2c
+	@: > $(PROJECT_INCLUDE)/dev/i2c/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/dev/i2c/$(dirstamp)
+
+$(PROJECT_INCLUDE)/dev/i2c/i2c.h: include/dev/i2c/i2c.h $(PROJECT_INCLUDE)/dev/i2c/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/dev/i2c/i2c.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/dev/i2c/i2c.h
+
 $(PROJECT_INCLUDE)/linux/$(dirstamp):
 	@$(MKDIR_P) $(PROJECT_INCLUDE)/linux
 	@: > $(PROJECT_INCLUDE)/linux/$(dirstamp)

cpukit/wrapup/Makefile.am

@@ -8,6 +8,7 @@ project_lib_LIBRARIES = librtemscpu.a
 librtemscpu_a_SOURCES =
 
 TMP_LIBS =
+TMP_LIBS += ../dev/libdev.a
 TMP_LIBS += ../score/cpu/@RTEMS_CPU@/libscorecpu.a
 TMP_LIBS += ../score/libscore.a
 TMP_LIBS += ../sapi/libsapi.a

testsuites/libtests/Makefile.am

@@ -1,6 +1,7 @@
 ACLOCAL_AMFLAGS = -I ../aclocal
 
 _SUBDIRS = POSIX
+_SUBDIRS += i2c01
 _SUBDIRS += newlib01
 _SUBDIRS += block17
 _SUBDIRS += exit02

testsuites/libtests/configure.ac

@@ -66,6 +66,7 @@ AS_IF([test x"$HAVE_LIBDL" = x"yes"],[
 
 # Explicitly list all Makefiles here
 AC_CONFIG_FILES([Makefile
+i2c01/Makefile
 newlib01/Makefile
 block17/Makefile
 exit02/Makefile

testsuites/libtests/i2c01/Makefile.am

@@ -0,0 +1,19 @@
+rtems_tests_PROGRAMS = i2c01
+i2c01_SOURCES = init.c
+
+dist_rtems_tests_DATA = i2c01.scn i2c01.doc
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../automake/compile.am
+include $(top_srcdir)/../automake/leaf.am
+
+AM_CPPFLAGS += -I$(top_srcdir)/../support/include
+
+LINK_OBJS = $(i2c01_OBJECTS)
+LINK_LIBS = $(i2c01_LDLIBS)
+
+i2c01$(EXEEXT): $(i2c01_OBJECTS) $(i2c01_DEPENDENCIES)
+	@rm -f i2c01$(EXEEXT)
+	$(make-exe)
+
+include $(top_srcdir)/../automake/local.am

testsuites/libtests/i2c01/i2c01.doc

@@ -0,0 +1,11 @@
+This file describes the directives and concepts tested by this test set.
+
+test set name: i2c01
+
+directives:
+
+  TBD
+
+concepts:
+
+  - Ensure that the I2C driver framework works.

testsuites/libtests/i2c01/i2c01.scn

@@ -0,0 +1,2 @@
+*** BEGIN OF TEST I2C 1 ***
+*** END OF TEST I2C 1 ***

testsuites/libtests/i2c01/init.c

@@ -0,0 +1,286 @@
+/*
+ * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+  #include "config.h"
+#endif
+
+#include <dev/i2c/i2c.h>
+
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include <rtems/libcsupport.h>
+
+#include "tmacros.h"
+
+const char rtems_test_name[] = "I2C 1";
+
+#define SPARE_ADDRESS_BITS 3
+
+#define DEVICE_SIMPLE_READ_WRITE (0UL << SPARE_ADDRESS_BITS)
+
+typedef struct test_device test_device;
+
+struct test_device {
+  int (*transfer)(
+    i2c_bus *bus,
+    i2c_msg *msgs,
+    uint32_t msg_count,
+    test_device *dev
+  );
+};
+
+typedef struct {
+  test_device base;
+  char buf[3];
+} test_device_simple_read_write;
+
+typedef struct {
+  i2c_bus base;
+  unsigned long clock;
+  test_device *devices[1];
+  test_device_simple_read_write simple_read_write;
+} test_bus;
+
+static const char bus_path[] = "/dev/i2c-0";
+
+static int test_simple_read_write_transfer(
+  i2c_bus *bus,
+  i2c_msg *msgs,
+  uint32_t msg_count,
+  test_device *base
+)
+{
+  test_device_simple_read_write *dev = (test_device_simple_read_write *) base;
+
+  if (msg_count == 1 && msgs[0].len == sizeof(dev->buf)) {
+    if ((msgs[0].flags & I2C_M_RD) != 0) {
+      memcpy(msgs[0].buf, &dev->buf[0], sizeof(dev->buf));
+    } else {
+      memcpy(&dev->buf[0], msgs[0].buf, sizeof(dev->buf));
+    }
+
+    return 0;
+  } else {
+    return -EIO;
+  }
+}
+
+static int test_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count)
+{
+  test_bus *bus = (test_bus *) base;
+  uint16_t addr;
+  test_device *dev;
+
+  addr = msgs[0].addr >> SPARE_ADDRESS_BITS;
+  if (addr >= RTEMS_ARRAY_SIZE(bus->devices)) {
+    return -EIO;
+  }
+
+  dev = bus->devices[addr];
+
+  return (*dev->transfer)(&bus->base, msgs, msg_count, dev);
+}
+
+static int test_set_clock(i2c_bus *base, unsigned long clock)
+{
+  test_bus *bus = (test_bus *) base;
+
+  bus->clock = clock;
+
+  return 0;
+}
+
+static void test_destroy(i2c_bus *base)
+{
+  i2c_bus_destroy_and_free(base);
+}
+
+static void test_simple_read_write(test_bus *bus, int fd)
+{
+  static const char zero[] = { 0, 0, 0 };
+  static const char abc[] = { 'a', 'b', 'c' };
+
+  int rv;
+  char buf[3];
+  ssize_t n;
+
+  rv = ioctl(fd, I2C_SLAVE, DEVICE_SIMPLE_READ_WRITE);
+  rtems_test_assert(rv == 0);
+
+  errno = 0;
+  rv = ioctl(fd, 0xb00b);
+  rtems_test_assert(rv == -1);
+  rtems_test_assert(errno == ENOTTY);
+
+  errno = 0;
+  n = write(fd, &buf[0], 1000);
+  rtems_test_assert(n == -1);
+  rtems_test_assert(errno == EIO);
+
+  errno = 0;
+  n = read(fd, &buf[0], 1000);
+  rtems_test_assert(n == -1);
+  rtems_test_assert(errno == EIO);
+
+  rtems_test_assert(
+    memcmp(&bus->simple_read_write.buf[0], &zero[0], sizeof(buf)) == 0
+  );
+
+  n = write(fd, &abc[0], sizeof(buf));
+  rtems_test_assert(n == (ssize_t) sizeof(buf));
+
+  rtems_test_assert(
+    memcmp(&bus->simple_read_write.buf[0], &abc[0], sizeof(buf)) == 0
+  );
+
+  n = read(fd, &buf[0], sizeof(buf));
+  rtems_test_assert(n == (ssize_t) sizeof(buf));
+
+  rtems_test_assert(memcmp(&buf[0], &abc[0], sizeof(buf)) == 0);
+}
+
+static void test(void)
+{
+  rtems_resource_snapshot snapshot;
+  test_bus *bus;
+  int rv;
+  int fd;
+
+  rtems_resource_snapshot_take(&snapshot);
+
+  bus = (test_bus *) i2c_bus_alloc_and_init(sizeof(*bus));
+  rtems_test_assert(bus != NULL);
+
+  bus->base.transfer = test_transfer;
+  bus->base.set_clock = test_set_clock;
+  bus->base.destroy = test_destroy;
+  bus->base.functionality = I2C_FUNC_I2C | I2C_FUNC_PROTOCOL_MANGLING
+    | I2C_FUNC_NOSTART;
+
+  bus->simple_read_write.base.transfer = test_simple_read_write_transfer;
+  bus->devices[0] = &bus->simple_read_write.base;
+
+  rv = i2c_bus_register(&bus->base, &bus_path[0]);
+  rtems_test_assert(rv == 0);
+
+  fd = open(&bus_path[0], O_RDWR);
+  rtems_test_assert(fd >= 0);
+
+  rtems_test_assert(bus->clock == 0);
+  rv = ioctl(fd, I2C_BUS_SET_CLOCK, 0xdeadbeefUL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->clock == 0xdeadbeef);
+
+  rv = ioctl(fd, I2C_BUS_OBTAIN);
+  rtems_test_assert(rv == 0);
+
+  rv = ioctl(fd, I2C_BUS_RELEASE);
+  rtems_test_assert(rv == 0);
+
+  rtems_test_assert(!bus->base.ten_bit_address);
+
+  rv = ioctl(fd, I2C_TENBIT, 1UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.ten_bit_address);
+
+  rv = ioctl(fd, I2C_TENBIT, 0UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(!bus->base.ten_bit_address);
+
+  rtems_test_assert(!bus->base.use_pec);
+
+  rv = ioctl(fd, I2C_PEC, 1UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.use_pec);
+
+  rv = ioctl(fd, I2C_PEC, 0UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(!bus->base.use_pec);
+
+  rv = ioctl(fd, I2C_SLAVE, 123UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.default_address == 123);
+
+  rv = ioctl(fd, I2C_SLAVE_FORCE, 456UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.default_address == 456);
+
+  rtems_test_assert(bus->base.retries == 0);
+
+  rv = ioctl(fd, I2C_RETRIES, 1UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.retries == 1);
+
+  rv = ioctl(fd, I2C_RETRIES, 0UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.retries == 0);
+
+  rtems_test_assert(bus->base.timeout == 0);
+
+  rv = ioctl(fd, I2C_TIMEOUT, 1UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.timeout == 5);
+
+  rv = ioctl(fd, I2C_TIMEOUT, 0UL);
+  rtems_test_assert(rv == 0);
+  rtems_test_assert(bus->base.timeout == 0);
+
+  test_simple_read_write(bus, fd);
+
+  rv = close(fd);
+  rtems_test_assert(rv == 0);
+
+  rv = unlink(&bus_path[0]);
+  rtems_test_assert(rv == 0);
+
+  rtems_test_assert(rtems_resource_snapshot_check(&snapshot));
+}
+
+static void Init(rtems_task_argument arg)
+{
+  TEST_BEGIN();
+
+  test();
+
+  TEST_END();
+  rtems_test_exit(0);
+}
+
+#define CONFIGURE_MICROSECONDS_PER_TICK 2000
+
+#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
+#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
+
+#define CONFIGURE_USE_IMFS_AS_BASE_FILESYSTEM
+
+#define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 7
+
+#define CONFIGURE_MAXIMUM_TASKS 1
+
+#define CONFIGURE_MAXIMUM_SEMAPHORES 1
+
+#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
+
+#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
+
+#define CONFIGURE_INIT
+
+#include <rtems/confdefs.h>