forked from Imagelibrary/rtems
41c5f1b779
This I2C driver framework has some major differences compared to libi2c. * It is compatible to the Linux I2C user-space API. * It uses generic IMFS nodes and thus reduces the levels of indirection. * The drivers don't have to mess around with minor numbers to get their state information. * No arbitrary bus controller model is assumed. The main task of an I2C bus controller driver is to process I2C messages. How this is done is private to the driver. * Scatter/gather operations are supported (I2C_M_NOSTART).
287 lines
6.3 KiB
C
287 lines
6.3 KiB
C
/*
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* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <dev/i2c/i2c.h>
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#include <sys/ioctl.h>
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#include <sys/stat.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <rtems/libcsupport.h>
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#include "tmacros.h"
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const char rtems_test_name[] = "I2C 1";
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#define SPARE_ADDRESS_BITS 3
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#define DEVICE_SIMPLE_READ_WRITE (0UL << SPARE_ADDRESS_BITS)
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typedef struct test_device test_device;
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struct test_device {
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int (*transfer)(
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i2c_bus *bus,
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i2c_msg *msgs,
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uint32_t msg_count,
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test_device *dev
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);
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};
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typedef struct {
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test_device base;
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char buf[3];
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} test_device_simple_read_write;
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typedef struct {
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i2c_bus base;
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unsigned long clock;
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test_device *devices[1];
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test_device_simple_read_write simple_read_write;
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} test_bus;
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static const char bus_path[] = "/dev/i2c-0";
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static int test_simple_read_write_transfer(
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i2c_bus *bus,
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i2c_msg *msgs,
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uint32_t msg_count,
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test_device *base
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)
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{
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test_device_simple_read_write *dev = (test_device_simple_read_write *) base;
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if (msg_count == 1 && msgs[0].len == sizeof(dev->buf)) {
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if ((msgs[0].flags & I2C_M_RD) != 0) {
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memcpy(msgs[0].buf, &dev->buf[0], sizeof(dev->buf));
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} else {
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memcpy(&dev->buf[0], msgs[0].buf, sizeof(dev->buf));
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}
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return 0;
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} else {
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return -EIO;
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}
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}
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static int test_transfer(i2c_bus *base, i2c_msg *msgs, uint32_t msg_count)
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{
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test_bus *bus = (test_bus *) base;
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uint16_t addr;
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test_device *dev;
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addr = msgs[0].addr >> SPARE_ADDRESS_BITS;
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if (addr >= RTEMS_ARRAY_SIZE(bus->devices)) {
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return -EIO;
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}
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dev = bus->devices[addr];
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return (*dev->transfer)(&bus->base, msgs, msg_count, dev);
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}
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static int test_set_clock(i2c_bus *base, unsigned long clock)
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{
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test_bus *bus = (test_bus *) base;
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bus->clock = clock;
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return 0;
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}
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static void test_destroy(i2c_bus *base)
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{
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i2c_bus_destroy_and_free(base);
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}
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static void test_simple_read_write(test_bus *bus, int fd)
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{
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static const char zero[] = { 0, 0, 0 };
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static const char abc[] = { 'a', 'b', 'c' };
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int rv;
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char buf[3];
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ssize_t n;
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rv = ioctl(fd, I2C_SLAVE, DEVICE_SIMPLE_READ_WRITE);
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rtems_test_assert(rv == 0);
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errno = 0;
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rv = ioctl(fd, 0xb00b);
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rtems_test_assert(rv == -1);
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rtems_test_assert(errno == ENOTTY);
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errno = 0;
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n = write(fd, &buf[0], 1000);
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rtems_test_assert(n == -1);
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rtems_test_assert(errno == EIO);
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errno = 0;
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n = read(fd, &buf[0], 1000);
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rtems_test_assert(n == -1);
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rtems_test_assert(errno == EIO);
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rtems_test_assert(
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memcmp(&bus->simple_read_write.buf[0], &zero[0], sizeof(buf)) == 0
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);
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n = write(fd, &abc[0], sizeof(buf));
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rtems_test_assert(n == (ssize_t) sizeof(buf));
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rtems_test_assert(
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memcmp(&bus->simple_read_write.buf[0], &abc[0], sizeof(buf)) == 0
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);
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n = read(fd, &buf[0], sizeof(buf));
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rtems_test_assert(n == (ssize_t) sizeof(buf));
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rtems_test_assert(memcmp(&buf[0], &abc[0], sizeof(buf)) == 0);
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}
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static void test(void)
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{
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rtems_resource_snapshot snapshot;
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test_bus *bus;
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int rv;
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int fd;
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rtems_resource_snapshot_take(&snapshot);
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bus = (test_bus *) i2c_bus_alloc_and_init(sizeof(*bus));
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rtems_test_assert(bus != NULL);
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bus->base.transfer = test_transfer;
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bus->base.set_clock = test_set_clock;
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bus->base.destroy = test_destroy;
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bus->base.functionality = I2C_FUNC_I2C | I2C_FUNC_PROTOCOL_MANGLING
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| I2C_FUNC_NOSTART;
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bus->simple_read_write.base.transfer = test_simple_read_write_transfer;
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bus->devices[0] = &bus->simple_read_write.base;
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rv = i2c_bus_register(&bus->base, &bus_path[0]);
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rtems_test_assert(rv == 0);
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fd = open(&bus_path[0], O_RDWR);
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rtems_test_assert(fd >= 0);
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rtems_test_assert(bus->clock == 0);
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rv = ioctl(fd, I2C_BUS_SET_CLOCK, 0xdeadbeefUL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->clock == 0xdeadbeef);
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rv = ioctl(fd, I2C_BUS_OBTAIN);
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rtems_test_assert(rv == 0);
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rv = ioctl(fd, I2C_BUS_RELEASE);
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rtems_test_assert(rv == 0);
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rtems_test_assert(!bus->base.ten_bit_address);
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rv = ioctl(fd, I2C_TENBIT, 1UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.ten_bit_address);
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rv = ioctl(fd, I2C_TENBIT, 0UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(!bus->base.ten_bit_address);
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rtems_test_assert(!bus->base.use_pec);
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rv = ioctl(fd, I2C_PEC, 1UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.use_pec);
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rv = ioctl(fd, I2C_PEC, 0UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(!bus->base.use_pec);
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rv = ioctl(fd, I2C_SLAVE, 123UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.default_address == 123);
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rv = ioctl(fd, I2C_SLAVE_FORCE, 456UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.default_address == 456);
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rtems_test_assert(bus->base.retries == 0);
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rv = ioctl(fd, I2C_RETRIES, 1UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.retries == 1);
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rv = ioctl(fd, I2C_RETRIES, 0UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.retries == 0);
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rtems_test_assert(bus->base.timeout == 0);
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rv = ioctl(fd, I2C_TIMEOUT, 1UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.timeout == 5);
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rv = ioctl(fd, I2C_TIMEOUT, 0UL);
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rtems_test_assert(rv == 0);
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rtems_test_assert(bus->base.timeout == 0);
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test_simple_read_write(bus, fd);
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rv = close(fd);
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rtems_test_assert(rv == 0);
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rv = unlink(&bus_path[0]);
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rtems_test_assert(rv == 0);
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rtems_test_assert(rtems_resource_snapshot_check(&snapshot));
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}
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static void Init(rtems_task_argument arg)
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{
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TEST_BEGIN();
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test();
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TEST_END();
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rtems_test_exit(0);
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}
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#define CONFIGURE_MICROSECONDS_PER_TICK 2000
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#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
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#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
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#define CONFIGURE_USE_IMFS_AS_BASE_FILESYSTEM
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#define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 7
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#define CONFIGURE_MAXIMUM_TASKS 1
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#define CONFIGURE_MAXIMUM_SEMAPHORES 1
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#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
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#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
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#define CONFIGURE_INIT
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#include <rtems/confdefs.h>
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