forked from Imagelibrary/rtems
bsps/arm: Fix L2C-310 instruction enabled/disable
Set/clear SCTLR[I] on all online processors. Do not enable/disable the L2C-310 cache in the instruction cache enable/disable since it is a unified cache.
This commit is contained in:
committed by
Amar Takhar
parent
ef9b49dc24
commit
3a281aca37
12
bsps/arm/shared/cache/cache-cp15.h
vendored
12
bsps/arm/shared/cache/cache-cp15.h
vendored
@@ -369,18 +369,6 @@ static inline void arm_cache_l1_disable_data( void )
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arm_cp15_set_control( arm_cp15_get_control() & ~ARM_CP15_CTRL_C );
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}
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static inline void arm_cache_l1_disable_instruction( void )
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{
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/* Synchronize the processor */
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_ARM_Data_synchronization_barrier();
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/* Invalidate the Instruction cache */
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arm_cache_l1_invalidate_entire_instruction();
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/* Disable the Instruction cache */
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arm_cp15_set_control( arm_cp15_get_control() & ~ARM_CP15_CTRL_I );
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}
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static inline size_t arm_cache_l1_get_data_cache_size( void )
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{
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size_t size;
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50
bsps/arm/shared/cache/cache-l2c-310.c
vendored
50
bsps/arm/shared/cache/cache-l2c-310.c
vendored
@@ -56,7 +56,8 @@
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#include <bsp.h>
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#include <bsp/fatal.h>
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#include <libcpu/arm-cp15.h>
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#include <rtems/rtems/intr.h>
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#include <rtems.h>
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#include <rtems/score/smpimpl.h>
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#include <bsp/arm-release-id.h>
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#include <bsp/arm-errata.h>
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@@ -1185,17 +1186,58 @@ _CPU_cache_disable_data( void )
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l2c_310_disable();
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}
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static void l2c_310_enable_instruction( void *arg )
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{
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rtems_interrupt_level level;
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(void) arg;
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rtems_interrupt_local_disable(level);
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arm_cp15_set_control( arm_cp15_get_control() | ARM_CP15_CTRL_I );
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rtems_interrupt_local_enable(level);
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}
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static inline void
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_CPU_cache_enable_instruction( void )
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{
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l2c_310_enable();
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#ifdef RTEMS_SMP
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rtems_interrupt_level level;
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rtems_interrupt_local_disable( level );
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_SMP_Broadcast_action( l2c_310_enable_instruction, NULL );
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rtems_interrupt_local_enable( level );
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#else
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l2c_310_enable_instruction( NULL );
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#endif
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}
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static void l2c_310_disable_instruction( void *arg )
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{
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rtems_interrupt_level level;
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(void) arg;
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rtems_interrupt_local_disable(level);
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arm_cp15_set_control( arm_cp15_get_control() & ~ARM_CP15_CTRL_I );
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rtems_interrupt_local_enable(level);
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arm_cache_l1_invalidate_entire_instruction();
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}
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static inline void
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_CPU_cache_disable_instruction( void )
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{
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arm_cache_l1_disable_instruction();
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l2c_310_disable();
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l2c_310_flush_entire();
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#ifdef RTEMS_SMP
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rtems_interrupt_level level;
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rtems_interrupt_local_disable( level );
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_SMP_Broadcast_action( l2c_310_disable_instruction, NULL );
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rtems_interrupt_local_enable( level );
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#else
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l2c_310_disable_instruction( NULL );
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#endif
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}
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static inline void
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