Correct a commit 7d64c587c1 ("Add support for the MIPS eXtended
Physical Address (XPA) ASE.") bug, causing XPA base and Virtualization
ASE instructions to be wrongly always enabled with the selection of the
MIPS32r2 or higher ISA.
For example this source assembles successfully as shown below:
$ cat xpa.s
mfhc0 $2, $1
$ as -32 -mips32 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32 (mips32) `mfhc0 $2,$1'
$ as -32 -mips32r2 -o xpa.o xpa.s
$ objdump -d xpa.o
xpa.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: 40420800 mfhc0 v0,c0_random
...
$
To address this issue remove the I33 (INSN_ISA32R2) marking from all XPA
instructions in the opcode table. Additionally, for XPA Virtualization
ASE instructions implement an XPAVZ (ASE_XPA_VIRT) combination ASE flag
and use it in place of IVIRT|XPA (ASE_VIRT|ASE_XPA).
Now the same source is correctly rejected unless the `-mxpa' option is
also used:
$ as -32 -mips32r2 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32r2 (mips32r2) `mfhc0 $2,$1'
$ as -32 -mips32r2 -mxpa -o xpa.o xpa.s
$
Add test cases for XPA base and XPA Virtualization ASE instructions.
Parts of this change by Andrew Bennett.
include/
* opcode/mips.h (ASE_XPA_VIRT): New macro.
opcodes/
* mips-dis.c (mips_calculate_combination_ases): Handle the
ASE_XPA_VIRT flag.
(parse_mips_ase_option): New function.
(parse_mips_dis_option): Factor out ASE option handling to the
new function. Call `mips_calculate_combination_ases'.
* mips-opc.c (XPAVZ): New macro.
(mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0",
"mfhgc0", "mthc0" and "mthgc0".
gas/
* config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag.
* testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump'
flags. Add `-mvirt' to `as' flags.
* testsuite/gas/mips/xpa-err.d: New test.
* testsuite/gas/mips/xpa-virt-err.d: New test.
* testsuite/gas/mips/xpa-err.l: New stderr output.
* testsuite/gas/mips/xpa-virt-err.l: New stderr output.
* testsuite/gas/mips/xpa-err.s: New test source.
* testsuite/gas/mips/xpa-virt-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
binutils/
* testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test.
* testsuite/binutils-all/mips/mips-xpa-virt.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
Revert parts of commit fee24f1c5b ("objdump improvements for mips
elf64"), <https://sourceware.org/ml/binutils/2003-03/msg00108.html>, and
make the `->reloc_count' member of `struct bfd_section' hold the actual
number of internal relocations stored in its `->relocation' vector. To
do so adjust `mips_elf64_slurp_one_reloc_table' to set `->reloc_count'
to the actual number of internal relocations retrieved and discard
`mips_elf64_canonicalize_reloc', `mips_elf64_canonicalize_dynamic_reloc'
and their corresponding target macros. Contrary to the description of
`mips_elf64_slurp_one_reloc_table', adjusted appropriately, this makes
generic relocation processing code happy and satisfies the "merge notes
section" binutils test case.
Add extra binutils test cases to expand the coverage of the generic
"merge notes section" test case, now passing with the n64 ABI, across
the MIPS o32, n32 and n64 ABIs regardless of the default ABI selected in
target configuration, and also to verify correctness of the relocations
produced. Conversely, do not provide any additional test cases for the
original issue addressed with the commit referred:
- objdump would display only 1/3 of the total number of relocations,
because it used the external relocation count, but each external
relocation is brought in as 3 internal relocations.
as n64 ABI relocation processing with `objdump -r' and `objdump -R' is
already widely covered across the GAS and LD test suites.
bfd/
* elf64-mips.c (mips_elf64_canonicalize_reloc): Remove prototype
and function.
(mips_elf64_canonicalize_dynamic_reloc): Likewise.
(mips_elf64_slurp_one_reloc_table): Set `reloc_count' to the
actual number of internal relocations retrieved. Adjust
function description.
(bfd_elf64_canonicalize_reloc): Remove macro.
(bfd_elf64_canonicalize_dynamic_reloc): Likewise.
binutils/
* testsuite/binutils-all/mips/mips-note-2.d: New test.
* testsuite/binutils-all/mips/mips-note-2r.d: New test.
* testsuite/binutils-all/mips/mips-note-2-n32.d: New test.
* testsuite/binutils-all/mips/mips-note-2-n64.d: New test.
* testsuite/binutils-all/mips/mips-note-2r-n32.d: New test.
* testsuite/binutils-all/mips/mips-note-2r-n64.d: New test.
* testsuite/binutils-all/mips/mips.exp: Define `has_newabi'.
Run the new tests.
We have but ELF binutils tests in the MIPS subset, and non-ELF MIPS/GAS
ports are gone, making a future addition of any non-ELF tests unlikely.
Bail out right away then if non-ELF, consuming one level of indentation
across the actual tests run.
binutils/
* testsuite/binutils-all/mips/mips.exp: Bail out right away if
non-ELF.
Verify MIPS16e2 ASE instruction assembly, disassembly and object file
flags.
binutils/
* testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3'
to `as' flags.
* testsuite/binutils-all/mips/mips16e2-undecoded.d: New test.
* testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-undecoded.s: Remove
`.module mips3'.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
gas/
* testsuite/gas/mips/mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-mt.d: New test.
* testsuite/gas/mips/mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2-hilo.d: New test.
* testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.d: New test.
* testsuite/gas/mips/mips16e2-imm-error.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
* testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-lui.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips16e2@lui-2.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
* testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
* testsuite/gas/mips/mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-mt.s: New test source.
* testsuite/gas/mips/mips16e2-sub.s: New test source.
* testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
* testsuite/gas/mips/mips16e2-hilo.s: New test source.
* testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
* testsuite/gas/mips/mips16e2-imm-error.s: New test source.
* testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-lui.s: New test source.
* testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
`mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
architectures. Run the new tests.
Define `tempfile' and `copyfile' in `mips.exp' so that standalone script
execution via `RUNTESTFLAGS=mips.exp' works rather than producing:
Running .../binutils/testsuite/binutils-all/mips/mips.exp ...
ERROR: tcl error sourcing
.../binutils/testsuite/binutils-all/mips/mips.exp.
ERROR: can't read "tempfile": no such variable
while executing
"binutils_assemble_flags ${srcfile} $tempfile $opts(as)"
(procedure "run_dump_test" line 207)
invoked from within
"run_dump_test "mips-ase-1""
invoked from within
"if [is_elf_format] {
run_dump_test "mips-ase-1"
run_dump_test "mips-ase-2"
run_dump_test "mips-ase-3"
run_dump_test "mixed-mips16"
..."
(file ".../binutils/testsuite/binutils-all/mips/mips.exp" line 22)
invoked from within
"source .../binutils/testsuite/binutils-all/mips/mips.exp"
("uplevel" body line 1)
invoked from within
"uplevel #0 source .../binutils/testsuite/binutils-all/mips/mips.exp"
invoked from within
"catch "uplevel #0 source $test_file_name""
testcase .../binutils/testsuite/binutils-all/mips/mips.exp completed in 0 seconds
binutils/
* testsuite/binutils-all/mips/mips.exp: Define `tempfile' and
`copyfile' variables.
Complement commit 986e18a5a9 ("Add a second 'pinfo' member to
mips_opcode to extend number of available bits"),
<https://sourceware.org/ml/binutils/2005-01/msg00261.html>, and annotate
MIPS16 NOP, LA, DLA and the synthetic forms of LD and LW instructions as
aliases. These correspond to MOVE, and the PC-relative ADDIU, DADDIU,
LD and LW hardware instructions respectively.
binutils/
* testsuite/binutils-all/mips/mips16-alias.d: New test.
* testsuite/binutils-all/mips/mips16-noalias.d: New test.
* testsuite/binutils-all/mips/mips16-alias.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
opcodes/
* mips16-opc.c (AL): New macro.
(mips16_opcodes): Mark "nop", "la", "dla", and synthetic forms
of "ld" and "lw" as aliases.
Identify non-extensible instructions in the MIPS16 opcode table and
disallow their use with the `.e' instruction size suffix in assembly and
do not interpret any EXTEND prefix present as a part of the instruction
in disassembly.
According to all versions of the MIPS16 ASE specifications the following
instructions encodings are not extensible [1][2][3][4][5][6]: I8/MOV32R,
I8/MOVR32, all RRR minor opcodes, all RR minor opcodes except from DSRA
and DSRL, and EXTEND itself, and as from revision 2.50 of the MIPS16e
ASE specifications it has been further clarified what was previously
implied, that non-extesiable instructions when preceded with an EXTEND
prefix must cause a Reserved Instruction exception [3][5].
Therefore in the presence of an EXTEND prefix none of these instructions
are supposed to be handled as extended instructions and supporting these
forms in disassembly causes confusion, and in the case of the RRR major
opcode it also clashes with the ASMACRO encoding.
References:
[1] "Product Description, MIPS16 Application-Specific Extension",
Version 1.3, MIPS Technologies, Inc., 970130, Table 3. "MIPS16
Instruction Set Summary", p. 5
[2] same, Table 5 "RR Minor Opcodes (RR-type instructions)", p.10
[3] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Section 3.9 "MIPS16e Instruction Summaries", pp. 37-39
[4] same, Section 3.15 "Instruction Bit Encoding", pp. 46-49
[5] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Section 1.9 "MIPS16e Instruction Summaries", pp. 38-41
[6] same, Section 1.15 "Instruction Bit Encoding", pp. 48-51
include/
* opcode/mips.h (INSN2_SHORT_ONLY): New macro.
gas/
* config/tc-mips.c (is_size_valid_16): Disallow a `.e' suffix
instruction size override for INSN2_SHORT_ONLY opcode table
entries.
* testsuite/gas/mips/mips16-extend-swap.d: Adjust output.
* testsuite/gas/mips/mips16-macro-e.l: Adjust error messages.
* testsuite/gas/mips/mips16-32@mips16-macro-e.l: Adjust error
messages.
* testsuite/gas/mips/mips16e-32@mips16-macro-e.l: Adjust error
messages.
* testsuite/gas/mips/mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-64@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-64@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16e-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-insn-e.l: New stderr output.
* testsuite/gas/mips/mips16-insn-t.l: New stderr output.
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16-64@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16e-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16-insn-e.s: New test source.
* testsuite/gas/mips/mips16-insn-t.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
opcodes/
* mips-dis.c (print_insn_mips16): Disallow EXTEND prefix
matching for INSN2_SHORT_ONLY opcode table entries.
* mips16-opc.c (SH): New macro.
(mips16_opcodes): Set SH in `pinfo2' for non-extensible
instruction entries: "nop", "addu", "and", "break", "cmp",
"daddu", "ddiv", "ddivu", "div", "divu", "dmult", "dmultu",
"drem", "dremu", "dsllv", "dsll", "dsrav", "dsra", "dsrlv",
"dsrl", "dsubu", "exit", "entry", "jalr", "jal", "jr", "j",
"jalrc", "jrc", "mfhi", "mflo", "move", "mult", "multu", "neg",
"not", "or", "rem", "remu", "sllv", "sll", "slt", "sltu",
"srav", "sra", "srlv", "srl", "subu", "xor", "sdbbp", "seb",
"seh", "sew", "zeb", "zeh", "zew" and "extend".
binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-extend-insn.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
Respect any ASE flags recorded in ELF file structures for the purpose of
selecting instructions to be disassembled, preventing code from being
hex-dumped even though having been clearly indicated as valid at the
assembly time. Use date from the MIPS ABI flags structure if present,
and otherwise there may be an MDMX ASE flag set in the ELF file header.
For backwards compatibility only set extra flags and do not clear any,
preserving all previously set by the architecture selected to be
disassembled for.
include/
* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
typedef as `elf_internal_abiflags_v0'.
bfd/
* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
(bfd_mips_elf_get_abiflags): New prototype.
* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
* bfd-in2.h: Regenerate.
opcodes/
* mips-dis.c (mips_convert_abiflags_ases): New function.
(set_default_mips_dis_options): Also infer ASE flags from ELF
file structures.
binutils/
* testsuite/binutils-all/mips/mips-ase-1.d: New test.
* testsuite/binutils-all/mips/mips-ase-2.d: New test.
* testsuite/binutils-all/mips/mips-ase-3.d: New test.
* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
Use a tab rather than a space to separate `extend' and its uninterpreted
argument output, like with regular instructions. Separate hexadecimal
halves of undecoded extended instructions output with a space instead of
presenting them concatenated.
opcodes/
* mips-dis.c (print_insn_mips16): Use a tab rather than a space
to separate `extend' and its uninterpreted argument output.
Separate hexadecimal halves of undecoded extended instructions
output.
binutils/
* testsuite/binutils-all/mips/mips16-extend-noinsn.d: New test.
* testsuite/binutils-all/mips/mips16-extend-noinsn.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new test.
Complement commit dd8b7c222e ("MIPS: mips16e jalrc/jrc opcodes"),
<https://sourceware.org/ml/binutils/2005-07/msg00349.html>, and stop the
disassembler making a delay-slot adjustment for PC-relative operations
following either MIPS16e compact jumps, or undefined RR/J(AL)R(C)
encodings that have the `l' (link) and `ra' (source register is `ra')
bits set both at a time. Adjust code description for accuracy. Add a
suitable test case.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Avoid delay-slot
adjustment for PC-relative operations following MIPS16e compact
jumps or undefined RR/J(AL)R(C) encodings.
binutils/
* testsuite/binutils-all/mips/mips16-pcrel.d: New test.
* testsuite/binutils-all/mips/mips16-pcrel.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new test.
Mixing MIPS16 and microMIPS code in a single binary isn't usually
supported but GAS happily produces such code if requested. However it
is not correctly disassembled even if a symbol table is available and
function symbols are correctly anotated with the ISA mode. This is
because the ELF-header global microMIPS ASE flag takes precedence over
MIPS16 function annotation, causing them to be treated as regular MIPS
code.
Correct the problem by respecting function symbol anotation regardless
of the ELF-header flag.
binutils/
* testsuite/binutils-all/mips/mixed-mips16-micromips.d: New test.
* testsuite/binutils-all/mips/mixed-mips16-micromips.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new test.
opcodes/
* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
replacing references to `micromips_ase' throughout.
(_print_insn_mips): Don't use file-level microMIPS annotation to
determine the disassembly mode with the symbol table.
* mips-dis.c (is_compressed_mode_p): Only match symbols from the
section disassembled.
binutils/testsuite/
* binutils-all/mips/mixed-micromips.d: New test.
* binutils-all/mips/mixed-mips16.d: New test.
* binutils-all/mips/mixed-micromips.s: New test source.
* binutils-all/mips/mixed-mips16.s: New test source.
* binutils-all/mips/mips.exp: New file.
