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Arm: avoid unhelpful uses of .macro in testsuite

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Macros with just a single use site are a little pointless to have, and
even in further cases .irp is more suitable for the purpose. Expand such
inline, avoiding the need to touch the testcases when diagnostics are
changed for code resulting from macro expansion.

While there also make what was "iter_mla" in sp-usage-thumb2-relax cover
smlatt as well, rather than testing smlabt twice.
This commit is contained in:
Jan Beulich
2022-12-13 09:11:16 +01:00
parent 785545988c
commit f2e469cb47
141 changed files with 2306 additions and 2375 deletions
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50
gas/testsuite/gas/arm/mve-tailpredloop-bad.l
View File

@@ -1,26 +1,26 @@
[^:]*: Assembler messages:
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Error: r15 not allowed here -- `wlstp.8 lr,pc,.label'
[^:]*:29: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:30: Error: r15 not allowed here -- `dlstp.16 lr,pc'
[^:]*:31: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:33: Error: ARM register expected -- `letp .label_back'
[^:]*:34: Error: branch out of range or not a multiple of 2
[^:]*:35: Error: branch out of range or not a multiple of 2
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Error: r15 not allowed here -- `wlstp.8 lr,pc,.label'
[^:]*:21: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:22: Error: r15 not allowed here -- `dlstp.16 lr,pc'
[^:]*:23: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:25: Error: ARM register expected -- `letp .label_back'
[^:]*:26: Error: branch out of range or not a multiple of 2
[^:]*:27: Error: branch out of range or not a multiple of 2

16
gas/testsuite/gas/arm/mve-tailpredloop-bad.s
View File

@@ -1,30 +1,22 @@
.macro cond1
.label_back:
.syntax unified
.thumb
.irp cond, eq, ne, gt, ge, lt, le
it \cond
wlstp.8 lr, r0, .label
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
dlstp.8 lr, r0
.endr
.endm
.macro cond3
.irp cond, eq, ne, gt, ge, lt, le
it \cond
letp lr, .label_back
.endr
.endm
.label_back:
.syntax unified
.thumb
cond1
cond2
cond3
wlstp.8 lr, pc, .label
wlstp.8 lr, sp, .label
dlstp.16 lr, pc

34
gas/testsuite/gas/arm/mve-vabav-bad.l
View File

@@ -1,18 +1,18 @@
[^:]*: Assembler messages:
[^:]*:13: Error: bad type in SIMD instruction -- `vabav.s64 r0,q0,q1'
[^:]*:14: Error: bad type in SIMD instruction -- `vabav.f16 r0,q0,q1'
[^:]*:15: Error: bad type in SIMD instruction -- `vabav.f32 r0,q0,q1'
[^:]*:16: Error: bad type in SIMD instruction -- `vabav.p8 r0,q0,q1'
[^:]*:17: Error: bad type in SIMD instruction -- `vabav.p16 r0,q0,q1'
[^:]*:18: Error: r13 not allowed here -- `vabav.s32 r13,q0,q1'
[^:]*:19: Error: r15 not allowed here -- `vabav.s32 r15,q0,q1'
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Error: syntax error -- `vabaveq.s32 r0,q0,q1'
[^:]*:23: Error: syntax error -- `vabaveq.s32 r0,q0,q1'
[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vabavt.s32 r0,q0,q1'
[^:]*:26: Error: vector predicated instruction should be in VPT/VPST block -- `vabavt.s32 r0,q0,q1'
[^:]*:4: Error: bad type in SIMD instruction -- `vabav.s64 r0,q0,q1'
[^:]*:5: Error: bad type in SIMD instruction -- `vabav.f16 r0,q0,q1'
[^:]*:6: Error: bad type in SIMD instruction -- `vabav.f32 r0,q0,q1'
[^:]*:7: Error: bad type in SIMD instruction -- `vabav.p8 r0,q0,q1'
[^:]*:8: Error: bad type in SIMD instruction -- `vabav.p16 r0,q0,q1'
[^:]*:9: Error: r13 not allowed here -- `vabav.s32 r13,q0,q1'
[^:]*:10: Error: r15 not allowed here -- `vabav.s32 r15,q0,q1'
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Error: syntax error -- `vabaveq.s32 r0,q0,q1'
[^:]*:19: Error: syntax error -- `vabaveq.s32 r0,q0,q1'
[^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vabavt.s32 r0,q0,q1'
[^:]*:22: Error: vector predicated instruction should be in VPT/VPST block -- `vabavt.s32 r0,q0,q1'

16
gas/testsuite/gas/arm/mve-vabav-bad.s
View File

@@ -1,12 +1,3 @@
.macro cond op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s32 r0, q0, q1
.endr
.endm
.syntax unified
.text
.thumb
@@ -17,7 +8,12 @@ vabav.p8 r0, q0, q1
vabav.p16 r0, q0, q1
vabav.s32 r13, q0, q1
vabav.s32 r15, q0, q1
cond vabav
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vabav.s32 r0, q0, q1
.endr
vpst
vabaveq.s32 r0, q0, q1
vabaveq.s32 r0, q0, q1

24
gas/testsuite/gas/arm/mve-vadc-bad.l
View File

@@ -1,16 +1,16 @@
[^:]*: Assembler messages:
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Error: bad type in SIMD instruction -- `vadc.i8 q0,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vadc.i16 q0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vadc.i64 q0,q1,q2'

20
gas/testsuite/gas/arm/mve-vadc-bad.s
View File

@@ -1,15 +1,15 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
.irp mnem, vadc.i32, vadci.i32
it \cond
\mnem q0, q1, q2
.endr
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
.irp mnem, vadc.i32, vadci.i32
it \cond
\mnem q0, q1, q2
.endr
.endr
vadc.i8 q0, q1, q2
vadc.i16 q0, q1, q2
vadc.i64 q0, q1, q2

24
gas/testsuite/gas/arm/mve-vaddlv-bad.l
View File

@@ -1,16 +1,16 @@
[^:]*: Assembler messages:
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Error: bad type in SIMD instruction -- `vaddlv.i32 r0,r1,q0'
[^:]*:14: Error: bad type in SIMD instruction -- `vaddlv.f32 r0,r1,q0'
[^:]*:15: Error: bad type in SIMD instruction -- `vaddlv.s8 r0,r1,q0'

20
gas/testsuite/gas/arm/mve-vaddlv-bad.s
View File

@@ -1,15 +1,15 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
.irp mnem, vaddlv.s32, vaddlva.u32
it \cond
\mnem r0, r1, q0
.endr
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
.irp mnem, vaddlv.s32, vaddlva.u32
it \cond
\mnem r0, r1, q0
.endr
.endr
vaddlv.i32 r0, r1, q0
vaddlv.f32 r0, r1, q0
vaddlv.s8 r0, r1, q0

24
gas/testsuite/gas/arm/mve-vaddv-bad.l
View File

@@ -1,16 +1,16 @@
[^:]*: Assembler messages:
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Error: bad type in SIMD instruction -- `vaddv.i32 r0,q0'
[^:]*:14: Error: bad type in SIMD instruction -- `vaddv.f32 r0,q0'
[^:]*:15: Error: bad type in SIMD instruction -- `vaddv.s64 r0,q0'

20
gas/testsuite/gas/arm/mve-vaddv-bad.s
View File

@@ -1,15 +1,15 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
.irp mnem, vaddv.s32, vaddva.u32
it \cond
\mnem r0, q0
.endr
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
.irp mnem, vaddv.s32, vaddva.u32
it \cond
\mnem r0, q0
.endr
.endr
vaddv.i32 r0, q0
vaddv.f32 r0, q0
vaddv.s64 r0, q0

52
gas/testsuite/gas/arm/mve-vand-bad.l
View File

@@ -1,27 +1,27 @@
[^:]*: Assembler messages:
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: syntax error -- `vandeq q0,q1,q2'
[^:]*:20: Error: syntax error -- `vandeq q0,q1,q2'
[^:]*:22: Error: syntax error -- `vandeq q0,q1,q2'
[^:]*:24: Error: instruction missing MVE vector predication code -- `vand q0,q1,q2'
[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vandt q0,q1,q2'
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Error: syntax error -- `vandeq.i16 q0,#255'
[^:]*:29: Error: syntax error -- `vandeq.i16 q0,#255'
[^:]*:31: Error: syntax error -- `vandeq.i16 q0,#255'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vand.i16 q0,#255'
[^:]*:34: Error: vector predicated instruction should be in VPT/VPST block -- `vandt.i16 q0,#255'
[^:]*:35: Error: bad type in SIMD instruction -- `vand.i8 q0,#255'
[^:]*:36: Error: bad type in SIMD instruction -- `vand.i64 q0,#255'
[^:]*:37: Error: immediate value out of range -- `vand.i16 q0,#0'
[^:]*:38: Error: immediate value out of range -- `vand.i32 q0,#0'
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Error: syntax error -- `vandeq q0,q1,q2'
[^:]*:11: Error: syntax error -- `vandeq q0,q1,q2'
[^:]*:13: Error: syntax error -- `vandeq q0,q1,q2'
[^:]*:15: Error: instruction missing MVE vector predication code -- `vand q0,q1,q2'
[^:]*:16: Error: vector predicated instruction should be in VPT/VPST block -- `vandt q0,q1,q2'
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Error: syntax error -- `vandeq.i16 q0,#255'
[^:]*:25: Error: syntax error -- `vandeq.i16 q0,#255'
[^:]*:27: Error: syntax error -- `vandeq.i16 q0,#255'
[^:]*:29: Error: instruction missing MVE vector predication code -- `vand.i16 q0,#255'
[^:]*:30: Error: vector predicated instruction should be in VPT/VPST block -- `vandt.i16 q0,#255'
[^:]*:31: Error: bad type in SIMD instruction -- `vand.i8 q0,#255'
[^:]*:32: Error: bad type in SIMD instruction -- `vand.i64 q0,#255'
[^:]*:33: Error: immediate value out of range -- `vand.i16 q0,#0'
[^:]*:34: Error: immediate value out of range -- `vand.i32 q0,#0'

22
gas/testsuite/gas/arm/mve-vand-bad.s
View File

@@ -1,20 +1,11 @@
.macro cond1
.syntax unified
.thumb
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vand q0, q1, q2
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vand.i16 q0, #255
.endr
.endm
.syntax unified
.thumb
cond1
it eq
vandeq q0, q1, q2
vandeq q0, q1, q2
@@ -23,7 +14,12 @@ vandeq q0, q1, q2
vpst
vand q0, q1, q2
vandt q0, q1, q2
cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vand.i16 q0, #255
.endr
it eq
vandeq.i16 q0, #255
vandeq.i16 q0, #255

52
gas/testsuite/gas/arm/mve-vbic-bad.l
View File

@@ -1,28 +1,28 @@
[^:]*: Assembler messages:
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: syntax error -- `vbiceq q0,q1,q2'
[^:]*:20: Error: syntax error -- `vbiceq q0,q1,q2'
[^:]*:22: Error: syntax error -- `vbiceq q0,q1,q2'
[^:]*:24: Error: instruction missing MVE vector predication code -- `vbic q0,q1,q2'
[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vbict q0,q1,q2'
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Error: syntax error -- `vbiceq.i16 q0,#255'
[^:]*:29: Error: syntax error -- `vbiceq.i16 q0,#255'
[^:]*:31: Error: syntax error -- `vbiceq.i16 q0,#255'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vbic.i16 q0,#255'
[^:]*:34: Error: vector predicated instruction should be in VPT/VPST block -- `vbict.i16 q0,#255'
[^:]*:35: Error: bad type in SIMD instruction -- `vbic.i8 q0,#255'
[^:]*:36: Error: bad type in SIMD instruction -- `vbic.i64 q0,#255'
[^:]*:37: Error: immediate value out of range -- `vbic.i16 q0,#257'
[^:]*:38: Error: immediate value out of range -- `vbic.i32 q0,#257'
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Error: syntax error -- `vbiceq q0,q1,q2'
[^:]*:11: Error: syntax error -- `vbiceq q0,q1,q2'
[^:]*:13: Error: syntax error -- `vbiceq q0,q1,q2'
[^:]*:15: Error: instruction missing MVE vector predication code -- `vbic q0,q1,q2'
[^:]*:16: Error: vector predicated instruction should be in VPT/VPST block -- `vbict q0,q1,q2'
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Error: syntax error -- `vbiceq.i16 q0,#255'
[^:]*:25: Error: syntax error -- `vbiceq.i16 q0,#255'
[^:]*:27: Error: syntax error -- `vbiceq.i16 q0,#255'
[^:]*:29: Error: instruction missing MVE vector predication code -- `vbic.i16 q0,#255'
[^:]*:30: Error: vector predicated instruction should be in VPT/VPST block -- `vbict.i16 q0,#255'
[^:]*:31: Error: bad type in SIMD instruction -- `vbic.i8 q0,#255'
[^:]*:32: Error: bad type in SIMD instruction -- `vbic.i64 q0,#255'
[^:]*:33: Error: immediate value out of range -- `vbic.i16 q0,#257'
[^:]*:34: Error: immediate value out of range -- `vbic.i32 q0,#257'

22
gas/testsuite/gas/arm/mve-vbic-bad.s
View File

@@ -1,20 +1,11 @@
.macro cond1
.syntax unified
.thumb
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vbic q0, q1, q2
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vbic.i16 q0, #255
.endr
.endm
.syntax unified
.thumb
cond1
it eq
vbiceq q0, q1, q2
vbiceq q0, q1, q2
@@ -23,7 +14,12 @@ vbiceq q0, q1, q2
vpst
vbic q0, q1, q2
vbict q0, q1, q2
cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vbic.i16 q0, #255
.endr
it eq
vbiceq.i16 q0, #255
vbiceq.i16 q0, #255

12
gas/testsuite/gas/arm/mve-vbrsr-bad.l
View File

@@ -1,10 +1,10 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Error: bad type in SIMD instruction -- `vbrsr.64 q0,q1,r2'
[^:]*:12: Error: ARM register expected -- `vbrsr.32 q0,q1,q2'
[^:]*:14: Error: syntax error -- `vbrsreq.32 q0,q1,r2'

16
gas/testsuite/gas/arm/mve-vbrsr-bad.s
View File

@@ -1,13 +1,13 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vbrsr.16 q0, q1, r2
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vbrsr.16 q0, q1, r2
.endr
vbrsr.64 q0, q1, r2
vbrsr.32 q0, q1, q2
it eq

22
gas/testsuite/gas/arm/mve-vcadd-bad-1.l
View File

@@ -1,15 +1,15 @@
[^:]*: Assembler messages:
[^:]*:10: Error: selected FPU does not support instruction -- `vcadd.f16 q0,q1,q2,#90'
[^:]*:11: Error: bad type in SIMD instruction -- `vcadd.64 q0,q1,q2,#90'
[^:]*:12: Error: immediate out of range -- `vcadd.i32 q0,q1,q2,#180'
[^:]*:13: Error: immediate out of range -- `vcadd.i32 q0,q1,q2,#0'
[^:]*:14: Warning: 32-bit element size and same first and third operand makes instruction UNPREDICTABLE
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: selected FPU does not support instruction -- `vcadd.f16 q0,q1,q2,#90'
[^:]*:4: Error: bad type in SIMD instruction -- `vcadd.64 q0,q1,q2,#90'
[^:]*:5: Error: immediate out of range -- `vcadd.i32 q0,q1,q2,#180'
[^:]*:6: Error: immediate out of range -- `vcadd.i32 q0,q1,q2,#0'
[^:]*:7: Warning: 32-bit element size and same first and third operand makes instruction UNPREDICTABLE
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vcaddeq.i16 q0,q1,q2,#90'
[^:]*:18: Error: syntax error -- `vcaddeq.i16 q0,q1,q2,#90'
[^:]*:20: Error: syntax error -- `vcaddeq.i16 q0,q1,q2,#90'

16
gas/testsuite/gas/arm/mve-vcadd-bad-1.s
View File

@@ -1,10 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcadd.i16 q0, q1, q2, #90
.endr
.endm
.syntax unified
.thumb
vcadd.f16 q0, q1, q2, #90
@@ -12,7 +5,14 @@ vcadd.64 q0, q1, q2, #90
vcadd.i32 q0, q1, q2, #180
vcadd.i32 q0, q1, q2, #0
vcadd.i32 q0, q1, q0, #90
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcadd.i16 q0, q1, q2, #90
.endr
it eq
vcaddeq.i16 q0, q1, q2, #90
vcaddeq.i16 q0, q1, q2, #90

20
gas/testsuite/gas/arm/mve-vcadd-bad-2.l
View File

@@ -1,14 +1,14 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vcadd.f64 q0,q1,q2,#90'
[^:]*:11: Error: immediate out of range -- `vcadd.f32 q0,q1,q2,#180'
[^:]*:12: Error: immediate out of range -- `vcadd.f32 q0,q1,q2,#0'
[^:]*:13: Warning: 32-bit element size and same first and third operand makes instruction UNPREDICTABLE
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vcadd.f64 q0,q1,q2,#90'
[^:]*:4: Error: immediate out of range -- `vcadd.f32 q0,q1,q2,#180'
[^:]*:5: Error: immediate out of range -- `vcadd.f32 q0,q1,q2,#0'
[^:]*:6: Warning: 32-bit element size and same first and third operand makes instruction UNPREDICTABLE
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Error: syntax error -- `vcaddeq.f16 q0,q1,q2,#90'
[^:]*:17: Error: syntax error -- `vcaddeq.f16 q0,q1,q2,#90'
[^:]*:19: Error: syntax error -- `vcaddeq.f16 q0,q1,q2,#90'

16
gas/testsuite/gas/arm/mve-vcadd-bad-2.s
View File

@@ -1,17 +1,17 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcadd.f32 q0, q1, q2, #90
.endr
.endm
.syntax unified
.thumb
vcadd.f64 q0, q1, q2, #90
vcadd.f32 q0, q1, q2, #180
vcadd.f32 q0, q1, q2, #0
vcadd.f32 q0, q1, q0, #90
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcadd.f32 q0, q1, q2, #90
.endr
it eq
vcaddeq.f16 q0, q1, q2, #90
vcaddeq.f16 q0, q1, q2, #90

22
gas/testsuite/gas/arm/mve-vcls-bad.l
View File

@@ -1,15 +1,15 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vcls.f32 q0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vcls.u32 q0,q1'
[^:]*:12: Error: bad type in SIMD instruction -- `vcls.32 q0,q1'
[^:]*:13: Error: bad type in SIMD instruction -- `vcls.i32 q0,q1'
[^:]*:14: Error: bad type in SIMD instruction -- `vcls.s64 q0,q1'
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vcls.f32 q0,q1'
[^:]*:4: Error: bad type in SIMD instruction -- `vcls.u32 q0,q1'
[^:]*:5: Error: bad type in SIMD instruction -- `vcls.32 q0,q1'
[^:]*:6: Error: bad type in SIMD instruction -- `vcls.i32 q0,q1'
[^:]*:7: Error: bad type in SIMD instruction -- `vcls.s64 q0,q1'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vclseq.s16 q0,q1'
[^:]*:18: Error: syntax error -- `vclseq.s16 q0,q1'
[^:]*:20: Error: syntax error -- `vclseq.s16 q0,q1'

16
gas/testsuite/gas/arm/mve-vcls-bad.s
View File

@@ -1,10 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcls.s32 q0, q1
.endr
.endm
.syntax unified
.thumb
vcls.f32 q0, q1
@@ -12,7 +5,14 @@ vcls.u32 q0, q1
vcls.32 q0, q1
vcls.i32 q0, q1
vcls.s64 q0, q1
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcls.s32 q0, q1
.endr
it eq
vclseq.s16 q0, q1
vclseq.s16 q0, q1

16
gas/testsuite/gas/arm/mve-vclz-bad.l
View File

@@ -1,12 +1,12 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vclz.f32 q0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vclz.i64 q0,q1'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vclz.f32 q0,q1'
[^:]*:4: Error: bad type in SIMD instruction -- `vclz.i64 q0,q1'
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Error: syntax error -- `vclzeq.i16 q0,q1'
[^:]*:15: Error: syntax error -- `vclzeq.i16 q0,q1'
[^:]*:17: Error: syntax error -- `vclzeq.i16 q0,q1'

16
gas/testsuite/gas/arm/mve-vclz-bad.s
View File

@@ -1,15 +1,15 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vclz.i32 q0, q1
.endr
.endm
.syntax unified
.thumb
vclz.f32 q0, q1
vclz.i64 q0, q1
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vclz.i32 q0, q1
.endr
it eq
vclzeq.i16 q0, q1
vclzeq.i16 q0, q1

22
gas/testsuite/gas/arm/mve-vcmla-bad-2.l
View File

@@ -1,15 +1,15 @@
[^:]*: Assembler messages:
[^:]*:10: Error: immediate out of range -- `vcmla.f16 q0,q1,q2,#20'
[^:]*:11: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:12: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:13: Error: bad type in SIMD instruction -- `vcmla.f64 q0,q1,q2,#0'
[^:]*:14: Error: bad type in SIMD instruction -- `vcmla.i16 q0,q1,q2,#0'
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: immediate out of range -- `vcmla.f16 q0,q1,q2,#20'
[^:]*:4: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:5: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:6: Error: bad type in SIMD instruction -- `vcmla.f64 q0,q1,q2,#0'
[^:]*:7: Error: bad type in SIMD instruction -- `vcmla.i16 q0,q1,q2,#0'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vcmlaeq.f16 q0,q1,q2,#0'
[^:]*:18: Error: syntax error -- `vcmlaeq.f16 q0,q1,q2,#0'
[^:]*:20: Error: syntax error -- `vcmlaeq.f16 q0,q1,q2,#0'

16
gas/testsuite/gas/arm/mve-vcmla-bad-2.s
View File

@@ -1,10 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcmla.f32 q0, q1, q2, #0
.endr
.endm
.syntax unified
.thumb
vcmla.f16 q0, q1, q2, #20
@@ -12,7 +5,14 @@ vcmla.f32 q0, q0, q1, #0
vcmla.f32 q0, q1, q0, #0
vcmla.f64 q0, q1, q2, #0
vcmla.i16 q0, q1, q2, #0
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcmla.f32 q0, q1, q2, #0
.endr
it eq
vcmlaeq.f16 q0, q1, q2, #0
vcmlaeq.f16 q0, q1, q2, #0

60
gas/testsuite/gas/arm/mve-vcmp-bad-1.l
View File

@@ -1,31 +1,31 @@
[^:]*: Assembler messages:
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Error: selected FPU does not support instruction -- `vcmp.f32 eq,q0,q1'
[^:]*:25: Error: selected FPU does not support instruction -- `vcmp.f32 eq,q0,r1'
[^:]*:26: Error: bad type in SIMD instruction -- `vcmp.i64 eq,q0,q1'
[^:]*:27: Error: invalid condition -- `vcmp.s32 eq,q0,q1'
[^:]*:28: Error: invalid condition -- `vcmp.s16 cs,q0,q1'
[^:]*:29: Error: invalid condition -- `vcmp.u8 le,q0,q1'
[^:]*:30: Error: condition required -- `vcmp.s16 q0,q1'
[^:]*:31: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:33: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
[^:]*:34: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
[^:]*:36: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
[^:]*:37: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.i32 eq,q0,q1'
[^:]*:39: Error: instruction missing MVE vector predication code -- `vcmp.i32 eq,q0,q1'
[^:]*:41: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
[^:]*:42: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
[^:]*:44: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
[^:]*:45: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.i32 eq,q0,r1'
[^:]*:47: Error: instruction missing MVE vector predication code -- `vcmp.i32 eq,q0,r1'
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Error: selected FPU does not support instruction -- `vcmp.f32 eq,q0,q1'
[^:]*:19: Error: selected FPU does not support instruction -- `vcmp.f32 eq,q0,r1'
[^:]*:20: Error: bad type in SIMD instruction -- `vcmp.i64 eq,q0,q1'
[^:]*:21: Error: invalid condition -- `vcmp.s32 eq,q0,q1'
[^:]*:22: Error: invalid condition -- `vcmp.s16 cs,q0,q1'
[^:]*:23: Error: invalid condition -- `vcmp.u8 le,q0,q1'
[^:]*:24: Error: condition required -- `vcmp.s16 q0,q1'
[^:]*:25: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:27: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
[^:]*:28: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
[^:]*:30: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.i32 eq,q0,q1'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vcmp.i32 eq,q0,q1'
[^:]*:35: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
[^:]*:36: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
[^:]*:38: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
[^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.i32 eq,q0,r1'
[^:]*:41: Error: instruction missing MVE vector predication code -- `vcmp.i32 eq,q0,r1'

12
gas/testsuite/gas/arm/mve-vcmp-bad-1.s
View File

@@ -1,26 +1,20 @@
.macro cond1
.syntax unified
.thumb
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .
it \cond
vcmp.s32 gt, q0, q1
.endr
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .
it \cond
vcmp.i16 eq, q0, r1
.endr
.endr
.endm
.syntax unified
.thumb
cond1
cond2
vcmp.f32 eq, q0, q1
vcmp.f32 eq, q0, r1
vcmp.i64 eq, q0, q1

48
gas/testsuite/gas/arm/mve-vcmp-bad-2.l
View File

@@ -1,25 +1,25 @@
[^:]*: Assembler messages:
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Error: bad type in SIMD instruction -- `vcmp.f64 eq,q0,q1'
[^:]*:25: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:27: Error: syntax error -- `vcmpeq.f32 eq,q0,q1'
[^:]*:28: Error: syntax error -- `vcmpeq.f32 eq,q0,q1'
[^:]*:30: Error: syntax error -- `vcmpeq.f32 eq,q0,q1'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.f32 eq,q0,q1'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vcmp.f32 eq,q0,q1'
[^:]*:35: Error: syntax error -- `vcmpeq.f32 eq,q0,r1'
[^:]*:36: Error: syntax error -- `vcmpeq.f32 eq,q0,r1'
[^:]*:38: Error: syntax error -- `vcmpeq.f32 eq,q0,r1'
[^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.f32 eq,q0,r1'
[^:]*:41: Error: instruction missing MVE vector predication code -- `vcmp.f32 eq,q0,r1'
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Error: bad type in SIMD instruction -- `vcmp.f64 eq,q0,q1'
[^:]*:19: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:21: Error: syntax error -- `vcmpeq.f32 eq,q0,q1'
[^:]*:22: Error: syntax error -- `vcmpeq.f32 eq,q0,q1'
[^:]*:24: Error: syntax error -- `vcmpeq.f32 eq,q0,q1'
[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.f32 eq,q0,q1'
[^:]*:27: Error: instruction missing MVE vector predication code -- `vcmp.f32 eq,q0,q1'
[^:]*:29: Error: syntax error -- `vcmpeq.f32 eq,q0,r1'
[^:]*:30: Error: syntax error -- `vcmpeq.f32 eq,q0,r1'
[^:]*:32: Error: syntax error -- `vcmpeq.f32 eq,q0,r1'
[^:]*:33: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.f32 eq,q0,r1'
[^:]*:35: Error: instruction missing MVE vector predication code -- `vcmp.f32 eq,q0,r1'

12
gas/testsuite/gas/arm/mve-vcmp-bad-2.s
View File

@@ -1,26 +1,20 @@
.macro cond1
.syntax unified
.thumb
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .
it \cond
vcmp.f32 gt, q0, q1
.endr
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .
it \cond
vcmp.f16 eq, q0, r1
.endr
.endr
.endm
.syntax unified
.thumb
cond1
cond2
vcmp.f64 eq, q0, q1
vcmp.f32 eq, q0, sp
it eq

22
gas/testsuite/gas/arm/mve-vcmul-bad-2.l
View File

@@ -1,15 +1,15 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vcmul.i16 q0,q1,q2,#0'
[^:]*:11: Error: bad type in SIMD instruction -- `vcmul.f64 q0,q1,q2,#0'
[^:]*:12: Error: immediate out of range -- `vcmul.f32 q0,q1,q2,#20'
[^:]*:13: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:14: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vcmul.i16 q0,q1,q2,#0'
[^:]*:4: Error: bad type in SIMD instruction -- `vcmul.f64 q0,q1,q2,#0'
[^:]*:5: Error: immediate out of range -- `vcmul.f32 q0,q1,q2,#20'
[^:]*:6: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:7: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vcmuleq.f32 q0,q1,q2,#0'
[^:]*:18: Error: syntax error -- `vcmuleq.f32 q0,q1,q2,#0'
[^:]*:20: Error: syntax error -- `vcmuleq.f32 q0,q1,q2,#0'

16
gas/testsuite/gas/arm/mve-vcmul-bad-2.s
View File

@@ -1,10 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcmul.f32 q0, q1, q2, #0
.endr
.endm
.syntax unified
.thumb
vcmul.i16 q0, q1, q2, #0
@@ -12,7 +5,14 @@ vcmul.f64 q0, q1, q2, #0
vcmul.f32 q0, q1, q2, #20
vcmul.f32 q0, q1, q0, #0
vcmul.f32 q0, q0, q1, #0
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcmul.f32 q0, q1, q2, #0
.endr
it eq
vcmuleq.f32 q0, q1, q2, #0
vcmuleq.f32 q0, q1, q2, #0

128
gas/testsuite/gas/arm/mve-vcvt-bad-1.l
View File

@@ -1,68 +1,68 @@
[^:]*: Assembler messages:
[^:]*:12: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#0'
[^:]*:13: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#0'
[^:]*:14: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#0'
[^:]*:15: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#0'
[^:]*:16: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#17'
[^:]*:17: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#17'
[^:]*:18: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#17'
[^:]*:19: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#17'
[^:]*:20: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#0'
[^:]*:21: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#0'
[^:]*:22: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#0'
[^:]*:23: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#0'
[^:]*:24: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#33'
[^:]*:25: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#33'
[^:]*:26: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#33'
[^:]*:27: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#33'
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#0'
[^:]*:4: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#0'
[^:]*:5: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#0'
[^:]*:6: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#0'
[^:]*:7: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#17'
[^:]*:8: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#17'
[^:]*:9: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#17'
[^:]*:10: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#17'
[^:]*:11: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#0'
[^:]*:12: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#0'
[^:]*:13: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#0'
[^:]*:14: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#0'
[^:]*:15: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#33'
[^:]*:16: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#33'
[^:]*:17: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#33'
[^:]*:18: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#33'
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:29: Error: bad type in SIMD instruction -- `vcvt.f64.u64 q0,q1,#1'
[^:]*:30: Error: bad type in SIMD instruction -- `vcvt.u64.f64 q0,q1,#1'
[^:]*:31: Error: bad type in SIMD instruction -- `vcvt.f64.s64 q0,q1,#1'

20
gas/testsuite/gas/arm/mve-vcvt-bad-1.s
View File

@@ -1,12 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .f16.s16, .s16.f16, .f16.u16, .u16.f16, .f32.s32, .s32.f32, .f32.u32, .u32.f32
it \cond
vcvt\size q0, q1, #1
.endr
.endr
.endm
.syntax unified
.thumb
vcvt.f16.s16 q0, q1, #0
@@ -25,7 +16,16 @@ vcvt.f32.s32 q0, q1, #33
vcvt.s32.f32 q0, q1, #33
vcvt.f32.u32 q0, q1, #33
vcvt.u32.f32 q0, q1, #33
cond
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .f16.s16, .s16.f16, .f16.u16, .u16.f16, .f32.s32, .s32.f32, .f32.u32, .u32.f32
it \cond
vcvt\size q0, q1, #1
.endr
.endr
vcvt.f64.u64 q0, q1, #1
vcvt.u64.f64 q0, q1, #1
vcvt.f64.s64 q0, q1, #1

96
gas/testsuite/gas/arm/mve-vcvt-bad-2.l
View File

@@ -1,52 +1,52 @@
[^:]*: Assembler messages:
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Error: bad type in SIMD instruction -- `vcvt.u64.f64 q0,q1'
[^:]*:14: Error: bad type in SIMD instruction -- `vcvt.f64.u64 q0,q1'
[^:]*:15: Error: bad type in SIMD instruction -- `vcvt.s64.f64 q0,q1'

20
gas/testsuite/gas/arm/mve-vcvt-bad-2.s
View File

@@ -1,15 +1,15 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .f16.s16, .s16.f16, .f16.u16, .u16.f16, .f32.s32, .s32.f32, .f32.u32, .u32.f32
it \cond
vcvt\size q0, q1
.endr
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .f16.s16, .s16.f16, .f16.u16, .u16.f16, .f32.s32, .s32.f32, .f32.u32, .u32.f32
it \cond
vcvt\size q0, q1
.endr
.endr
vcvt.u64.f64 q0, q1
vcvt.f64.u64 q0, q1
vcvt.s64.f64 q0, q1

48
gas/testsuite/gas/arm/mve-vcvt-bad-3.l
View File

@@ -1,28 +1,28 @@
[^:]*: Assembler messages:
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Error: bad type in SIMD instruction -- `vcvt.f64.f16 q0,q1'
[^:]*:16: Error: bad type in SIMD instruction -- `vcvt.f64.f32 q0,q1'
[^:]*:17: Error: bad type in SIMD instruction -- `vcvt.f16.f64 q0,q1'

16
gas/testsuite/gas/arm/mve-vcvt-bad-3.s
View File

@@ -1,17 +1,17 @@
.macro cond
.syntax unified
.thumb
.irp top, t, b
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .f16.f32, .f32.f16
it \cond
vcvt\top\size q0, q1
.endr
.endr
.endr
.endm
.syntax unified
.thumb
cond
.endr
.endr
.endr
vcvt.f64.f16 q0, q1
vcvt.f64.f32 q0, q1
vcvt.f16.f64 q0, q1

192
gas/testsuite/gas/arm/mve-vcvt-bad-4.l
View File

@@ -1,100 +1,100 @@
[^:]*: Assembler messages:
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Error: bad type in SIMD instruction -- `vcvta.s64.f64 q0,q1'
[^:]*:16: Error: bad type in SIMD instruction -- `vcvta.u64.f64 q0,q1'
[^:]*:17: Error: bad type in SIMD instruction -- `vcvta.f64.s64 q0,q1'

16
gas/testsuite/gas/arm/mve-vcvt-bad-4.s
View File

@@ -1,17 +1,17 @@
.macro cond
.syntax unified
.thumb
.irp round, a, n, p, m
.irp cond, eq, ne, gt, ge, lt, le
.irp size, .s16.f16, .u16.f16, .s32.f32, .u32.f32
it \cond
vcvt\round\size q0, q1
.endr
.endr
.endr
.endm
.syntax unified
.thumb
cond
.endr
.endr
.endr
vcvta.s64.f64 q0, q1
vcvta.u64.f64 q0, q1
vcvta.f64.s64 q0, q1

106
gas/testsuite/gas/arm/mve-vcvt-bad.l
View File

@@ -1,41 +1,41 @@
[^:]*: Assembler messages:
[^:]*:11: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#0'
[^:]*:12: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#17'
[^:]*:13: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#0'
[^:]*:14: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#17'
[^:]*:15: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#0'
[^:]*:16: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#17'
[^:]*:17: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#0'
[^:]*:18: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#17'
[^:]*:19: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#0'
[^:]*:20: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#33'
[^:]*:21: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#0'
[^:]*:22: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#33'
[^:]*:23: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#0'
[^:]*:24: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#33'
[^:]*:25: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#0'
[^:]*:26: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#33'
[^:]*:27: Error: bad type in SIMD instruction -- `vcvt.f64.s64 q0,q1,#1'
[^:]*:28: Error: bad type in SIMD instruction -- `vcvt.f64.u64 q0,q1,#1'
[^:]*:29: Error: bad type in SIMD instruction -- `vcvt.s64.f64 q0,q1,#1'
[^:]*:30: Error: bad type in SIMD instruction -- `vcvt.u64.f64 q0,q1,#1'
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#0'
[^:]*:5: Error: immediate value out of range -- `vcvt.f16.s16 q0,q1,#17'
[^:]*:6: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#0'
[^:]*:7: Error: immediate value out of range -- `vcvt.f16.u16 q0,q1,#17'
[^:]*:8: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#0'
[^:]*:9: Error: immediate value out of range -- `vcvt.s16.f16 q0,q1,#17'
[^:]*:10: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#0'
[^:]*:11: Error: immediate value out of range -- `vcvt.u16.f16 q0,q1,#17'
[^:]*:12: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#0'
[^:]*:13: Error: immediate value out of range -- `vcvt.f32.s32 q0,q1,#33'
[^:]*:14: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#0'
[^:]*:15: Error: immediate value out of range -- `vcvt.f32.u32 q0,q1,#33'
[^:]*:16: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#0'
[^:]*:17: Error: immediate value out of range -- `vcvt.s32.f32 q0,q1,#33'
[^:]*:18: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#0'
[^:]*:19: Error: immediate value out of range -- `vcvt.u32.f32 q0,q1,#33'
[^:]*:20: Error: bad type in SIMD instruction -- `vcvt.f64.s64 q0,q1,#1'
[^:]*:21: Error: bad type in SIMD instruction -- `vcvt.f64.u64 q0,q1,#1'
[^:]*:22: Error: bad type in SIMD instruction -- `vcvt.s64.f64 q0,q1,#1'
[^:]*:23: Error: bad type in SIMD instruction -- `vcvt.u64.f64 q0,q1,#1'
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:33: Error: syntax error -- `vcvteq.f16.s16 q0,q1,#1'
[^:]*:34: Error: syntax error -- `vcvteq.f16.s16 q0,q1,#1'
[^:]*:36: Error: syntax error -- `vcvteq.f16.s16 q0,q1,#1'
[^:]*:37: Error: vector predicated instruction should be in VPT/VPST block -- `vcvtt.f16.s16 q0,q1,#1'
[^:]*:39: Error: instruction missing MVE vector predication code -- `vcvt.f16.s16 q0,q1,#1'
[^:]*:48: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:48: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:48: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:48: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:48: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:48: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:45: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:45: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:45: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:45: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:45: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:45: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:49: Error: bad type in SIMD instruction -- `vcvt.f64.s64 q0,q1'
[^:]*:50: Error: bad type in SIMD instruction -- `vcvt.f64.u64 q0,q1'
[^:]*:51: Error: bad type in SIMD instruction -- `vcvt.s64.f64 q0,q1'
@@ -45,12 +45,12 @@
[^:]*:57: Error: syntax error -- `vcvteq.u32.f32 q0,q1'
[^:]*:58: Error: vector predicated instruction should be in VPT/VPST block -- `vcvtt.u32.f32 q0,q1'
[^:]*:60: Error: instruction missing MVE vector predication code -- `vcvt.u32.f32 q0,q1'
[^:]*:69: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:69: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:69: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:69: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:69: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:69: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:70: Error: bad type in SIMD instruction -- `vcvtb.f16.f64 q0,q1'
[^:]*:71: Error: bad type in SIMD instruction -- `vcvtb.f64.f16 q0,q1'
[^:]*:72: Error: bad type in SIMD instruction -- `vcvtb.f32.f64 q0,q1'
@@ -60,18 +60,18 @@
[^:]*:78: Error: syntax error -- `vcvtbeq.f16.f32 q0,q1'
[^:]*:79: Error: vector predicated instruction should be in VPT/VPST block -- `vcvtbt.f16.f32 q0,q1'
[^:]*:81: Error: instruction missing MVE vector predication code -- `vcvtb.f16.f32 q0,q1'
[^:]*:82: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:82: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:82: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:82: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:82: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:82: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:83: Error: bad type in SIMD instruction -- `vcvtt.f16.f64 q0,q1'
[^:]*:84: Error: bad type in SIMD instruction -- `vcvtt.f64.f16 q0,q1'
[^:]*:85: Error: bad type in SIMD instruction -- `vcvtt.f32.f64 q0,q1'
[^:]*:86: Error: bad type in SIMD instruction -- `vcvtt.f64.f32 q0,q1'
[^:]*:88: Error: syntax error -- `vcvtteq.f16.f32 q0,q1'
[^:]*:89: Error: syntax error -- `vcvtteq.f16.f32 q0,q1'
[^:]*:91: Error: syntax error -- `vcvtteq.f16.f32 q0,q1'
[^:]*:92: Error: vector predicated instruction should be in VPT/VPST block -- `vcvttt.f16.f32 q0,q1'
[^:]*:94: Error: instruction missing MVE vector predication code -- `vcvtt.f16.f32 q0,q1'
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:67: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:70: Error: bad type in SIMD instruction -- `vcvtt.f16.f64 q0,q1'
[^:]*:71: Error: bad type in SIMD instruction -- `vcvtt.f64.f16 q0,q1'
[^:]*:72: Error: bad type in SIMD instruction -- `vcvtt.f32.f64 q0,q1'
[^:]*:73: Error: bad type in SIMD instruction -- `vcvtt.f64.f32 q0,q1'
[^:]*:75: Error: syntax error -- `vcvtteq.f16.f32 q0,q1'
[^:]*:76: Error: syntax error -- `vcvtteq.f16.f32 q0,q1'
[^:]*:78: Error: syntax error -- `vcvtteq.f16.f32 q0,q1'
[^:]*:79: Error: vector predicated instruction should be in VPT/VPST block -- `vcvttt.f16.f32 q0,q1'
[^:]*:81: Error: instruction missing MVE vector predication code -- `vcvtt.f16.f32 q0,q1'

65
gas/testsuite/gas/arm/mve-vcvt-bad.s
View File

@@ -1,10 +1,3 @@
.macro cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcvt\().f16.s16 q0, q1, #1
.endr
.endm
.syntax unified
.thumb
@@ -28,7 +21,14 @@ vcvt.f64.s64 q0, q1, #1
vcvt.f64.u64 q0, q1, #1
vcvt.s64.f64 q0, q1, #1
vcvt.u64.f64 q0, q1, #1
cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcvt\().f16.s16 q0, q1, #1
.endr
it eq
vcvteq.f16.s16 q0, q1, #1
vcvteq.f16.s16 q0, q1, #1
@@ -38,14 +38,14 @@ vcvtt.f16.s16 q0, q1, #1
vpst
vcvt.f16.s16 q0, q1, #1
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcvt\().f16.s16 q0, q1
.endr
.endm
cond2
.endr
vcvt.f64.s64 q0, q1
vcvt.f64.u64 q0, q1
vcvt.s64.f64 q0, q1
@@ -59,36 +59,25 @@ vcvtt.u32.f32 q0, q1
vpst
vcvt.u32.f32 q0, q1
.macro cond3 mnem
.irp bt, b, t
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\mnem\().f16.f32 q0, q1
vcvt\bt\().f16.f32 q0, q1
.endr
.endm
cond3 vcvtb
vcvtb.f16.f64 q0, q1
vcvtb.f64.f16 q0, q1
vcvtb.f32.f64 q0, q1
vcvtb.f64.f32 q0, q1
vcvt\bt\().f16.f64 q0, q1
vcvt\bt\().f64.f16 q0, q1
vcvt\bt\().f32.f64 q0, q1
vcvt\bt\().f64.f32 q0, q1
it eq
vcvtbeq.f16.f32 q0, q1
vcvtbeq.f16.f32 q0, q1
vcvt\bt\()eq.f16.f32 q0, q1
vcvt\bt\()eq.f16.f32 q0, q1
vpst
vcvtbeq.f16.f32 q0, q1
vcvtbt.f16.f32 q0, q1
vcvt\bt\()eq.f16.f32 q0, q1
vcvt\bt\()t.f16.f32 q0, q1
vpst
vcvtb.f16.f32 q0, q1
cond3 vcvtt
vcvtt.f16.f64 q0, q1
vcvtt.f64.f16 q0, q1
vcvtt.f32.f64 q0, q1
vcvtt.f64.f32 q0, q1
it eq
vcvtteq.f16.f32 q0, q1
vcvtteq.f16.f32 q0, q1
vpst
vcvtteq.f16.f32 q0, q1
vcvttt.f16.f32 q0, q1
vpst
vcvtt.f16.f32 q0, q1
vcvt\bt\().f16.f32 q0, q1
.endr

44
gas/testsuite/gas/arm/mve-vddup-bad.l
View File

@@ -1,26 +1,26 @@
[^:]*: Assembler messages:
[^:]*:16: Error: bad type in SIMD instruction -- `vddup.s16 q0,r0,#1'
[^:]*:17: Error: bad type in SIMD instruction -- `vddup.u64 q0,r0,#1'
[^:]*:18: Error: immediate must be either 1, 2, 4 or 8 -- `vddup.u32 q0,r0,#3'
[^:]*:19: Error: immediate must be either 1, 2, 4 or 8 -- `vddup.u32 q0,r0,#0'
[^:]*:20: Error: bad type in SIMD instruction -- `vdwdup.s16 q0,r0,r1,#1'
[^:]*:21: Error: bad type in SIMD instruction -- `vdwdup.u64 q0,r0,r1,#1'
[^:]*:22: Error: immediate must be either 1, 2, 4 or 8 -- `vdwdup.u32 q0,r0,r1,#3'
[^:]*:23: Error: immediate must be either 1, 2, 4 or 8 -- `vdwdup.u32 q0,r0,r1,#0'
[^:]*:24: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:25: Error: r15 not allowed here -- `vdwdup.u32 q0,r0,pc,#1'
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vddup.s16 q0,r0,#1'
[^:]*:4: Error: bad type in SIMD instruction -- `vddup.u64 q0,r0,#1'
[^:]*:5: Error: immediate must be either 1, 2, 4 or 8 -- `vddup.u32 q0,r0,#3'
[^:]*:6: Error: immediate must be either 1, 2, 4 or 8 -- `vddup.u32 q0,r0,#0'
[^:]*:7: Error: bad type in SIMD instruction -- `vdwdup.s16 q0,r0,r1,#1'
[^:]*:8: Error: bad type in SIMD instruction -- `vdwdup.u64 q0,r0,r1,#1'
[^:]*:9: Error: immediate must be either 1, 2, 4 or 8 -- `vdwdup.u32 q0,r0,r1,#3'
[^:]*:10: Error: immediate must be either 1, 2, 4 or 8 -- `vdwdup.u32 q0,r0,r1,#0'
[^:]*:11: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:12: Error: r15 not allowed here -- `vdwdup.u32 q0,r0,pc,#1'
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:29: Error: syntax error -- `vddupeq.u32 q0,r0,#1'
[^:]*:30: Error: syntax error -- `vddupeq.u32 q0,r0,#1'
[^:]*:32: Error: syntax error -- `vddupeq.u32 q0,r0,#1'

30
gas/testsuite/gas/arm/mve-vddup-bad.s
View File

@@ -1,16 +1,3 @@
.macro cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vddup.u32 q0, r2, #1
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vdwdup.u32 q0, r2, r1, #1
.endr
.endm
.syntax unified
.thumb
vddup.s16 q0, r0, #1
@@ -23,8 +10,21 @@ vdwdup.u32 q0, r0, r1, #3
vdwdup.u32 q0, r0, r1, #0
vdwdup.u32 q0, r0, sp, #1
vdwdup.u32 q0, r0, pc, #1
cond1
cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vddup.u32 q0, r2, #1
.endr
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vdwdup.u32 q0, r2, r1, #1
.endr
it eq
vddupeq.u32 q0, r0, #1
vddupeq.u32 q0, r0, #1

20
gas/testsuite/gas/arm/mve-vdup-bad.l
View File

@@ -1,14 +1,14 @@
[^:]*: Assembler messages:
[^:]*:11: Error: bad type in SIMD instruction -- `vdup.64 q0,r1'
[^:]*:12: Error: selected FPU does not support instruction -- `vdup.32 q0,d0\[1\]'
[^:]*:13: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:14: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: bad type in SIMD instruction -- `vdup.64 q0,r1'
[^:]*:5: Error: selected FPU does not support instruction -- `vdup.32 q0,d0\[1\]'
[^:]*:6: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:7: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vdupeq.32 q0,r2'
[^:]*:18: Error: syntax error -- `vdupeq.32 q0,r2'
[^:]*:20: Error: syntax error -- `vdupeq.32 q0,r2'

16
gas/testsuite/gas/arm/mve-vdup-bad.s
View File

@@ -1,10 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vdup.32 q0, r2
.endr
.endm
.syntax unified
.thumb
vdup.f16 q0, r1
@@ -12,7 +5,14 @@ vdup.64 q0, r1
vdup.32 q0, d0[1]
vdup.32 q0, sp
vdup.32 q0, pc
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vdup.32 q0, r2
.endr
it eq
vdupeq.32 q0, r2
vdupeq.32 q0, r2

12
gas/testsuite/gas/arm/mve-veor-bad.l
View File

@@ -1,10 +1,10 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: syntax error -- `veoreq q0,q1,q2'
[^:]*:13: Error: syntax error -- `veoreq q0,q1,q2'
[^:]*:15: Error: syntax error -- `veoreq q0,q1,q2'

16
gas/testsuite/gas/arm/mve-veor-bad.s
View File

@@ -1,13 +1,13 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
veor q0, q1, q2
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
veor q0, q1, q2
.endr
it eq
veoreq q0, q1, q2
veoreq q0, q1, q2

68
gas/testsuite/gas/arm/mve-vfma-vfms-bad.l
View File

@@ -1,35 +1,35 @@
[^:]*: Assembler messages:
[^:]*:24: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:25: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:26: Error: bad type in SIMD instruction -- `vfma.f64 q0,q1,q2'
[^:]*:27: Error: bad type in SIMD instruction -- `vfma.32 q0,q1,q2'
[^:]*:28: Error: bad type in SIMD instruction -- `vfms.f64 q0,q1,q2'
[^:]*:29: Error: bad type in SIMD instruction -- `vfms.32 q0,q1,q2'
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:31: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:32: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:32: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:32: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:32: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:32: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:32: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:33: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:33: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:33: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:33: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:33: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:33: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:35: Error: syntax error -- `vfmaeq.f16 q0,q1,q2'
[^:]*:36: Error: syntax error -- `vfmaeq.f16 q0,q1,q2'
[^:]*:38: Error: syntax error -- `vfmaeq.f16 q0,q1,q2'
[^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vfmat.f16 q0,q1,q2'
[^:]*:41: Error: instruction missing MVE vector predication code -- `vfma.f16 q0,q1,q2'
[^:]*:43: Error: syntax error -- `vfmseq.f16 q0,q1,q2'
[^:]*:44: Error: syntax error -- `vfmseq.f16 q0,q1,q2'
[^:]*:46: Error: syntax error -- `vfmseq.f16 q0,q1,q2'
[^:]*:47: Error: vector predicated instruction should be in VPT/VPST block -- `vfmst.f16 q0,q1,q2'
[^:]*:49: Error: instruction missing MVE vector predication code -- `vfms.f16 q0,q1,q2'
[^:]*:3: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:4: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:5: Error: bad type in SIMD instruction -- `vfma.f64 q0,q1,q2'
[^:]*:6: Error: bad type in SIMD instruction -- `vfma.32 q0,q1,q2'
[^:]*:7: Error: bad type in SIMD instruction -- `vfms.f64 q0,q1,q2'
[^:]*:8: Error: bad type in SIMD instruction -- `vfms.32 q0,q1,q2'
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Error: syntax error -- `vfmaeq.f16 q0,q1,q2'
[^:]*:28: Error: syntax error -- `vfmaeq.f16 q0,q1,q2'
[^:]*:30: Error: syntax error -- `vfmaeq.f16 q0,q1,q2'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vfmat.f16 q0,q1,q2'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vfma.f16 q0,q1,q2'
[^:]*:35: Error: syntax error -- `vfmseq.f16 q0,q1,q2'
[^:]*:36: Error: syntax error -- `vfmseq.f16 q0,q1,q2'
[^:]*:38: Error: syntax error -- `vfmseq.f16 q0,q1,q2'
[^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vfmst.f16 q0,q1,q2'
[^:]*:41: Error: instruction missing MVE vector predication code -- `vfms.f16 q0,q1,q2'

40
gas/testsuite/gas/arm/mve-vfma-vfms-bad.s
View File

@@ -1,24 +1,3 @@
.macro cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfma.f32 q0, q1, q2
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfma.f32 q0, q1, r2
.endr
.endm
.macro cond3
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfms.f32 q0, q1, q2
.endr
.endm
.syntax unified
.thumb
vfma.f32 q0, q1, sp
@@ -28,9 +7,22 @@ vfma.32 q0, q1, q2
vfms.f64 q0, q1, q2
vfms.32 q0, q1, q2
vfma.f64 d0, d1, d2
cond1
cond2
cond3
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfma.f32 q0, q1, q2
.endr
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfma.f32 q0, q1, r2
.endr
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfms.f32 q0, q1, q2
.endr
it eq
vfmaeq.f16 q0, q1, q2
vfmaeq.f16 q0, q1, q2

20
gas/testsuite/gas/arm/mve-vfmas-bad.l
View File

@@ -1,14 +1,14 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:11: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:12: Error: bad type in SIMD instruction -- `vfmas.i32 q0,q1,r2'
[^:]*:13: Error: bad type in SIMD instruction -- `vfmas.f64 q0,q1,r2'
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:4: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:5: Error: bad type in SIMD instruction -- `vfmas.i32 q0,q1,r2'
[^:]*:6: Error: bad type in SIMD instruction -- `vfmas.f64 q0,q1,r2'
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Error: syntax error -- `vfmaseq.f32 q0,q1,r2'
[^:]*:17: Error: syntax error -- `vfmaseq.f32 q0,q1,r2'
[^:]*:19: Error: syntax error -- `vfmaseq.f32 q0,q1,r2'

16
gas/testsuite/gas/arm/mve-vfmas-bad.s
View File

@@ -1,17 +1,17 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfmas.f32 q0, q1, r2
.endr
.endm
.syntax unified
.thumb
vfmas.f32 q0, q1, sp
vfmas.f32 q0, q1, pc
vfmas.i32 q0, q1, r2
vfmas.f64 q0, q1, r2
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vfmas.f32 q0, q1, r2
.endr
it eq
vfmaseq.f32 q0, q1, r2
vfmaseq.f32 q0, q1, r2

22
gas/testsuite/gas/arm/mve-vhcadd-bad.l
View File

@@ -1,15 +1,15 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vhcadd.u8 q0,q1,q2,#90'
[^:]*:11: Error: bad type in SIMD instruction -- `vhcadd.i8 q0,q1,q2,#90'
[^:]*:12: Error: bad type in SIMD instruction -- `vhcadd.s64 q0,q1,q2,#90'
[^:]*:13: Error: immediate out of range -- `vhcadd.s8 q0,q1,q2,#0'
[^:]*:14: Error: immediate out of range -- `vhcadd.s8 q0,q1,q2,#180'
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vhcadd.u8 q0,q1,q2,#90'
[^:]*:4: Error: bad type in SIMD instruction -- `vhcadd.i8 q0,q1,q2,#90'
[^:]*:5: Error: bad type in SIMD instruction -- `vhcadd.s64 q0,q1,q2,#90'
[^:]*:6: Error: immediate out of range -- `vhcadd.s8 q0,q1,q2,#0'
[^:]*:7: Error: immediate out of range -- `vhcadd.s8 q0,q1,q2,#180'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vhcaddeq.s8 q0,q1,q2,#90'
[^:]*:18: Error: syntax error -- `vhcaddeq.s8 q0,q1,q2,#90'
[^:]*:20: Error: syntax error -- `vhcaddeq.s8 q0,q1,q2,#90'

16
gas/testsuite/gas/arm/mve-vhcadd-bad.s
View File

@@ -1,10 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vhcadd.s8 q0, q1, q2, #90
.endr
.endm
.syntax unified
.thumb
vhcadd.u8 q0, q1, q2, #90
@@ -12,7 +5,14 @@ vhcadd.i8 q0, q1, q2, #90
vhcadd.s64 q0, q1, q2, #90
vhcadd.s8 q0, q1, q2, #0
vhcadd.s8 q0, q1, q2, #180
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vhcadd.s8 q0, q1, q2, #90
.endr
it eq
vhcaddeq.s8 q0, q1, q2, #90
vhcaddeq.s8 q0, q1, q2, #90

44
gas/testsuite/gas/arm/mve-vidup-bad.l
View File

@@ -1,26 +1,26 @@
[^:]*: Assembler messages:
[^:]*:16: Error: bad type in SIMD instruction -- `vidup.s16 q0,r0,#1'
[^:]*:17: Error: bad type in SIMD instruction -- `vidup.u64 q0,r0,#1'
[^:]*:18: Error: immediate must be either 1, 2, 4 or 8 -- `vidup.u32 q0,r0,#3'
[^:]*:19: Error: immediate must be either 1, 2, 4 or 8 -- `vidup.u32 q0,r0,#0'
[^:]*:20: Error: bad type in SIMD instruction -- `viwdup.s16 q0,r0,r1,#1'
[^:]*:21: Error: bad type in SIMD instruction -- `viwdup.u64 q0,r0,r1,#1'
[^:]*:22: Error: immediate must be either 1, 2, 4 or 8 -- `viwdup.u32 q0,r0,r1,#3'
[^:]*:23: Error: immediate must be either 1, 2, 4 or 8 -- `viwdup.u32 q0,r0,r1,#0'
[^:]*:24: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:25: Error: r15 not allowed here -- `viwdup.u32 q0,r0,pc,#1'
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vidup.s16 q0,r0,#1'
[^:]*:4: Error: bad type in SIMD instruction -- `vidup.u64 q0,r0,#1'
[^:]*:5: Error: immediate must be either 1, 2, 4 or 8 -- `vidup.u32 q0,r0,#3'
[^:]*:6: Error: immediate must be either 1, 2, 4 or 8 -- `vidup.u32 q0,r0,#0'
[^:]*:7: Error: bad type in SIMD instruction -- `viwdup.s16 q0,r0,r1,#1'
[^:]*:8: Error: bad type in SIMD instruction -- `viwdup.u64 q0,r0,r1,#1'
[^:]*:9: Error: immediate must be either 1, 2, 4 or 8 -- `viwdup.u32 q0,r0,r1,#3'
[^:]*:10: Error: immediate must be either 1, 2, 4 or 8 -- `viwdup.u32 q0,r0,r1,#0'
[^:]*:11: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:12: Error: r15 not allowed here -- `viwdup.u32 q0,r0,pc,#1'
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:29: Error: syntax error -- `vidupeq.u32 q0,r0,#1'
[^:]*:30: Error: syntax error -- `vidupeq.u32 q0,r0,#1'
[^:]*:32: Error: syntax error -- `vidupeq.u32 q0,r0,#1'

30
gas/testsuite/gas/arm/mve-vidup-bad.s
View File

@@ -1,16 +1,3 @@
.macro cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vidup.u32 q0, r2, #1
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
viwdup.u32 q0, r2, r1, #1
.endr
.endm
.syntax unified
.thumb
vidup.s16 q0, r0, #1
@@ -23,8 +10,21 @@ viwdup.u32 q0, r0, r1, #3
viwdup.u32 q0, r0, r1, #0
viwdup.u32 q0, r0, sp, #1
viwdup.u32 q0, r0, pc, #1
cond1
cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vidup.u32 q0, r2, #1
.endr
.irp cond, eq, ne, gt, ge, lt, le
it \cond
viwdup.u32 q0, r2, r1, #1
.endr
it eq
vidupeq.u32 q0, r0, #1
vidupeq.u32 q0, r0, #1

32
gas/testsuite/gas/arm/mve-vmax-vmin-bad.l
View File

@@ -1,20 +1,20 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmax.s64 q0,q1,q2'
[^:]*:11: Error: selected FPU does not support instruction -- `vmax.f16 q0,q1,q2'
[^:]*:12: Error: bad type in SIMD instruction -- `vmax.u64 q0,q1,q2'
[^:]*:13: Error: selected FPU does not support instruction -- `vmax.f32 q0,q1,q2'
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: bad type in SIMD instruction -- `vmax.s64 q0,q1,q2'
[^:]*:5: Error: selected FPU does not support instruction -- `vmax.f16 q0,q1,q2'
[^:]*:6: Error: bad type in SIMD instruction -- `vmax.u64 q0,q1,q2'
[^:]*:7: Error: selected FPU does not support instruction -- `vmax.f32 q0,q1,q2'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vmaxeq.s16 q0,q1,q2'
[^:]*:18: Error: syntax error -- `vmaxeq.s16 q0,q1,q2'
[^:]*:20: Error: syntax error -- `vmaxeq.s16 q0,q1,q2'

18
gas/testsuite/gas/arm/mve-vmax-vmin-bad.s
View File

@@ -1,18 +1,18 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s8 q0, q1, q2
.endr
.endm
.syntax unified
.thumb
vmax.s64 q0, q1, q2
vmax.f16 q0, q1, q2
vmax.u64 q0, q1, q2
vmax.f32 q0, q1, q2
cond vmax
cond vmin
.irp op, vmax, vmin
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s8 q0, q1, q2
.endr
.endr
it eq
vmaxeq.s16 q0, q1, q2
vmaxeq.s16 q0, q1, q2

36
gas/testsuite/gas/arm/mve-vmaxa-vmina-bad.l
View File

@@ -1,22 +1,22 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmaxa.u8 q0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vmaxa.s64 q0,q1'
[^:]*:12: Error: bad type in SIMD instruction -- `vmaxa.f16 q0,q1'
[^:]*:13: Error: bad type in SIMD instruction -- `vmina.u8 q0,q1'
[^:]*:14: Error: bad type in SIMD instruction -- `vmina.s64 q0,q1'
[^:]*:15: Error: bad type in SIMD instruction -- `vmina.f16 q0,q1'
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: bad type in SIMD instruction -- `vmaxa.u8 q0,q1'
[^:]*:5: Error: bad type in SIMD instruction -- `vmaxa.s64 q0,q1'
[^:]*:6: Error: bad type in SIMD instruction -- `vmaxa.f16 q0,q1'
[^:]*:7: Error: bad type in SIMD instruction -- `vmina.u8 q0,q1'
[^:]*:8: Error: bad type in SIMD instruction -- `vmina.s64 q0,q1'
[^:]*:9: Error: bad type in SIMD instruction -- `vmina.f16 q0,q1'
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: syntax error -- `vmaxaeq.s8 q0,q1'
[^:]*:20: Error: syntax error -- `vmaxaeq.s8 q0,q1'
[^:]*:22: Error: syntax error -- `vmaxaeq.s8 q0,q1'

18
gas/testsuite/gas/arm/mve-vmaxa-vmina-bad.s
View File

@@ -1,20 +1,20 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s8 q0, q1
.endr
.endm
.syntax unified
.thumb
vmaxa.u8 q0, q1
vmaxa.s64 q0, q1
vmaxa.f16 q0, q1
vmina.u8 q0, q1
vmina.s64 q0, q1
vmina.f16 q0, q1
cond vmaxa
cond vmina
.irp op, vmaxa, vmina
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s8 q0, q1
.endr
.endr
it eq
vmaxaeq.s8 q0, q1
vmaxaeq.s8 q0, q1

32
gas/testsuite/gas/arm/mve-vmaxnm-vminnm-bad.l
View File

@@ -1,20 +1,20 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmaxnm.f64 q0,q1,q2'
[^:]*:11: Error: bad type in SIMD instruction -- `vmaxnm.i16 q0,q1,q2'
[^:]*:12: Error: bad type in SIMD instruction -- `vminnm.f64 q0,q1,q2'
[^:]*:13: Error: bad type in SIMD instruction -- `vminnm.i16 q0,q1,q2'
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: bad type in SIMD instruction -- `vmaxnm.f64 q0,q1,q2'
[^:]*:5: Error: bad type in SIMD instruction -- `vmaxnm.i16 q0,q1,q2'
[^:]*:6: Error: bad type in SIMD instruction -- `vminnm.f64 q0,q1,q2'
[^:]*:7: Error: bad type in SIMD instruction -- `vminnm.i16 q0,q1,q2'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vmaxnmeq.f32 q0,q1,q2'
[^:]*:18: Error: syntax error -- `vmaxnmeq.f32 q0,q1,q2'
[^:]*:20: Error: syntax error -- `vmaxnmeq.f32 q0,q1,q2'

18
gas/testsuite/gas/arm/mve-vmaxnm-vminnm-bad.s
View File

@@ -1,18 +1,18 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().f16 q0, q1, q2
.endr
.endm
.syntax unified
.thumb
vmaxnm.f64 q0, q1, q2
vmaxnm.i16 q0, q1, q2
vminnm.f64 q0, q1, q2
vminnm.i16 q0, q1, q2
cond vmaxnm
cond vminnm
.irp op, vmaxnm, vminnm
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().f16 q0, q1, q2
.endr
.endr
it eq
vmaxnmeq.f32 q0, q1, q2
vmaxnmeq.f32 q0, q1, q2

32
gas/testsuite/gas/arm/mve-vmaxnma-vminnma-bad.l
View File

@@ -1,20 +1,20 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmaxnma.f64 q0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vmaxnma.i16 q0,q1'
[^:]*:12: Error: bad type in SIMD instruction -- `vminnma.f64 q0,q1'
[^:]*:13: Error: bad type in SIMD instruction -- `vminnma.i16 q0,q1'
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: bad type in SIMD instruction -- `vmaxnma.f64 q0,q1'
[^:]*:5: Error: bad type in SIMD instruction -- `vmaxnma.i16 q0,q1'
[^:]*:6: Error: bad type in SIMD instruction -- `vminnma.f64 q0,q1'
[^:]*:7: Error: bad type in SIMD instruction -- `vminnma.i16 q0,q1'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vmaxnmaeq.f32 q0,q1'
[^:]*:18: Error: syntax error -- `vmaxnmaeq.f32 q0,q1'
[^:]*:20: Error: syntax error -- `vmaxnmaeq.f32 q0,q1'

18
gas/testsuite/gas/arm/mve-vmaxnma-vminnma-bad.s
View File

@@ -1,18 +1,18 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().f16 q0, q1
.endr
.endm
.syntax unified
.thumb
vmaxnma.f64 q0, q1
vmaxnma.i16 q0, q1
vminnma.f64 q0, q1
vminnma.i16 q0, q1
cond vmaxnma
cond vminnma
.irp op, vmaxnma, vminnma
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().f16 q0, q1
.endr
.endr
it eq
vmaxnmaeq.f32 q0, q1
vmaxnmaeq.f32 q0, q1

72
gas/testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.l
View File

@@ -1,40 +1,40 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmaxnmv.f64 r0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vmaxnmv.i16 r0,q1'
[^:]*:12: Error: bad type in SIMD instruction -- `vminnmv.f64 r0,q1'
[^:]*:13: Error: bad type in SIMD instruction -- `vminnmv.i16 r0,q1'
[^:]*:14: Error: bad type in SIMD instruction -- `vmaxnmav.f64 r0,q1'
[^:]*:15: Error: bad type in SIMD instruction -- `vmaxnmav.i16 r0,q1'
[^:]*:16: Error: bad type in SIMD instruction -- `vminnmav.f64 r0,q1'
[^:]*:17: Error: bad type in SIMD instruction -- `vminnmav.i16 r0,q1'
[^:]*:18: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:19: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:20: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:21: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: bad type in SIMD instruction -- `vmaxnmv.f64 r0,q1'
[^:]*:5: Error: bad type in SIMD instruction -- `vmaxnmv.i16 r0,q1'
[^:]*:6: Error: bad type in SIMD instruction -- `vminnmv.f64 r0,q1'
[^:]*:7: Error: bad type in SIMD instruction -- `vminnmv.i16 r0,q1'
[^:]*:8: Error: bad type in SIMD instruction -- `vmaxnmav.f64 r0,q1'
[^:]*:9: Error: bad type in SIMD instruction -- `vmaxnmav.i16 r0,q1'
[^:]*:10: Error: bad type in SIMD instruction -- `vminnmav.f64 r0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vminnmav.i16 r0,q1'
[^:]*:12: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:13: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:14: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:15: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Error: syntax error -- `vmaxnmveq.f32 r0,q1'
[^:]*:28: Error: syntax error -- `vmaxnmveq.f32 r0,q1'
[^:]*:30: Error: syntax error -- `vmaxnmveq.f32 r0,q1'

22
gas/testsuite/gas/arm/mve-vmaxnmv-vminnmv-bad.s
View File

@@ -1,12 +1,6 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().f16 r0, q1
.endr
.endm
.syntax unified
.thumb
vmaxnmv.f64 r0, q1
vmaxnmv.i16 r0, q1
vminnmv.f64 r0, q1
@@ -19,10 +13,16 @@ vmaxnmv.f16 sp, q1
vmaxnmav.f32 pc, q1
vminnmav.f16 sp, q1
vminnmv.f32 pc, q1
cond vmaxnmv
cond vminnmv
cond vmaxnmav
cond vminnmav
.irp op, vmaxnmv, vminnmv, vmaxnmav, vminnmav
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().f16 r0, q1
.endr
.endr
it eq
vmaxnmveq.f32 r0, q1
vmaxnmveq.f32 r0, q1

72
gas/testsuite/gas/arm/mve-vmaxv-vminv-bad.l
View File

@@ -1,40 +1,40 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmaxv.u64 r0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vmaxv.f16 r0,q1'
[^:]*:12: Error: bad type in SIMD instruction -- `vminv.s64 r0,q1'
[^:]*:13: Error: bad type in SIMD instruction -- `vminv.f32 r0,q1'
[^:]*:14: Error: bad type in SIMD instruction -- `vmaxav.u16 r0,q1'
[^:]*:15: Error: bad type in SIMD instruction -- `vmaxav.f32 r0,q1'
[^:]*:16: Error: bad type in SIMD instruction -- `vminav.u32 r0,q1'
[^:]*:17: Error: bad type in SIMD instruction -- `vminav.f16 r0,q1'
[^:]*:18: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:19: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:20: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:21: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: bad type in SIMD instruction -- `vmaxv.u64 r0,q1'
[^:]*:5: Error: bad type in SIMD instruction -- `vmaxv.f16 r0,q1'
[^:]*:6: Error: bad type in SIMD instruction -- `vminv.s64 r0,q1'
[^:]*:7: Error: bad type in SIMD instruction -- `vminv.f32 r0,q1'
[^:]*:8: Error: bad type in SIMD instruction -- `vmaxav.u16 r0,q1'
[^:]*:9: Error: bad type in SIMD instruction -- `vmaxav.f32 r0,q1'
[^:]*:10: Error: bad type in SIMD instruction -- `vminav.u32 r0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vminav.f16 r0,q1'
[^:]*:12: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:13: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:14: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:15: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Error: syntax error -- `vmaxveq.s32 r0,q1'
[^:]*:28: Error: syntax error -- `vmaxveq.s32 r0,q1'
[^:]*:30: Error: syntax error -- `vmaxveq.s32 r0,q1'

22
gas/testsuite/gas/arm/mve-vmaxv-vminv-bad.s
View File

@@ -1,12 +1,6 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1
.endr
.endm
.syntax unified
.thumb
vmaxv.u64 r0, q1
vmaxv.f16 r0, q1
vminv.s64 r0, q1
@@ -19,10 +13,16 @@ vmaxv.s32 sp, q1
vmaxav.s32 pc, q1
vminv.s32 pc, q1
vminav.s32 sp, q1
cond vmaxv
cond vmaxav
cond vminv
cond vminav
.irp op, vmaxv, vmaxav, vminv, vminav
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1
.endr
.endr
it eq
vmaxveq.s32 r0, q1
vmaxveq.s32 r0, q1

22
gas/testsuite/gas/arm/mve-vmla-bad.l
View File

@@ -1,15 +1,15 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmla.f16 q0,q1,r2'
[^:]*:11: Error: bad type in SIMD instruction -- `vmla.s64 q0,q1,r2'
[^:]*:12: Error: selected FPU does not support instruction -- `vmla.s32 q0,q1,q2'
[^:]*:13: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:14: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vmla.f16 q0,q1,r2'
[^:]*:4: Error: bad type in SIMD instruction -- `vmla.s64 q0,q1,r2'
[^:]*:5: Error: selected FPU does not support instruction -- `vmla.s32 q0,q1,q2'
[^:]*:6: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:7: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vmlaeq.u16 q0,q1,r2'
[^:]*:18: Error: syntax error -- `vmlaeq.u16 q0,q1,r2'
[^:]*:20: Error: syntax error -- `vmlaeq.u16 q0,q1,r2'

16
gas/testsuite/gas/arm/mve-vmla-bad.s
View File

@@ -1,10 +1,3 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmla.s16 q0, q1, r2
.endr
.endm
.syntax unified
.thumb
vmla.f16 q0, q1, r2
@@ -12,7 +5,14 @@ vmla.s64 q0, q1, r2
vmla.s32 q0, q1, q2
vmla.s32 q0, q1, sp
vmla.s32 q0, q1, pc
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmla.s16 q0, q1, r2
.endr
it eq
vmlaeq.u16 q0, q1, r2
vmlaeq.u16 q0, q1, r2

48
gas/testsuite/gas/arm/mve-vmladav-bad.l
View File

@@ -1,28 +1,28 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:8: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Error: bad type in SIMD instruction -- `vmladav.s64 r0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vmladav.f32 r0,q1,q2'
[^:]*:16: Error: bad type in SIMD instruction -- `vmladava.s64 r0,q1,q2'

22
gas/testsuite/gas/arm/mve-vmladav-bad.s
View File

@@ -1,16 +1,16 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1, q2
.endr
.endm
.syntax unified
.thumb
cond vmladav
cond vmladava
cond vmladavx
cond vmladavax
.irp op, vmladav, vmladava, vmladavx, vmladavax
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1, q2
.endr
.endr
vmladav.s64 r0, q1, q2
vmladav.f32 r0, q1, q2
vmladava.s64 r0, q1, q2

50
gas/testsuite/gas/arm/mve-vmlaldav-bad.l
View File

@@ -1,29 +1,29 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Error: bad type in SIMD instruction -- `vmlaldav.s64 r0,r1,q1,q2'
[^:]*:16: Error: bad type in SIMD instruction -- `vmlaldav.f32 r0,r1,q1,q2'
[^:]*:17: Error: bad type in SIMD instruction -- `vmlaldav.s8 r0,r1,q1,q2'

22
gas/testsuite/gas/arm/mve-vmlaldav-bad.s
View File

@@ -1,17 +1,17 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, r1, q1, q2
.endr
.endm
.syntax unified
.thumb
vmlaldav.s16 r0, sp, q1, q2
cond vmlaldav
cond vmlaldava
cond vmlaldavx
cond vmlaldavax
.irp op, vmlaldav, vmlaldava, vmlaldavx, vmlaldavax
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, r1, q1, q2
.endr
.endr
vmlaldav.s64 r0, r1, q1, q2
vmlaldav.f32 r0, r1, q1, q2
vmlaldav.s8 r0, r1, q1, q2

24
gas/testsuite/gas/arm/mve-vmlalv-bad.l
View File

@@ -1,16 +1,16 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: bad type in SIMD instruction -- `vmlalv.s64 r0,r1,q1,q2'
[^:]*:13: Error: bad type in SIMD instruction -- `vmlalv.f32 r0,r1,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vmlalv.s8 r0,r1,q1,q2'

18
gas/testsuite/gas/arm/mve-vmlalv-bad.s
View File

@@ -1,14 +1,14 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, r1, q1, q2
.endr
.endm
.syntax unified
.thumb
cond vmlalv
cond vmlalva
.irp op, vmlalv, vmlalva
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, r1, q1, q2
.endr
.endr
vmlalv.s64 r0, r1, q1, q2
vmlalv.f32 r0, r1, q1, q2
vmlalv.s8 r0, r1, q1, q2

20
gas/testsuite/gas/arm/mve-vmlas-bad.l
View File

@@ -1,14 +1,14 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmlas.s64 q0,q1,r2'
[^:]*:11: Error: bad type in SIMD instruction -- `vmlas.f32 q0,q1,r2'
[^:]*:12: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:13: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vmlas.s64 q0,q1,r2'
[^:]*:4: Error: bad type in SIMD instruction -- `vmlas.f32 q0,q1,r2'
[^:]*:5: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:6: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Error: syntax error -- `vmlaseq.s16 q0,q1,r2'
[^:]*:17: Error: syntax error -- `vmlaseq.s16 q0,q1,r2'
[^:]*:19: Error: syntax error -- `vmlaseq.s16 q0,q1,r2'

16
gas/testsuite/gas/arm/mve-vmlas-bad.s
View File

@@ -1,17 +1,17 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmlas.s16 q0, q1, r2
.endr
.endm
.syntax unified
.thumb
vmlas.s64 q0, q1, r2
vmlas.f32 q0, q1, r2
vmlas.u32 q0, q1, sp
vmlas.u32 q0, q1, pc
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmlas.s16 q0, q1, r2
.endr
it eq
vmlaseq.s16 q0, q1, r2
vmlaseq.s16 q0, q1, r2

24
gas/testsuite/gas/arm/mve-vmlav-bad.l
View File

@@ -1,16 +1,16 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: bad type in SIMD instruction -- `vmlav.s64 r0,q1,q2'
[^:]*:13: Error: bad type in SIMD instruction -- `vmlav.f32 r0,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vmlava.s64 r0,q1,q2'

18
gas/testsuite/gas/arm/mve-vmlav-bad.s
View File

@@ -1,14 +1,14 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1, q2
.endr
.endm
.syntax unified
.thumb
cond vmlav
cond vmlava
.irp op, vmlav, vmlava
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1, q2
.endr
.endr
vmlav.s64 r0, q1, q2
vmlav.f32 r0, q1, q2
vmlava.s64 r0, q1, q2

52
gas/testsuite/gas/arm/mve-vmlsdav-bad.l
View File

@@ -1,30 +1,30 @@
[^:]*: Assembler messages:
[^:]*:10: Error: Odd register not allowed here -- `vmlsdav.s16 r1,q1,q2'
[^:]*:11: Error: bad type in SIMD instruction -- `vmlsdav.u16 r0,q1,q2'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Error: Odd register not allowed here -- `vmlsdav.s16 r1,q1,q2'
[^:]*:5: Error: bad type in SIMD instruction -- `vmlsdav.u16 r0,q1,q2'
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Error: syntax error -- `vmlsdaveq.s16 r0,q1,q2'
[^:]*:18: Error: syntax error -- `vmlsdaveq.s16 r0,q1,q2'
[^:]*:20: Error: syntax error -- `vmlsdaveq.s16 r0,q1,q2'

22
gas/testsuite/gas/arm/mve-vmlsdav-bad.s
View File

@@ -1,18 +1,18 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1, q2
.endr
.endm
.syntax unified
.thumb
vmlsdav.s16 r1, q1, q2
vmlsdav.u16 r0, q1, q2
cond vmlsdav
cond vmlsdava
cond vmlsdavx
cond vmlsdavax
.irp op, vmlsdav, vmlsdava, vmlsdavx, vmlsdavax
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, q1, q2
.endr
.endr
it eq
vmlsdaveq.s16 r0, q1, q2
vmlsdaveq.s16 r0, q1, q2

52
gas/testsuite/gas/arm/mve-vmlsldav-bad.l
View File

@@ -1,30 +1,30 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:11: Error: bad type in SIMD instruction -- `vmlsldav.u16 r0,r1,q1,q2'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:4: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:5: Error: bad type in SIMD instruction -- `vmlsldav.u16 r0,r1,q1,q2'
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Error: bad type in SIMD instruction -- `vmlsldav.s64 r0,r1,q1,q2'
[^:]*:17: Error: bad type in SIMD instruction -- `vmlsldav.f32 r0,r1,q1,q2'
[^:]*:18: Error: bad type in SIMD instruction -- `vmlsldav.s8 r0,r1,q1,q2'

22
gas/testsuite/gas/arm/mve-vmlsldav-bad.s
View File

@@ -1,18 +1,18 @@
.macro cond, op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, r1, q1, q2
.endr
.endm
.syntax unified
.thumb
vmlsldav.s16 r0, sp, q1, q2
vmlsldav.u16 r0, r1, q1, q2
cond vmlsldav
cond vmlsldava
cond vmlsldavx
cond vmlsldavax
.irp op, vmlsldav, vmlsldava, vmlsldavx, vmlsldavax
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s16 r0, r1, q1, q2
.endr
.endr
vmlsldav.s64 r0, r1, q1, q2
vmlsldav.f32 r0, r1, q1, q2
vmlsldav.s8 r0, r1, q1, q2

40
gas/testsuite/gas/arm/mve-vmul-bad-1.l
View File

@@ -1,24 +1,24 @@
[^:]*: Assembler messages:
[^:]*:10: Error: selected FPU does not support instruction -- `vmul.f16 q0,q1,q2'
[^:]*:11: Error: selected FPU does not support instruction -- `vmul.f16 q0,q1,r2'
[^:]*:12: Error: selected FPU does not support instruction -- `vmul.f32 q0,q1,q2'
[^:]*:13: Error: selected FPU does not support instruction -- `vmul.f32 q0,q1,r2'
[^:]*:14: Error: bad type in SIMD instruction -- `vmul.i64 q0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vmul.i64 q0,q1,r2'
[^:]*:16: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:17: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: selected FPU does not support instruction -- `vmul.f16 q0,q1,q2'
[^:]*:4: Error: selected FPU does not support instruction -- `vmul.f16 q0,q1,r2'
[^:]*:5: Error: selected FPU does not support instruction -- `vmul.f32 q0,q1,q2'
[^:]*:6: Error: selected FPU does not support instruction -- `vmul.f32 q0,q1,r2'
[^:]*:7: Error: bad type in SIMD instruction -- `vmul.i64 q0,q1,q2'
[^:]*:8: Error: bad type in SIMD instruction -- `vmul.i64 q0,q1,r2'
[^:]*:9: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:10: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Error: syntax error -- `vmuleq.i32 q0,q1,q2'
[^:]*:22: Error: syntax error -- `vmuleq.i32 q0,q1,q2'
[^:]*:24: Error: syntax error -- `vmuleq.i32 q0,q1,q2'

18
gas/testsuite/gas/arm/mve-vmul-bad-1.s
View File

@@ -1,10 +1,3 @@
.macro cond lastreg
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmul.i16 q0, q1, \lastreg
.endr
.endm
.syntax unified
.thumb
vmul.f16 q0, q1, q2
@@ -15,8 +8,15 @@ vmul.i64 q0, q1, q2
vmul.i64 q0, q1, r2
vmul.i8 q0, q1, pc
vmul.i8 q0, q1, sp
cond q2
cond r2
.irp lastreg, q2, r2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmul.i16 q0, q1, \lastreg
.endr
.endr
it eq
vmuleq.i32 q0, q1, q2
vmuleq.i32 q0, q1, q2

36
gas/testsuite/gas/arm/mve-vmulh-bad.l
View File

@@ -1,22 +1,22 @@
[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmulh.f16 q0,q1,q2'
[^:]*:11: Error: bad type in SIMD instruction -- `vmulh.i32 q0,q1,q2'
[^:]*:12: Error: bad type in SIMD instruction -- `vmulh.s64 q0,q1,q2'
[^:]*:13: Error: bad type in SIMD instruction -- `vrmulh.f16 q0,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vrmulh.i32 q0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vrmulh.s64 q0,q1,q2'
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: bad type in SIMD instruction -- `vmulh.f16 q0,q1,q2'
[^:]*:4: Error: bad type in SIMD instruction -- `vmulh.i32 q0,q1,q2'
[^:]*:5: Error: bad type in SIMD instruction -- `vmulh.s64 q0,q1,q2'
[^:]*:6: Error: bad type in SIMD instruction -- `vrmulh.f16 q0,q1,q2'
[^:]*:7: Error: bad type in SIMD instruction -- `vrmulh.i32 q0,q1,q2'
[^:]*:8: Error: bad type in SIMD instruction -- `vrmulh.s64 q0,q1,q2'
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
[^:]*:20: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
[^:]*:22: Error: syntax error -- `vmulheq.s16 q0,q1,q2'

18
gas/testsuite/gas/arm/mve-vmulh-bad.s
View File

@@ -1,10 +1,3 @@
.macro cond op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().u16 q0, q1, q2
.endr
.endm
.syntax unified
.thumb
vmulh.f16 q0, q1, q2
@@ -13,8 +6,15 @@ vmulh.s64 q0, q1, q2
vrmulh.f16 q0, q1, q2
vrmulh.i32 q0, q1, q2
vrmulh.s64 q0, q1, q2
cond vmulh
cond vrmulh
.irp op, vmulh, vrmulh
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().u16 q0, q1, q2
.endr
.endr
it eq
vmulheq.s16 q0, q1, q2
vmulheq.s16 q0, q1, q2

64
gas/testsuite/gas/arm/mve-vmullbt-bad.l
View File

@@ -1,33 +1,33 @@
[^:]*: Assembler messages:
[^:]*:13: Error: bad type in SIMD instruction -- `vmullb.s64 q0,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vmullb.f16 q0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vmullb.f32 q0,q1,q2'
[^:]*:16: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:17: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: bad type in SIMD instruction -- `vmullt.s64 q0,q1,q2'
[^:]*:20: Error: bad type in SIMD instruction -- `vmullt.f16 q0,q1,q2'
[^:]*:21: Error: bad type in SIMD instruction -- `vmullt.f32 q0,q1,q2'
[^:]*:22: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:23: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:27: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:29: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:31: Error: instruction missing MVE vector predication code -- `vmullb.s32 q0,q1,q2'
[^:]*:32: Error: vector predicated instruction should be in VPT/VPST block -- `vmullbt.s32 q0,q1,q2'
[^:]*:34: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:35: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:37: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:39: Error: instruction missing MVE vector predication code -- `vmullt.s32 q0,q1,q2'
[^:]*:40: Error: vector predicated instruction should be in VPT/VPST block -- `vmulltt.s32 q0,q1,q2'
[^:]*:6: Error: bad type in SIMD instruction -- `vmullb.s64 q0,q1,q2'
[^:]*:7: Error: bad type in SIMD instruction -- `vmullb.f16 q0,q1,q2'
[^:]*:8: Error: bad type in SIMD instruction -- `vmullb.f32 q0,q1,q2'
[^:]*:9: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:10: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:6: Error: bad type in SIMD instruction -- `vmullt.s64 q0,q1,q2'
[^:]*:7: Error: bad type in SIMD instruction -- `vmullt.f16 q0,q1,q2'
[^:]*:8: Error: bad type in SIMD instruction -- `vmullt.f32 q0,q1,q2'
[^:]*:9: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:10: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:19: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:21: Error: syntax error -- `vmullbeq.s32 q0,q1,q2'
[^:]*:23: Error: instruction missing MVE vector predication code -- `vmullb.s32 q0,q1,q2'
[^:]*:24: Error: vector predicated instruction should be in VPT/VPST block -- `vmullbt.s32 q0,q1,q2'
[^:]*:26: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:27: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:29: Error: syntax error -- `vmullteq.s32 q0,q1,q2'
[^:]*:31: Error: instruction missing MVE vector predication code -- `vmullt.s32 q0,q1,q2'
[^:]*:32: Error: vector predicated instruction should be in VPT/VPST block -- `vmulltt.s32 q0,q1,q2'

34
gas/testsuite/gas/arm/mve-vmullbt-bad.s
View File

@@ -1,27 +1,19 @@
.macro cond op
.irp cond, eq, ne, gt, ge, lt, le
it \cond
\op\().s32 q0, q1, q2
.endr
.endm
.syntax unified
.text
.thumb
vmullb.s64 q0, q1, q2
vmullb.f16 q0, q1, q2
vmullb.f32 q0, q1, q2
vmullb.s32 q1, q1, q2
vmullb.s32 q2, q1, q2
cond vmullb
vmullt.s64 q0, q1, q2
vmullt.f16 q0, q1, q2
vmullt.f32 q0, q1, q2
vmullt.u32 q1, q1, q2
vmullt.u32 q2, q1, q2
cond vmullt
.irp bt, b, t
vmull\bt\().s64 q0, q1, q2
vmull\bt\().f16 q0, q1, q2
vmull\bt\().f32 q0, q1, q2
vmull\bt\().s32 q1, q1, q2
vmull\bt\().s32 q2, q1, q2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmull\bt\().s32 q0, q1, q2
.endr
.endr
it eq
vmullbeq.s32 q0, q1, q2
vmullbeq.s32 q0, q1, q2

28
gas/testsuite/gas/arm/mve-vmvn-bad.l
View File

@@ -1,18 +1,18 @@
[^:]*: Assembler messages:
[^:]*:10: Error: invalid instruction shape -- `vmvn.i16 d0,d1'
[^:]*:11: Error: immediate out of range -- `vmvn.i32 q0,#0x1ef'
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:3: Error: invalid instruction shape -- `vmvn.i16 d0,d1'
[^:]*:4: Error: immediate out of range -- `vmvn.i32 q0,#0x1ef'
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:9: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:15: Error: syntax error -- `vmvneq q0,q1'
[^:]*:16: Error: syntax error -- `vmvneq q0,q1'
[^:]*:18: Error: syntax error -- `vmvneq q0,q1'

18
gas/testsuite/gas/arm/mve-vmvn-bad.s
View File

@@ -1,16 +1,16 @@
.macro cond lastop
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmvn.i16 q0, \lastop
.endr
.endm
.syntax unified
.thumb
vmvn.i16 d0, d1
vmvn.i32 q0, #0x1ef
cond q1
cond #0
.irp lastop, q1, #1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vmvn.i16 q0, \lastop
.endr
.endr
it eq
vmvneq q0, q1
vmvneq q0, q1

34
gas/testsuite/gas/arm/mve-vorn-bad.l
View File

@@ -1,21 +1,21 @@
[^:]*: Assembler messages:
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: syntax error -- `vorneq q0,q1,q2'
[^:]*:20: Error: syntax error -- `vorneq q0,q1,q2'
[^:]*:22: Error: syntax error -- `vorneq q0,q1,q2'
[^:]*:24: Error: instruction missing MVE vector predication code -- `vorn q0,q1,q2'
[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vornt q0,q1,q2'
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: syntax error -- `vorneq q0,q1,q2'
[^:]*:13: Error: syntax error -- `vorneq q0,q1,q2'
[^:]*:15: Error: syntax error -- `vorneq q0,q1,q2'
[^:]*:17: Error: instruction missing MVE vector predication code -- `vorn q0,q1,q2'
[^:]*:18: Error: vector predicated instruction should be in VPT/VPST block -- `vornt q0,q1,q2'
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Error: syntax error -- `vorneq.i16 q0,#255'
[^:]*:29: Error: syntax error -- `vorneq.i16 q0,#255'
[^:]*:31: Error: syntax error -- `vorneq.i16 q0,#255'

32
gas/testsuite/gas/arm/mve-vorn-bad.s
View File

@@ -1,20 +1,13 @@
.macro cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorn q0, q1, q2
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorn.i16 q0, #255
.endr
.endm
.syntax unified
.thumb
cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorn q0, q1, q2
.endr
it eq
vorneq q0, q1, q2
vorneq q0, q1, q2
@@ -23,7 +16,14 @@ vorneq q0, q1, q2
vpst
vorn q0, q1, q2
vornt q0, q1, q2
cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorn.i16 q0, #255
.endr
it eq
vorneq.i16 q0, #255
vorneq.i16 q0, #255

34
gas/testsuite/gas/arm/mve-vorr-bad.l
View File

@@ -1,21 +1,21 @@
[^:]*: Assembler messages:
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: syntax error -- `vorreq q0,q1,q2'
[^:]*:20: Error: syntax error -- `vorreq q0,q1,q2'
[^:]*:22: Error: syntax error -- `vorreq q0,q1,q2'
[^:]*:24: Error: instruction missing MVE vector predication code -- `vorr q0,q1,q2'
[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vorrt q0,q1,q2'
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: syntax error -- `vorreq q0,q1,q2'
[^:]*:13: Error: syntax error -- `vorreq q0,q1,q2'
[^:]*:15: Error: syntax error -- `vorreq q0,q1,q2'
[^:]*:17: Error: instruction missing MVE vector predication code -- `vorr q0,q1,q2'
[^:]*:18: Error: vector predicated instruction should be in VPT/VPST block -- `vorrt q0,q1,q2'
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:28: Error: syntax error -- `vorreq.i16 q0,#255'
[^:]*:29: Error: syntax error -- `vorreq.i16 q0,#255'
[^:]*:31: Error: syntax error -- `vorreq.i16 q0,#255'

32
gas/testsuite/gas/arm/mve-vorr-bad.s
View File

@@ -1,20 +1,13 @@
.macro cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorr q0, q1, q2
.endr
.endm
.macro cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorr.i16 q0, #255
.endr
.endm
.syntax unified
.thumb
cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorr q0, q1, q2
.endr
it eq
vorreq q0, q1, q2
vorreq q0, q1, q2
@@ -23,7 +16,14 @@ vorreq q0, q1, q2
vpst
vorr q0, q1, q2
vorrt q0, q1, q2
cond2
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vorr.i16 q0, #255
.endr
it eq
vorreq.i16 q0, #255
vorreq.i16 q0, #255

12
gas/testsuite/gas/arm/mve-vpnot-bad.l
View File

@@ -1,10 +1,10 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: syntax error -- `vpnoteq'
[^:]*:13: Error: syntax error -- `vpnoteq'
[^:]*:15: Error: syntax error -- `vpnoteq'

16
gas/testsuite/gas/arm/mve-vpnot-bad.s
View File

@@ -1,13 +1,13 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vpnot
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vpnot
.endr
it eq
vpnoteq
vpnoteq

12
gas/testsuite/gas/arm/mve-vpsel-bad.l
View File

@@ -1,10 +1,10 @@
[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:7: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
[^:]*:13: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
[^:]*:15: Error: syntax error -- `vpseleq.i16 q0,q1,q2'

16
gas/testsuite/gas/arm/mve-vpsel-bad.s
View File

@@ -1,13 +1,13 @@
.macro cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vpsel.i16 q0, q1, q2
.endr
.endm
.syntax unified
.thumb
cond
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vpsel.i16 q0, q1, q2
.endr
it eq
vpseleq.i16 q0, q1, q2
vpseleq.i16 q0, q1, q2

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