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ARM print_insn_mve assertion

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This corrects objdump -d -m armv8.1-m.main output for a testcase found
by oss-fuzz, .inst 0xee2fee79, which hits an assertion.

Obviously the switch case constants should be binary, not hex.
Correcting that is enough to cure this assertion, but I don't see any
point in singling out the invalid case 0b10.  In fact, it is just plain
wrong to print "undefined instruction: size equals zero    undefined
instruction: size equals two".

I also don't see the need for defensive programming here as is done
elsewhere in checking that "value" is in range before indexing
mve_vec_sizename.  There is exactly one MVE_VSHLL_T2 entry in
mve_opcodes.  It is easy to verify that "value" is only two bits.
This commit is contained in:
Alan Modra
2024-07-26 08:49:48 +09:30
parent 5a7f5aa29b
commit e26ff6c44e
1 changed files with 2 additions and 17 deletions
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19
opcodes/arm-dis.c
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@@ -9887,23 +9887,8 @@ print_insn_mve (struct disassemble_info *info, long given)
if (mve_shift_insn_p (insn->mve_op))
print_mve_shift_n (info, given, insn->mve_op);
else if (insn->mve_op == MVE_VSHLL_T2)
{
switch (value)
{
case 0x00:
func (stream, dis_style_immediate, "8");
break;
case 0x01:
func (stream, dis_style_immediate, "16");
break;
case 0x10:
print_mve_undefined (info, UNDEF_SIZE_0);
break;
default:
assert (0);
break;
}
}
func (stream, dis_style_immediate, "%s",
mve_vec_sizename[value]);
else
{
if (insn->mve_op == MVE_VSHLC && value == 0)