forked from Imagelibrary/binutils-gdb
x86: further re-work insn/suffix recognition to also cover MOVSX
PR gas/29524 Having templates with a suffix explicitly present has always been quirky. After prior adjustment all that's left to also eliminate the anomaly from move-with-sign-extend is to consolidate the insn templates and to make may_need_pass2() cope (plus extend testsuite coverage).
This commit is contained in:
@@ -4860,7 +4860,11 @@ static INLINE bool may_need_pass2 (const insn_template *t)
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{
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return t->opcode_modifier.sse2avx
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/* Note that all SSE2AVX templates have at least one operand. */
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&& t->operand_types[t->operands - 1].bitfield.class == RegSIMD;
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? t->operand_types[t->operands - 1].bitfield.class == RegSIMD
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: (t->opcode_modifier.opcodespace == SPACE_0F
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&& (t->base_opcode | 1) == 0xbf)
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|| (t->opcode_modifier.opcodespace == SPACE_BASE
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&& t->base_opcode == 0x63);
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}
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/* This is the guts of the machine-dependent assembler. LINE points to a
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@@ -73,6 +73,7 @@ if [gas_32_check] then {
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run_dump_test "amd"
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run_dump_test "katmai"
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run_dump_test "jump"
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run_dump_test "movs32"
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run_dump_test "movz32"
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run_dump_test "relax-1"
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run_dump_test "relax-2"
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@@ -820,6 +821,7 @@ if [gas_64_check] then {
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run_dump_test "x86-64-segovr"
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run_list_test "x86-64-inval-seg" "-al"
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run_dump_test "x86-64-branch"
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run_dump_test "movs64"
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run_dump_test "movz64"
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run_dump_test "x86-64-relax-1"
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run_dump_test "svme64"
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39
gas/testsuite/gas/i386/movs.s
Normal file
39
gas/testsuite/gas/i386/movs.s
Normal file
@@ -0,0 +1,39 @@
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.text
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movs:
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movsb %al,%ax
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movsb (%eax),%ax
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movsb %al,%eax
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movsb (%eax),%eax
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.ifdef x86_64
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movsb %al,%rax
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movsb (%rax),%rax
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.endif
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movsbw %al,%ax
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movsbw (%eax),%ax
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movsbl %al,%eax
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movsbl (%eax),%eax
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.ifdef x86_64
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movsbq %al,%rax
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movsbq (%rax),%rax
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.endif
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movsw %ax,%eax
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movsw (%eax),%eax
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.ifdef x86_64
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movsw %ax,%rax
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movsw (%rax),%rax
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.endif
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movswl %ax,%eax
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movswl (%eax),%eax
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.ifdef x86_64
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movswq %ax,%rax
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movswq (%rax),%rax
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movsl %eax,%rax
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movsl (%rax),%rax
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movslq %eax,%rax
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movslq (%rax),%rax
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.endif
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22
gas/testsuite/gas/i386/movs32.d
Normal file
22
gas/testsuite/gas/i386/movs32.d
Normal file
@@ -0,0 +1,22 @@
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#objdump: -dw
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#source: movs.s
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#name: x86 mov with sign-extend (32-bit object)
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.*: +file format .*
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Disassembly of section .text:
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0+ <movs>:
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[ ]*[a-f0-9]+: 66 0f be c0 * movsbw %al,%ax
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[ ]*[a-f0-9]+: 66 0f be 00 * movsbw \(%eax\),%ax
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[ ]*[a-f0-9]+: 0f be c0 * movsbl %al,%eax
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[ ]*[a-f0-9]+: 0f be 00 * movsbl \(%eax\),%eax
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[ ]*[a-f0-9]+: 66 0f be c0 * movsbw %al,%ax
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[ ]*[a-f0-9]+: 66 0f be 00 * movsbw \(%eax\),%ax
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[ ]*[a-f0-9]+: 0f be c0 * movsbl %al,%eax
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[ ]*[a-f0-9]+: 0f be 00 * movsbl \(%eax\),%eax
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[ ]*[a-f0-9]+: 0f bf c0 * movswl %ax,%eax
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[ ]*[a-f0-9]+: 0f bf 00 * movswl \(%eax\),%eax
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[ ]*[a-f0-9]+: 0f bf c0 * movswl %ax,%eax
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[ ]*[a-f0-9]+: 0f bf 00 * movswl \(%eax\),%eax
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#pass
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30
gas/testsuite/gas/i386/movs64.d
Normal file
30
gas/testsuite/gas/i386/movs64.d
Normal file
@@ -0,0 +1,30 @@
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#objdump: -dw
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#source: movs.s
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#name: x86 mov with sign-extend (64-bit object)
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.*: +file format .*
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Disassembly of section .text:
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0+ <movs>:
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[ ]*[a-f0-9]+: 66 0f be c0 * movsbw %al,%ax
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[ ]*[a-f0-9]+: 67 66 0f be 00 * movsbw \(%eax\),%ax
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[ ]*[a-f0-9]+: 0f be c0 * movsbl %al,%eax
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[ ]*[a-f0-9]+: 67 0f be 00 * movsbl \(%eax\),%eax
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[ ]*[a-f0-9]+: 48 0f be c0 * movsbq %al,%rax
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[ ]*[a-f0-9]+: 48 0f be 00 * movsbq \(%rax\),%rax
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[ ]*[a-f0-9]+: 66 0f be c0 * movsbw %al,%ax
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[ ]*[a-f0-9]+: 67 66 0f be 00 * movsbw \(%eax\),%ax
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[ ]*[a-f0-9]+: 0f be c0 * movsbl %al,%eax
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[ ]*[a-f0-9]+: 67 0f be 00 * movsbl \(%eax\),%eax
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[ ]*[a-f0-9]+: 48 0f be c0 * movsbq %al,%rax
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[ ]*[a-f0-9]+: 48 0f be 00 * movsbq \(%rax\),%rax
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[ ]*[a-f0-9]+: 0f bf c0 * movswl %ax,%eax
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[ ]*[a-f0-9]+: 67 0f bf 00 * movswl \(%eax\),%eax
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[ ]*[a-f0-9]+: 48 0f bf c0 * movswq %ax,%rax
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[ ]*[a-f0-9]+: 48 0f bf 00 * movswq \(%rax\),%rax
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[ ]*[a-f0-9]+: 0f bf c0 * movswl %ax,%eax
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[ ]*[a-f0-9]+: 67 0f bf 00 * movswl \(%eax\),%eax
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[ ]*[a-f0-9]+: 48 0f bf c0 * movswq %ax,%rax
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[ ]*[a-f0-9]+: 48 0f bf 00 * movswq \(%rax\),%rax
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#pass
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@@ -41,11 +41,11 @@
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %cl
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %cl
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsb %al, %cx
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[ ]*[1-9][0-9]* \?\?\?\? 0FBEC8[ ]+movsb %al, %cx
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %cx
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsb %al, %ecx
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[ ]*[1-9][0-9]* \?\?\?\? 660FBEC8[ ]+movsb %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %ecx
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[ ]*[1-9][0-9]*[ ]*
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@@ -82,7 +82,7 @@
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[ ]*[1-9][0-9]*[ ]+movsw %eax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsw %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movsw %ax, %ecx
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[ ]*[1-9][0-9]* \?\?\?\? 660FBFC8[ ]+movsw %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsw %eax, %ecx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movswl %al, %cl
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@@ -41,11 +41,11 @@
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %cl
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %cl
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsb %al, %cx
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[ ]*[1-9][0-9]* \?\?\?\? 660FBEC8[ ]+movsb %al, %cx
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %cx
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsb %al, %ecx
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[ ]*[1-9][0-9]* \?\?\?\? 0FBEC8[ ]+movsb %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %ecx
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[ ]*[1-9][0-9]*[ ]*
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@@ -82,7 +82,7 @@
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[ ]*[1-9][0-9]*[ ]+movsw %eax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsw %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movsw %ax, %ecx
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[ ]*[1-9][0-9]* \?\?\?\? 0FBFC8[ ]+movsw %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsw %eax, %ecx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movswl %al, %cl
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@@ -106,17 +106,17 @@
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %cl
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[ ]*[1-9][0-9]*[ ]+movsb %rax, %cl
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsb %al, %cx
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[ ]*[1-9][0-9]* \?\?\?\? 660FBEC8[ ]+movsb %al, %cx
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %cx
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %cx
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[ ]*[1-9][0-9]*[ ]+movsb %rax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsb %al, %ecx
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[ ]*[1-9][0-9]* \?\?\?\? 0FBEC8[ ]+movsb %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsb %rax, %ecx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsb %al, %rcx
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[ ]*[1-9][0-9]* \?\?\?\? 480FBEC8[ ]+movsb %al, %rcx
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[ ]*[1-9][0-9]*[ ]+movsb %ax, %rcx
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[ ]*[1-9][0-9]*[ ]+movsb %eax, %rcx
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[ ]*[1-9][0-9]*[ ]+movsb %rax, %rcx
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@@ -192,12 +192,12 @@
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[ ]*[1-9][0-9]*[ ]+movsw %rax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsw %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movsw %ax, %ecx
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[ ]*[1-9][0-9]* \?\?\?\? 0FBFC8[ ]+movsw %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsw %eax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsw %rax, %ecx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsw %al, %rcx
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[ ]*[1-9][0-9]*[ ]+movsw %ax, %rcx
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[ ]*[1-9][0-9]* \?\?\?\? 480FBFC8[ ]+movsw %ax, %rcx
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[ ]*[1-9][0-9]*[ ]+movsw %eax, %rcx
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[ ]*[1-9][0-9]*[ ]+movsw %rax, %rcx
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[ ]*[1-9][0-9]*[ ]*
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@@ -241,6 +241,46 @@
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[ ]*[1-9][0-9]*[ ]+movswq %eax, %rcx
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[ ]*[1-9][0-9]*[ ]+movswq %rax, %rcx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsl %al, %cl
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[ ]*[1-9][0-9]*[ ]+movsl %ax, %cl
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[ ]*[1-9][0-9]*[ ]+movsl %eax, %cl
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[ ]*[1-9][0-9]*[ ]+movsl %rax, %cl
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsl %al, %cx
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[ ]*[1-9][0-9]*[ ]+movsl %ax, %cx
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[ ]*[1-9][0-9]*[ ]+movsl %eax, %cx
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[ ]*[1-9][0-9]*[ ]+movsl %rax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsl %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movsl %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsl %eax, %ecx
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[ ]*[1-9][0-9]*[ ]+movsl %rax, %ecx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movsl %al, %rcx
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[ ]*[1-9][0-9]*[ ]+movsl %ax, %rcx
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[ ]*[1-9][0-9]* \?\?\?\? 4863C8[ ]+movsl %eax, %rcx
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[ ]*[1-9][0-9]*[ ]+movsl %rax, %rcx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movslq %al, %cl
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[ ]*[1-9][0-9]*[ ]+movslq %ax, %cl
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[ ]*[1-9][0-9]*[ ]+movslq %eax, %cl
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[ ]*[1-9][0-9]*[ ]+movslq %rax, %cl
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movslq %al, %cx
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[ ]*[1-9][0-9]*[ ]+movslq %ax, %cx
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[ ]*[1-9][0-9]*[ ]+movslq %eax, %cx
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[ ]*[1-9][0-9]*[ ]+movslq %rax, %cx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movslq %al, %ecx
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[ ]*[1-9][0-9]*[ ]+movslq %ax, %ecx
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[ ]*[1-9][0-9]*[ ]+movslq %eax, %ecx
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[ ]*[1-9][0-9]*[ ]+movslq %rax, %ecx
|
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movslq %al, %rcx
|
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[ ]*[1-9][0-9]*[ ]+movslq %ax, %rcx
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[ ]*[1-9][0-9]* \?\?\?\? 4863C8[ ]+movslq %eax, %rcx
|
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[ ]*[1-9][0-9]*[ ]+movslq %rax, %rcx
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[ ]*[1-9][0-9]*[ ]*
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[ ]*[1-9][0-9]*[ ]+movzx:
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[ ]*[1-9][0-9]*[ ]+movzx %al, %cl
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[ ]*[1-9][0-9]*[ ]+movzx %ax, %cl
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@@ -241,6 +241,46 @@ movsx:
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movswq %eax, %rcx
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movswq %rax, %rcx
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movsl %al, %cl
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movsl %ax, %cl
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movsl %eax, %cl
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movsl %rax, %cl
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movsl %al, %cx
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movsl %ax, %cx
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movsl %eax, %cx
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movsl %rax, %cx
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movsl %al, %ecx
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movsl %ax, %ecx
|
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movsl %eax, %ecx
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movsl %rax, %ecx
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||||
|
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movsl %al, %rcx
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movsl %ax, %rcx
|
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movsl %eax, %rcx
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movsl %rax, %rcx
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||||
|
||||
movslq %al, %cl
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movslq %ax, %cl
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movslq %eax, %cl
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movslq %rax, %cl
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||||
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movslq %al, %cx
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movslq %ax, %cx
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movslq %eax, %cx
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movslq %rax, %cx
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movslq %al, %ecx
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movslq %ax, %ecx
|
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movslq %eax, %ecx
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movslq %rax, %ecx
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movslq %al, %rcx
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movslq %ax, %rcx
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movslq %eax, %rcx
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movslq %rax, %rcx
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|
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movzx:
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movzx %al, %cl
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movzx %ax, %cl
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||||
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@@ -172,14 +172,9 @@ mov, 0xf24, None, Cpu386|CpuNo64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No
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movbe, 0x0f38f0, None, CpuMovbe, D|Modrm|CheckRegSize|No_bSuf|No_sSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
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// Move with sign extend.
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// "movsbl" & "movsbw" must not be unified into "movsb" to avoid
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// conflict with the "movs" string move instruction.
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movsbl, 0xfbe, None, Cpu386, Modrm|NoSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg32 }
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movsbw, 0xfbe, None, Cpu386, Modrm|NoSuf, { Reg8|Byte|Unspecified|BaseIndex, Reg16 }
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movswl, 0xfbf, None, Cpu386, Modrm|NoSuf, { Reg16|Word|Unspecified|BaseIndex, Reg32 }
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movsbq, 0xfbe, None, Cpu64, Modrm|NoSuf|Size64, { Reg8|Byte|Unspecified|BaseIndex, Reg64 }
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movswq, 0xfbf, None, Cpu64, Modrm|NoSuf|Size64, { Reg16|Word|Unspecified|BaseIndex, Reg64 }
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||||
movslq, 0x63, None, Cpu64, Modrm|NoSuf|Size64, { Reg32|Dword|Unspecified|BaseIndex, Reg64 }
|
||||
movsb, 0xfbe, None, Cpu386, Modrm|No_bSuf|No_sSuf, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
|
||||
movsw, 0xfbf, None, Cpu386, Modrm|No_bSuf|No_wSuf|No_sSuf, { Reg16|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
movsl, 0x63, None, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg32|Unspecified|BaseIndex, Reg64 }
|
||||
movsx, 0xfbe, None, Cpu386, W|Modrm|No_lSuf|No_sSuf|No_qSuf, { Reg8|Reg16|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
|
||||
movsx, 0x63, None, Cpu64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Reg32|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
movsxd, 0x63, None, Cpu64, Modrm|NoSuf, { Reg32|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
|
||||
1826
opcodes/i386-tbl.h
1826
opcodes/i386-tbl.h
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user