forked from Imagelibrary/binutils-gdb
Add support for 16 byte quantities to sim-endian macro H2T.
Add model-filter field to option, include, model anf function igen records
This commit is contained in:
Andrew Cagney
@@ -1,5 +1,10 @@
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Tue Oct 28 12:29:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-endian.h (H2T): Handle 16 byte variables.
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* sim-n-core.h (sim_core_read_unaligned_N): Return a dummy when an
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error.
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* sim-core.c: Do not generate sim_core_*_word.
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* sim-n-core.h (sim_core_trace_N): Add line_nr argument.
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@@ -133,12 +133,13 @@ INLINE_SIM_ENDIAN(void*) offset_16(unsigned_16 *x, unsigned ws, unsigned w);
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#define H2T(VARIABLE) \
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do { \
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switch (sizeof(VARIABLE)) { \
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case 1: VARIABLE = H2T_1(VARIABLE); break; \
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case 2: VARIABLE = H2T_2(VARIABLE); break; \
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case 4: VARIABLE = H2T_4(VARIABLE); break; \
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case 8: VARIABLE = H2T_8(VARIABLE); break; \
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/*case 16: VARIABLE = H2T_16(VARIABLE); break;*/ \
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void *vp = &(VARIABLE); \
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switch (sizeof (VARIABLE)) { \
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case 1: *(unsigned_1*)vp = H2T_1(*(unsigned_1*)vp); break; \
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case 2: *(unsigned_2*)vp = H2T_2(*(unsigned_2*)vp); break; \
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case 4: *(unsigned_4*)vp = H2T_4(*(unsigned_4*)vp); break; \
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case 8: *(unsigned_8*)vp = H2T_8(*(unsigned_8*)vp); break; \
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case 16: *(unsigned_16*)vp = H2T_16(*(unsigned_16*)vp); break; \
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} \
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} while (0)
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@@ -178,6 +178,11 @@ sim_core_read_unaligned_N(sim_cpu *cpu,
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sim_engine_abort (CPU_STATE (cpu), cpu, cia,
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"internal error - %s - bad switch",
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XSTRING (sim_core_read_unaligned_N));
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/* to keep some compilers happy, we return a dummy */
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{
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unsigned_N val[1] = { };
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return val[0];
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}
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}
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}
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@@ -1,3 +1,31 @@
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Tue Oct 28 10:50:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* gen-icache.c (print_icache_extraction): Force result of atol to
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unsigned.
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* ld-insn.c (parse_function_record): Separate handling of old and
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ney fynction records.
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(load_insn_table): For %s record, hack function name & type after
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it has been parsed.
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* filter.h (filter_is_subset): Reverse argument names, wrong
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order.
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* ld-insn.c (load_insn_table): Move include code to.
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(parse_include_record): New function. Check for filtering of
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include statement by both flags and models.
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(load_insn_table): Check for model filtering of cache and model
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records.
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(parse_model_data_record): Check for model & flag filtering of
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model data records.
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(parse_function_record): Check for model & flag filtering of
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function records.
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* ld-insn.h: Define record_filter_models_field. Add filter-models
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field to all but instruction records.
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(struct _function_entry, struct _cache_entry): Add models field.
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(nr_function_fields): Make parm field mandatory.
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Mon Oct 27 15:14:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* igen.c (main): Change -I option to -I<directory>. Add optional
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@@ -25,12 +25,21 @@ typedef unsigned64 insn_uint;
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/* Common among most entries:
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All non instruction records have the format:
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<...> ::=
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":" <record-name>
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":" <filter-flags>
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":" <filter-models>
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":" ...
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*/
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enum {
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record_type_field = 1,
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old_record_type_field = 2,
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record_filter_flags_field = 2,
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record_filter_models_field = 3,
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};
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@@ -41,6 +50,7 @@ enum {
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<include> ::=
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":" "include"
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":" <filter-flags>
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":" <filter-models>
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":" <filename>
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<nl>
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;
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@@ -48,8 +58,8 @@ enum {
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*/
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enum {
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include_record_filename_field = 3,
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nr_include_record_fields = 4,
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include_filename_field = 4,
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nr_include_fields,
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};
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@@ -62,6 +72,7 @@ enum {
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<option> ::=
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":" "option"
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":" <filter-flags>
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":" <filter-models>
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":" <option-name>
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":" <option-value>
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<nl>
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@@ -89,9 +100,9 @@ enum {
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enum {
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option_name_field = 3,
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option_value_field = 4,
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nr_option_fields = 5,
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option_name_field = 4,
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option_value_field,
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nr_option_fields,
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};
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@@ -100,9 +111,9 @@ enum {
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<insn-macro> ::=
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<expression>
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":" "define"
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":" ( "define" | "undef" )
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":" <filter-flags>
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":"
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":" <filter-models>
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":" <name>
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<nl>
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;
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@@ -122,8 +133,14 @@ enum {
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<function-spec>
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;
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<format> ::=
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":" ( "%s" | ... )
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<function-spec>
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;
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<function-spec> ::=
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":" <filter-flags>
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":" <filter-models>
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":" <typedef>
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":" <name>
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[ ":" <parameter-list> ]
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@@ -134,10 +151,10 @@ enum {
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*/
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enum {
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function_typedef_field = 3,
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function_name_field = 4,
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function_param_field = 5,
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nr_function_fields = 5,
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function_typedef_field = 4,
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function_name_field,
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function_param_field,
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nr_function_fields,
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};
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enum {
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@@ -145,7 +162,7 @@ enum {
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old_function_type_field = 2,
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old_function_name_field = 4,
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old_function_param_field = 5,
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nr_old_function_fields = 6,
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nr_old_function_fields = 5, /* parameter-list is optional */
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};
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@@ -153,6 +170,7 @@ typedef struct _function_entry function_entry;
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struct _function_entry {
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line_ref *line;
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filter *flags;
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filter *models;
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char *type;
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char *name;
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char *param;
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@@ -179,7 +197,8 @@ extern void function_entry_traverse
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<cache-macro> ::=
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":" <macro-type>
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":" <filter-flags>
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":" <type>
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":" <filter-models>
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":" <typedef>
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":" <name>
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":" <field-name> { "," <field-name> }
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":" <expression>
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@@ -208,11 +227,11 @@ extern void function_entry_traverse
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*/
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enum {
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cache_type_field = 3,
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cache_name_field = 4,
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cache_original_fields_field = 5,
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cache_expression_field = 6,
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nr_cache_fields = 7,
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cache_typedef_field = 4,
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cache_name_field,
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cache_original_fields_field,
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cache_expression_field,
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nr_cache_fields,
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};
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typedef enum {
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@@ -225,6 +244,7 @@ typedef struct _cache_entry cache_entry;
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struct _cache_entry {
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line_ref *line;
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filter *flags;
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filter *models;
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cache_entry_type entry_type;
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char *name;
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filter *original_fields;
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@@ -240,6 +260,7 @@ struct _cache_entry {
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<model-processor> ::=
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":" "model"
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":" <filter-flags>
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":" <filter-models>
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":" <processor>
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":" <long-processor>
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":" <function-unit-data>
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@@ -249,6 +270,7 @@ struct _cache_entry {
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<model-macro> ::=
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":" "model-macro"
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":" <filter-flags>
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":" <filter-models>
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<nl>
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<code-block>
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;
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@@ -256,6 +278,7 @@ struct _cache_entry {
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<model-data> ::=
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":" "model-data"
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":" <filter-flags>
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":" <filter-models>
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<nl>
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<code-block>
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;
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@@ -278,11 +301,11 @@ struct _cache_entry {
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*/
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enum {
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nr_model_macro_fields = 3,
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nr_model_data_fields = 3,
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nr_model_static_fields = 6,
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nr_model_internal_fields = 6,
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nr_model_function_fields = 6,
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nr_model_macro_fields = 4,
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nr_model_data_fields = 4,
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nr_model_static_fields = nr_function_fields,
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nr_model_internal_fields = nr_function_fields,
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nr_model_function_fields = nr_function_fields,
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};
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typedef struct _model_data model_data;
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@@ -295,10 +318,10 @@ struct _model_data {
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};
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enum {
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model_name_field = 3,
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model_full_name_field = 4,
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model_unit_data_field = 5,
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nr_model_processor_fields = 6,
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model_name_field = 4,
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model_full_name_field,
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model_unit_data_field,
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nr_model_processor_fields,
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};
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typedef struct _model_entry model_entry;
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@@ -1,3 +1,7 @@
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Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen: Add model filter field to records.
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Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
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@@ -12,43 +12,43 @@
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// IGEN config - mips16
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:option:16:insn-bit-size:16
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:option:16:hi-bit-nr:15
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:option:16:insn-specifying-widths:true
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:option:16:gen-delayed-branch:false
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:option:16::insn-bit-size:16
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:option:16::hi-bit-nr:15
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:option:16::insn-specifying-widths:true
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:option:16::gen-delayed-branch:false
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// IGEN config - mips32/64..
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:option:32:insn-bit-size:32
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:option:32:hi-bit-nr:31
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:option:32:insn-specifying-widths:true
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:option:32:gen-delayed-branch:false
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:option:32::insn-bit-size:32
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:option:32::hi-bit-nr:31
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:option:32::insn-specifying-widths:true
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:option:32::gen-delayed-branch:false
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// Generate separate simulators for each target
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// :option::multi-sim:true
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// :option:::multi-sim:true
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// Models known by this simulator
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:model::mipsI:mipsI:
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:model::mipsII:mipsII:
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:model::mipsIII:mipsIII:
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:model::mipsIV:mipsIV:
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:model::mips16:mips16:
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:model:::mipsI:mipsI:
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:model:::mipsII:mipsII:
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:model:::mipsIII:mipsIII:
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:model:::mipsIV:mipsIV:
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:model:::mips16:mips16:
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// start-sanitize-r5900
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:model::r5900:r5900:
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:model:::r5900:r5900:
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// end-sanitize-r5900
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:model::r3900:r3900:
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:model:::r3900:r3900:
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// start-sanitize-tx19
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:model::tx19:tx19:
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:model:::tx19:tx19:
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// end-sanitize-tx19
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// start-sanitize-vr5400
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:model::vr5400:vr5400:
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:model:::vr5400:vr5400:
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// end-sanitize-vr5400
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// Pseudo instructions known by IGEN
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:internal:::illegal
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:internal::::illegal:
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{
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sim_io_eprintf (SD, "Illegal instruction at address 0x%lx\n",
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(unsigned long) CIA);
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@@ -3404,7 +3404,7 @@
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//
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:%s:::FMT:int fmt
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:%s::::FMT:int fmt
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{
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switch (fmt)
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{
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@@ -3416,7 +3416,7 @@
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}
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}
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:%s:::TF:int tf
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:%s::::TF:int tf
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{
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if (tf)
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return "t";
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@@ -3424,7 +3424,7 @@
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return "f";
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}
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:%s:::ND:int nd
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:%s::::ND:int nd
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{
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if (nd)
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return "l";
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@@ -3432,7 +3432,7 @@
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return "";
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}
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:%s:::COND:int cond
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:%s::::COND:int cond
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{
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switch (cond)
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{
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@@ -4975,12 +4975,12 @@
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// end-sanitize-r5900
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:include::m16.igen
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:include:::m16.igen
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// start-sanitize-vr5400
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:include::vr5400.igen
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:include::vr5400:vr5400.igen
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// end-sanitize-vr5400
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// start-sanitize-r5900
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:include::r5900.igen
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:include::r5900:r5900.igen
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// end-sanitize-r5900
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// start-sanitize-cygnus-never
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@@ -1,3 +1,7 @@
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Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
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|
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* v850.igen: Add model filter field to records.
|
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|
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Fri Oct 17 17:26:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
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* alu.h (ALU32_END): Use ALU32_RESULT.
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@@ -20,17 +20,17 @@
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// The following is called when ever an illegal instruction is encountered.
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::internal::illegal
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:internal::::illegal:
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sim_io_eprintf (SD, "0x%lx: illegal instruction\n", (unsigned long) cia.ip);
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sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIGILL);
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// The following is called when ever an FP op is attempted with FPU disabled.
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::internal::fp_unavailable
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:internal::::fp_unavailable:
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sim_io_eprintf (SD, "0x%lx: floating-point unavailable\n", (unsigned long) cia.ip);
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sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIGFPE);
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// Handle a branch instruction
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instruction_address::function::do_branch:int annul, address_word target, int rLink_p, unsigned32 *rLink
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:function:::instruction_address:do_branch:int annul, address_word target, int rLink_p, unsigned32 *rLink
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instruction_address nia;
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if (annul)
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{
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@@ -49,7 +49,7 @@ instruction_address::function::do_branch:int annul, address_word target, int rLi
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return nia;
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// Signed Integer Add - add source1, source2, dest
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void::function::do_add:unsigned32 *rDest, signed32 source1, signed32 source2
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:function:::void:do_add:unsigned32 *rDest, signed32 source1, signed32 source2
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unsigned32 result;
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ALU_BEGIN (source1);
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ALU_ADD (source2);
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@@ -69,7 +69,7 @@ void::function::do_add:unsigned32 *rDest, signed32 source1, signed32 source2
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// Unsigned Integer Add - addu source1, source2, dest
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void::function::do_addu:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
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:function:::void:do_addu:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
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unsigned32 result = source1 + source2;
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TRACE_ALU3 (MY_INDEX, result, source1, source2);
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*rDest = result;
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@@ -85,7 +85,7 @@ void::function::do_addu:unsigned32 *rDest, unsigned32 source1, unsigned32 source
|
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do_addu (_SD, rDest, LongSignedImmediate, vSource2);
|
||||
|
||||
|
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void::function::do_and:signed32 *rDest, signed32 source1, signed32 source2
|
||||
:function:::void:do_and:signed32 *rDest, signed32 source1, signed32 source2
|
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unsigned32 result = source1 & source2;
|
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TRACE_ALU3 (MY_INDEX, result, source1, source2);
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*rDest = result;
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@@ -140,7 +140,7 @@ void::function::do_and:signed32 *rDest, signed32 source1, signed32 source2
|
||||
|
||||
|
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// bbo[.a]
|
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instruction_address::function::do_bbo:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
|
||||
:function:::instruction_address:do_bbo:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
|
||||
int jump_p;
|
||||
address_word target = cia.ip + 4 * offset;
|
||||
if (MASKED32 (source, bitnum, bitnum))
|
||||
@@ -152,7 +152,7 @@ instruction_address::function::do_bbo:instruction_address nia, int bitnum, unsig
|
||||
jump_p = 0;
|
||||
TRACE_COND_BR(MY_INDEX, jump_p, bitnum, target);
|
||||
return nia;
|
||||
const char *::function::str_A:int A
|
||||
:%s::::A:int A
|
||||
if (A)
|
||||
return ".a";
|
||||
else
|
||||
@@ -169,7 +169,7 @@ const char *::function::str_A:int A
|
||||
|
||||
|
||||
// bbz[.a]
|
||||
instruction_address::function::do_bbz:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
|
||||
:function:::instruction_address:do_bbz:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
|
||||
int jump_p;
|
||||
address_word target = cia.ip + 4 * offset;
|
||||
if (!MASKED32 (source, bitnum, bitnum))
|
||||
@@ -193,7 +193,7 @@ instruction_address::function::do_bbz:instruction_address nia, int bitnum, unsig
|
||||
|
||||
|
||||
// bcnd[.a]
|
||||
instruction_address::function::do_bcnd:instruction_address nia, int Cond, unsigned32 source, int annul, unsigned32 offset
|
||||
:function:::instruction_address:do_bcnd:instruction_address nia, int Cond, unsigned32 source, int annul, unsigned32 offset
|
||||
int condition;
|
||||
int size = EXTRACTED32 (Cond, 31 - 27, 30 - 27);
|
||||
int code = EXTRACTED32 (Cond, 29 - 27, 27 - 27);
|
||||
@@ -238,7 +238,7 @@ instruction_address::function::do_bcnd:instruction_address nia, int Cond, unsign
|
||||
|
||||
|
||||
// brcr
|
||||
sim_cia::function::do_brcr:instruction_address nia, int cr
|
||||
:function:::sim_cia:do_brcr:instruction_address nia, int cr
|
||||
if (cr >= 0x4000 || !(CPU)->is_user_mode)
|
||||
{
|
||||
unsigned32 control = CR (cr);
|
||||
@@ -266,7 +266,7 @@ sim_cia::function::do_brcr:instruction_address nia, int cr
|
||||
|
||||
|
||||
// bsr[.a]
|
||||
instruction_address::function::do_bsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset
|
||||
:function:::instruction_address:do_bsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset
|
||||
address_word target = cia.ip + 4 * offset;
|
||||
nia = do_branch (_SD, annul, target, 1, rLink);
|
||||
TRACE_UCOND_BR (MY_INDEX, target);
|
||||
@@ -283,7 +283,7 @@ instruction_address::function::do_bsr:instruction_address nia, signed32 *rLink,
|
||||
|
||||
|
||||
// cmnd
|
||||
void::function::do_cmnd:signed32 source
|
||||
:function:::void:do_cmnd:signed32 source
|
||||
int Reset = EXTRACTED32 (source, 31, 31);
|
||||
int Halt = EXTRACTED32 (source, 30, 30);
|
||||
int Unhalt = EXTRACTED32 (source, 29, 29);
|
||||
@@ -332,7 +332,7 @@ void::function::do_cmnd:signed32 source
|
||||
do_cmnd (_SD, LongUnsignedImmediate);
|
||||
|
||||
// cmp
|
||||
unsigned32::function::cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned32 u2
|
||||
:function:::unsigned32:cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned32 u2
|
||||
unsigned32 field = 0;
|
||||
if (s1 == s2) field |= 0x001;
|
||||
if (s1 != s2) field |= 0x002;
|
||||
@@ -345,7 +345,7 @@ unsigned32::function::cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned
|
||||
if (u1 < u2) field |= 0x100;
|
||||
if (u1 >= u2) field |= 0x200;
|
||||
return field;
|
||||
void::function::do_cmp:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
|
||||
:function:::void:do_cmp:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
|
||||
unsigned32 field = 0;
|
||||
field |= cmp_vals (_SD, source1, source1, source2, source2) << 20;
|
||||
field |= cmp_vals (_SD, (signed16)source1, (unsigned16)source1,
|
||||
@@ -366,7 +366,7 @@ void::function::do_cmp:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
|
||||
|
||||
|
||||
// dcache
|
||||
const char *::function::str_F:int F
|
||||
:%s::::F:int F
|
||||
if (F)
|
||||
return "f";
|
||||
else
|
||||
|
||||
@@ -1,3 +1,11 @@
|
||||
Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* v850.igen: Add model filter field to records.
|
||||
|
||||
Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com>
|
||||
|
||||
* sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
|
||||
|
||||
Reference in New Issue
Block a user