* inf-ptrace.c (inf_ptrace_register_u_offset): Adapt parameter list.

(inf_ptrace_fetch_register): Add register_u_offset callback parameters
	GDBARCH and STORE_P.  Handle callback (CORE_ADDR) -1 return value.
	(inf_ptrace_store_register): Likewise.
	(inf_ptrace_trad_target): Adapt register_u_offset parameter list.
	* inf-ptrace.h (inf_ptrace_trad_target): Likewise.

	* vax-nat.c (vax_register_u_offset): Adapt parameter list.

	* linux-nat.c (linux_trad_target): Adapt parameter list.
	* linux-nat.h (linux_trad_target): Likewise.

	* alpha-linux-nat.c (alpha_linux_register_u_offset): Adapt parameters.

	* mips-linux-nat.c (mips_linux_cannot_fetch_register): Remove.
	(mips_linux_cannot_store_register): Likewise.
	(mips_linux_register_addr): Add GDBARCH and STORE_P parameters.
	Return (CORE_ADDR) -1 for registers that cannot be fetched or
	stored via ptrace.  Use GDBARCH instead of current_gdbarch.
	(mips64_linux_register_addr): Likewise.
	(mips_linux_register_u_offset): Adapt parameter list.  Pass
	GDBARCH and STORE_P on to mips{64}_linux_register_addr.

	* config/mips/linux.mh (NAT_FILE): Set to config/nm-linux.h.
	* config/mips/nm-linux.h: Delete file.
This commit is contained in:
Ulrich Weigand
2007-05-10 21:36:00 +00:00
parent dd6953e1f3
commit 7714d83ad4
10 changed files with 86 additions and 127 deletions

View File

@@ -1,3 +1,31 @@
2007-05-10 Ulrich Weigand <uweigand@de.ibm.com>
* inf-ptrace.c (inf_ptrace_register_u_offset): Adapt parameter list.
(inf_ptrace_fetch_register): Add register_u_offset callback parameters
GDBARCH and STORE_P. Handle callback (CORE_ADDR) -1 return value.
(inf_ptrace_store_register): Likewise.
(inf_ptrace_trad_target): Adapt register_u_offset parameter list.
* inf-ptrace.h (inf_ptrace_trad_target): Likewise.
* vax-nat.c (vax_register_u_offset): Adapt parameter list.
* linux-nat.c (linux_trad_target): Adapt parameter list.
* linux-nat.h (linux_trad_target): Likewise.
* alpha-linux-nat.c (alpha_linux_register_u_offset): Adapt parameters.
* mips-linux-nat.c (mips_linux_cannot_fetch_register): Remove.
(mips_linux_cannot_store_register): Likewise.
(mips_linux_register_addr): Add GDBARCH and STORE_P parameters.
Return (CORE_ADDR) -1 for registers that cannot be fetched or
stored via ptrace. Use GDBARCH instead of current_gdbarch.
(mips64_linux_register_addr): Likewise.
(mips_linux_register_u_offset): Adapt parameter list. Pass
GDBARCH and STORE_P on to mips{64}_linux_register_addr.
* config/mips/linux.mh (NAT_FILE): Set to config/nm-linux.h.
* config/mips/nm-linux.h: Delete file.
2007-05-10 Pedro Alves <pedro_alves@portugalmail.pt>
* remote.c (remote_detach): Error out if remote can't detach.

View File

@@ -84,7 +84,7 @@ fill_fpregset (const struct regcache *regcache,
static CORE_ADDR
alpha_linux_register_u_offset (int regno)
alpha_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
{
if (regno == PC_REGNUM)
return PC;

View File

@@ -1,5 +1,5 @@
# Host: Linux/MIPS
NAT_FILE= nm-linux.h
NAT_FILE= config/nm-linux.h
NATDEPFILES= inf-ptrace.o fork-child.o mips-linux-nat.o \
linux-thread-db.o proc-service.o gcore.o \
linux-nat.o linux-fork.o

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@@ -1,32 +0,0 @@
/* Native-dependent definitions for GNU/Linux on MIPS.
Copyright 1996, 2001, 2002, 2003, 2007 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifndef NM_MIPSLINUX_H
#define NM_MIPSLINUX_H
#include "config/nm-linux.h"
int mips_linux_cannot_fetch_register (int regno);
int mips_linux_cannot_store_register (int regno);
#define CANNOT_FETCH_REGISTER(regno) mips_linux_cannot_fetch_register (regno)
#define CANNOT_STORE_REGISTER(regno) mips_linux_cannot_store_register (regno)
#endif /* NM_MIPSLINUX_H */

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@@ -612,7 +612,7 @@ inf_ptrace_target (void)
/* Pointer to a function that returns the offset within the user area
where a particular register is stored. */
static CORE_ADDR (*inf_ptrace_register_u_offset)(int);
static CORE_ADDR (*inf_ptrace_register_u_offset)(struct gdbarch *, int, int);
/* Fetch register REGNUM from the inferior. */
@@ -624,7 +624,9 @@ inf_ptrace_fetch_register (struct regcache *regcache, int regnum)
PTRACE_TYPE_RET *buf;
int pid, i;
if (CANNOT_FETCH_REGISTER (regnum))
/* This isn't really an address, but ptrace thinks of it as one. */
addr = inf_ptrace_register_u_offset (current_gdbarch, regnum, 0);
if (addr == (CORE_ADDR)-1 || CANNOT_FETCH_REGISTER (regnum))
{
regcache_raw_supply (regcache, regnum, NULL);
return;
@@ -636,10 +638,7 @@ inf_ptrace_fetch_register (struct regcache *regcache, int regnum)
if (pid == 0)
pid = ptid_get_pid (inferior_ptid);
/* This isn't really an address, but ptrace thinks of it as one. */
addr = inf_ptrace_register_u_offset (regnum);
size = register_size (current_gdbarch, regnum);
gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
buf = alloca (size);
@@ -680,7 +679,9 @@ inf_ptrace_store_register (const struct regcache *regcache, int regnum)
PTRACE_TYPE_RET *buf;
int pid, i;
if (CANNOT_STORE_REGISTER (regnum))
/* This isn't really an address, but ptrace thinks of it as one. */
addr = inf_ptrace_register_u_offset (current_gdbarch, regnum, 1);
if (addr == (CORE_ADDR)-1 || CANNOT_STORE_REGISTER (regnum))
return;
/* Cater for systems like GNU/Linux, that implement threads as
@@ -689,10 +690,7 @@ inf_ptrace_store_register (const struct regcache *regcache, int regnum)
if (pid == 0)
pid = ptid_get_pid (inferior_ptid);
/* This isn't really an address, but ptrace thinks of it as one. */
addr = inf_ptrace_register_u_offset (regnum);
size = register_size (current_gdbarch, regnum);
gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
buf = alloca (size);
@@ -728,7 +726,8 @@ inf_ptrace_store_registers (struct regcache *regcache, int regnum)
particular register is stored. */
struct target_ops *
inf_ptrace_trad_target (CORE_ADDR (*register_u_offset)(int))
inf_ptrace_trad_target (CORE_ADDR (*register_u_offset)
(struct gdbarch *, int, int))
{
struct target_ops *t = inf_ptrace_target();

View File

@@ -32,6 +32,7 @@ extern struct target_ops *inf_ptrace_target (void);
particular register is stored. */
extern struct target_ops *
inf_ptrace_trad_target (CORE_ADDR (*register_u_offset)(int));
inf_ptrace_trad_target (CORE_ADDR (*register_u_offset)
(struct gdbarch *, int, int));
#endif

View File

@@ -3198,7 +3198,7 @@ linux_target (void)
}
struct target_ops *
linux_trad_target (CORE_ADDR (*register_u_offset)(int))
linux_trad_target (CORE_ADDR (*register_u_offset)(struct gdbarch *, int, int))
{
struct target_ops *t;

View File

@@ -91,7 +91,7 @@ struct target_ops * linux_target (void);
/* Create a generic GNU/Linux target using traditional
ptrace register access. */
struct target_ops *
linux_trad_target (CORE_ADDR (*register_u_offset)(int));
linux_trad_target (CORE_ADDR (*register_u_offset)(struct gdbarch *, int, int));
/* Register the customized GNU/Linux target. This should be used
instead of calling add_target directly. */

View File

@@ -47,112 +47,75 @@ static int have_ptrace_regsets = 1;
void (*super_fetch_registers) (struct regcache *, int);
void (*super_store_registers) (struct regcache *, int);
/* Pseudo registers can not be read. ptrace does not provide a way to
read (or set) MIPS_PS_REGNUM, and there's no point in reading or
setting MIPS_ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or
FCRIR via ptrace(). */
int
mips_linux_cannot_fetch_register (int regno)
{
if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
return 0;
else if (regno >= mips_regnum (current_gdbarch)->fp0
&& regno <= mips_regnum (current_gdbarch)->fp0 + 32)
return 0;
else if (regno == mips_regnum (current_gdbarch)->lo
|| regno == mips_regnum (current_gdbarch)->hi
|| regno == mips_regnum (current_gdbarch)->badvaddr
|| regno == mips_regnum (current_gdbarch)->cause
|| regno == mips_regnum (current_gdbarch)->pc
|| regno == mips_regnum (current_gdbarch)->fp_control_status
|| regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
return 0;
else
return 1;
}
int
mips_linux_cannot_store_register (int regno)
{
if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
return 0;
else if (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 32)
return 0;
else if (regno == mips_regnum (current_gdbarch)->lo
|| regno == mips_regnum (current_gdbarch)->hi
|| regno == mips_regnum (current_gdbarch)->pc
|| regno == mips_regnum (current_gdbarch)->fp_control_status)
return 0;
else
return 1;
}
/* Map gdb internal register number to ptrace ``address''.
These ``addresses'' are normally defined in <asm/ptrace.h>. */
These ``addresses'' are normally defined in <asm/ptrace.h>.
ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
and there's no point in reading or setting MIPS_ZERO_REGNUM.
We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
static CORE_ADDR
mips_linux_register_addr (int regno)
mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
{
int regaddr;
CORE_ADDR regaddr;
if (regno < 0 || regno >= NUM_REGS)
error (_("Bogon register number %d."), regno);
if (regno < 32)
if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
regaddr = regno;
else if ((regno >= mips_regnum (current_gdbarch)->fp0)
&& (regno < mips_regnum (current_gdbarch)->fp0 + 32))
regaddr = FPR_BASE + (regno - mips_regnum (current_gdbarch)->fp0);
else if (regno == mips_regnum (current_gdbarch)->pc)
else if ((regno >= mips_regnum (gdbarch)->fp0)
&& (regno < mips_regnum (gdbarch)->fp0 + 32))
regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
else if (regno == mips_regnum (gdbarch)->pc)
regaddr = PC;
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = CAUSE;
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = BADVADDR;
else if (regno == mips_regnum (current_gdbarch)->lo)
else if (regno == mips_regnum (gdbarch)->cause)
regaddr = store? (CORE_ADDR) -1 : CAUSE;
else if (regno == mips_regnum (gdbarch)->badvaddr)
regaddr = store? (CORE_ADDR) -1 : BADVADDR;
else if (regno == mips_regnum (gdbarch)->lo)
regaddr = MMLO;
else if (regno == mips_regnum (current_gdbarch)->hi)
else if (regno == mips_regnum (gdbarch)->hi)
regaddr = MMHI;
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
else if (regno == mips_regnum (gdbarch)->fp_control_status)
regaddr = FPC_CSR;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = FPC_EIR;
else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
else
error (_("Unknowable register number %d."), regno);
regaddr = (CORE_ADDR) -1;
return regaddr;
}
static CORE_ADDR
mips64_linux_register_addr (int regno)
mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
{
int regaddr;
CORE_ADDR regaddr;
if (regno < 0 || regno >= NUM_REGS)
error (_("Bogon register number %d."), regno);
if (regno < 32)
if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
regaddr = regno;
else if ((regno >= mips_regnum (current_gdbarch)->fp0)
&& (regno < mips_regnum (current_gdbarch)->fp0 + 32))
else if ((regno >= mips_regnum (gdbarch)->fp0)
&& (regno < mips_regnum (gdbarch)->fp0 + 32))
regaddr = MIPS64_FPR_BASE + (regno - FP0_REGNUM);
else if (regno == mips_regnum (current_gdbarch)->pc)
else if (regno == mips_regnum (gdbarch)->pc)
regaddr = MIPS64_PC;
else if (regno == mips_regnum (current_gdbarch)->cause)
regaddr = MIPS64_CAUSE;
else if (regno == mips_regnum (current_gdbarch)->badvaddr)
regaddr = MIPS64_BADVADDR;
else if (regno == mips_regnum (current_gdbarch)->lo)
else if (regno == mips_regnum (gdbarch)->cause)
regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
else if (regno == mips_regnum (gdbarch)->badvaddr)
regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
else if (regno == mips_regnum (gdbarch)->lo)
regaddr = MIPS64_MMLO;
else if (regno == mips_regnum (current_gdbarch)->hi)
else if (regno == mips_regnum (gdbarch)->hi)
regaddr = MIPS64_MMHI;
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
else if (regno == mips_regnum (gdbarch)->fp_control_status)
regaddr = MIPS64_FPC_CSR;
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
regaddr = MIPS64_FPC_EIR;
else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
else
error (_("Unknowable register number %d."), regno);
regaddr = (CORE_ADDR) -1;
return regaddr;
}
@@ -364,12 +327,12 @@ mips64_linux_store_registers (struct regcache *regcache, int regnum)
REGNO. */
static CORE_ADDR
mips_linux_register_u_offset (int regno)
mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
{
if (mips_abi_regsize (current_gdbarch) == 8)
return mips64_linux_register_addr (regno);
if (mips_abi_regsize (gdbarch) == 8)
return mips64_linux_register_addr (gdbarch, regno, store_p);
else
return mips_linux_register_addr (regno);
return mips_linux_register_addr (gdbarch, regno, store_p);
}
void _initialize_mips_linux_nat (void);

View File

@@ -69,7 +69,7 @@ vax_register_u_addr (CORE_ADDR u_ar0, int regnum)
}
static CORE_ADDR
vax_register_u_offset (int regnum)
vax_register_u_offset (struct gdbarch *gdbarch, int regnum, int store_p)
{
size_t u_ar0_offset = offsetof (struct user, u_ar0);
CORE_ADDR u_ar0;