[AArch64][GAS] Add support for PAN architecture extension

2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>
gas/
	* config/tc-aarch64.c (parse_sys_reg): New parameter.  Check
	target support.  Fix whitespace.
	(parse_operands): Update for parse_sys_reg changes.
	(aarch64_features): Add "pan".
	* doc/c-aarch64.texi (Aarch64 Extensions): Add "pan".

gas/testsuite/
	* pan-directive.d: New.
	* pan.d: New.
	* pan.s: New

gas/ChangeLog

@@ -1,3 +1,11 @@
+2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* config/tc-aarch64.c (parse_sys_reg): New parameter.  Check target
+	support.  Fix whitespace.
+	(parse_operands): Update for parse_sys_reg changes.
+	(aarch64_features): Add "pan".
+	* doc/c-aarch64.texi (Aarch64 Extensions): Add "pan".
+
 2015-06-01  Jiong Wang  <jiong.wang@arm.com>
 
 	* config/tc-aarch64.c (reloc_table): New relocation modifiers.

gas/config/tc-aarch64.c

@@ -3401,10 +3401,15 @@ parse_barrier (char **str)
    Returns the encoding for the option, or PARSE_FAIL.
 
    If IMPLE_DEFINED_P is non-zero, the function will also try to parse the
-   implementation defined system register name S<op0>_<op1>_<Cn>_<Cm>_<op2>.  */
+   implementation defined system register name S<op0>_<op1>_<Cn>_<Cm>_<op2>.
+
+   If PSTATEFIELD_P is non-zero, the function will parse the name as a PSTATE
+   field, otherwise as a system register.
+*/
 
 static int
-parse_sys_reg (char **str, struct hash_control *sys_regs, int imple_defined_p)
+parse_sys_reg (char **str, struct hash_control *sys_regs,
+	       int imple_defined_p, int pstatefield_p)
 {
   char *p, *q;
   char buf[32];
@@ -3439,9 +3444,15 @@ parse_sys_reg (char **str, struct hash_control *sys_regs, int imple_defined_p)
     }
   else
     {
+      if (pstatefield_p && !aarch64_pstatefield_supported_p (cpu_variant, o))
+	as_bad (_("selected processor does not support PSTATE field "
+		  "name '%s'"), buf);
+      if (!pstatefield_p && !aarch64_sys_reg_supported_p (cpu_variant, o))
+	as_bad (_("selected processor does not support system register "
+		  "name '%s'"), buf);
       if (aarch64_sys_reg_deprecated_p (o))
 	as_warn (_("system register name '%s' is deprecated and may be "
-"removed in a future release"), buf);
+		   "removed in a future release"), buf);
       value = o->value;
     }
 
@@ -5306,7 +5317,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	  break;
 
 	case AARCH64_OPND_SYSREG:
-	  if ((val = parse_sys_reg (&str, aarch64_sys_regs_hsh, 1))
+	  if ((val = parse_sys_reg (&str, aarch64_sys_regs_hsh, 1, 0))
 	      == PARSE_FAIL)
 	    {
 	      set_syntax_error (_("unknown or missing system register name"));
@@ -5316,7 +5327,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	  break;
 
 	case AARCH64_OPND_PSTATEFIELD:
-	  if ((val = parse_sys_reg (&str, aarch64_pstatefield_hsh, 0))
+	  if ((val = parse_sys_reg (&str, aarch64_pstatefield_hsh, 0, 1))
 	      == PARSE_FAIL)
 	    {
 	      set_syntax_error (_("unknown or missing PSTATE field name"));
@@ -7388,6 +7399,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"fp",		AARCH64_FEATURE (AARCH64_FEATURE_FP, 0)},
   {"lse",		AARCH64_FEATURE (AARCH64_FEATURE_LSE, 0)},
   {"simd",		AARCH64_FEATURE (AARCH64_FEATURE_SIMD, 0)},
+  {"pan",		AARCH64_FEATURE (AARCH64_FEATURE_PAN, 0)},
   {NULL,		AARCH64_ARCH_NONE}
 };
 

gas/doc/c-aarch64.texi

@@ -133,6 +133,8 @@ automatically cause those extensions to be disabled.
  @tab Enable floating-point extensions.
 @item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
  @tab Enable Advanced SIMD extensions.  This implies @code{fp}.
+@item @code{pan} @tab ARMv8-A @tab ARMv8-A or later
+ @tab Enable Privileged Access Never support.
 @end multitable
 
 @node AArch64 Syntax

gas/testsuite/ChangeLog

@@ -1,3 +1,9 @@
+2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* pan-directive.d: New.
+	* pan.d: New.
+	* pan.s: New
+
 2015-06-01  Jiong Wang  <jiong.wang@arm.com>
 
 	* gas/aarch64/ilp32-basic.s: New testcase.

gas/testsuite/gas/aarch64/pan-directive.d

@@ -0,0 +1,13 @@
+#objdump: -dr
+#as: --defsym DIRECTIVE=1
+#source: pan.s
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d500419f 	msr	pan, #0x1
+   4:	d500409f 	msr	pan, #0x0
+   8:	d5184260 	msr	pan, x0
+   c:	d5384261 	mrs	x1, pan

gas/testsuite/gas/aarch64/pan.d

@@ -0,0 +1,12 @@
+#objdump: -dr
+#as: -march=armv8-a+pan
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d500419f 	msr	pan, #0x1
+   4:	d500409f 	msr	pan, #0x0
+   8:	d5184260 	msr	pan, x0
+   c:	d5384261 	mrs	x1, pan

gas/testsuite/gas/aarch64/pan.s

@@ -0,0 +1,34 @@
+/* pan.s Test file for AArch64 PAN instructions.
+
+   Copyright (C) 2015 Free Software Foundation, Inc.
+   Contributed by ARM Ltd.
+
+   This file is part of GAS.
+
+   GAS is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the license, or
+   (at your option) any later version.
+
+   GAS is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; see the file COPYING3.  If not,
+   see <http://www.gnu.org/licenses/>.  */
+
+
+	.text
+	.ifdef DIRECTIVE
+	.arch_extension pan
+	.endif
+
+	msr pan, #1
+	msr pan, #0
+
+	msr pan, x0
+	mrs x1, pan
+
+	.arch_extension nopan