forked from Imagelibrary/binutils-gdb
gas/testsuite/
2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix". * gas/i386/x86-64-crx-suffix.d: New file. * gas/i386/x86-64-crx.d: Likewise. * gas/i386/x86-64-crx.s: Likewise. opcodes/ 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c ('Z'): Add a new macro. (dis386_twobyte): Use "movZ" for control register moves.
This commit is contained in:
@@ -1,3 +1,11 @@
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".
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* gas/i386/x86-64-crx-suffix.d: New file.
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* gas/i386/x86-64-crx.d: Likewise.
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* gas/i386/x86-64-crx.s: Likewise.
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2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
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* testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
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@@ -132,6 +132,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-vmx"
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run_dump_test "immed64"
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run_dump_test "x86-64-prescott"
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run_dump_test "x86-64-crx"
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run_dump_test "x86-64-crx-suffix"
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if { ![istarget "*-*-aix*"]
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&& ![istarget "*-*-beos*"]
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21
gas/testsuite/gas/i386/x86-64-crx-suffix.d
Normal file
21
gas/testsuite/gas/i386/x86-64-crx-suffix.d
Normal file
@@ -0,0 +1,21 @@
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#objdump: -dwMsuffix
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#name: x86-64 control register related opcodes (with suffixes)
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#source: x86-64-crx.s
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.*: +file format elf64-x86-64
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Disassembly of section .text:
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0+ <_start>:
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[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax
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[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi
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[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8
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[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8
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[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax
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[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi
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[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8
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[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8
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[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax
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[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi
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[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8
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[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8
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21
gas/testsuite/gas/i386/x86-64-crx.d
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21
gas/testsuite/gas/i386/x86-64-crx.d
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@@ -0,0 +1,21 @@
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#objdump: -dw
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#name: x86-64 control register related opcodes
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#source: x86-64-crx.s
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.*: +file format elf64-x86-64
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Disassembly of section .text:
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0+ <_start>:
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[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax
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[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi
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[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8
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[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8
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[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax
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[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi
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[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8
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[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8
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[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax
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[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi
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[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8
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[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8
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18
gas/testsuite/gas/i386/x86-64-crx.s
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18
gas/testsuite/gas/i386/x86-64-crx.s
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@@ -0,0 +1,18 @@
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.text
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_start:
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movq %cr8, %rax
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movq %cr8, %rdi
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movq %rax, %cr8
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movq %rdi, %cr8
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.att_syntax noprefix
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movq cr8, rax
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movq cr8, rdi
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movq rax, cr8
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movq rdi, cr8
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.intel_syntax noprefix
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mov rax, cr8
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mov rdi, cr8
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mov cr8, rax
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mov cr8, rdi
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@@ -1,3 +1,8 @@
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c ('Z'): Add a new macro.
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(dis386_twobyte): Use "movZ" for control register moves.
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2006-02-10 Nick Clifton <nickc@redhat.com>
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* iq2000-asm.c: Regenerate.
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@@ -491,6 +491,7 @@ struct dis386 {
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'W' => print 'b' or 'w' ("w" or "de" in intel mode)
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'X' => print 's', 'd' depending on data16 prefix (for XMM)
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'Y' => 'q' if instruction has an REX 64bit overwrite prefix
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'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
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Many of the above letters print nothing in Intel mode. See "putop"
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for the details.
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@@ -830,9 +831,9 @@ static const struct dis386 dis386_twobyte[] = {
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{ "(bad)", XX, XX, XX },
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{ "(bad)", XX, XX, XX },
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/* 20 */
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{ "movL", Rm, Cm, XX },
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{ "movZ", Rm, Cm, XX },
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{ "movL", Rm, Dm, XX },
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{ "movL", Cm, Rm, XX },
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{ "movZ", Cm, Rm, XX },
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{ "movL", Dm, Rm, XX },
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{ "movL", Rd, Td, XX },
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{ "(bad)", XX, XX, XX },
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@@ -2856,6 +2857,15 @@ putop (const char *template, int sizeflag)
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break;
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*obufp++ = 'l';
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break;
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case 'Z':
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if (intel_syntax)
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break;
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if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
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{
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*obufp++ = 'q';
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break;
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}
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/* Fall through. */
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case 'L':
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if (intel_syntax)
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break;
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