forked from Imagelibrary/binutils-gdb
Do not allow EITHER_BUT_PREFER_MU opcodes to be packed into reverse
sequential buckets, and warn if the user does so.
This commit is contained in:
@@ -1,3 +1,11 @@
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2000-06-27 Nick Clifton <nickc@cygnus.com>
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* config/tc-d30v.c (write_2_short): Do not allow opcodes with
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the EITHER_BUT_PREFER_MU attribute to be combined into a reverse
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sequential order, and emit warning messages if the input source
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code contains constructs like that, or parallel constructs
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containing such opcodes.
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2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
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* config/tc-avr.c (mcu_types): Rename avr4 to avr5, add avr4.
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@@ -832,10 +832,17 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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write_1_short (opcode1, insn1, fx->next, false);
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return 1;
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}
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else if (opcode1->op->unit == IU
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|| (opcode1->op->unit == EITHER
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&& opcode2->op->unit == EITHER_BUT_PREFER_MU))
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else if (opcode1->op->unit == IU)
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{
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if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
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{
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/* Case 103810 is a request from Mitsubishi that opcodes
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with EITHER_BUT_PREFER_MU should not be executed in
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reverse sequential order. */
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write_1_short (opcode1, insn1, fx->next, false);
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return 1;
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}
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/* reverse sequential */
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insn = FM10 | (insn2 << 32) | insn1;
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exec_type = EXEC_REVSEQ;
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@@ -872,7 +879,8 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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else
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{
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if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
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as_warn (_("Executing %s in IU may not work"), opcode2->op->name);
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as_warn (_("Executing %s in IU in parallel with %s may not work"),
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opcode1->op->name, opcode2->op->name);
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insn = FM00 | (insn1 << 32) | insn2;
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fx = fx->next;
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@@ -887,8 +895,6 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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as_bad (_("special left instruction `%s' kills instruction "
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"`%s' in right container"),
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opcode1->op->name, opcode2->op->name);
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if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
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as_warn (_("Executing %s in IU may not work"), opcode2->op->name);
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insn = FM01 | (insn1 << 32) | insn2;
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fx = fx->next;
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break;
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@@ -896,8 +902,10 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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case EXEC_REVSEQ: /* reverse sequential */
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if (opcode2->op->unit == MU)
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as_bad (_("MU instruction may not be in the right container"));
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if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
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as_warn (_("Executing %s in IU may not work"), opcode2->op->name);
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if (opcode1->op->unit == EITHER_BUT_PREFER_MU
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|| opcode2->op->unit == EITHER_BUT_PREFER_MU)
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as_warn (_("Executing %s in reverse serial with %s may not work"),
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opcode1->op->name, opcode2->op->name);
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insn = FM10 | (insn1 << 32) | insn2;
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fx = fx->next;
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break;
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@@ -1,3 +1,8 @@
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2000-06-27 Nick Clifton <nickc@cygnus.com>
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* gas/d30v/bittest.l: Edit to match new warning messages produced
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by assembler.
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2000-06-19 Timothy Wall <twall@cygnus.com>
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* gas/macros/macros.exp: Avoid tests which are not useful on tic54x.
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@@ -1,9 +1,7 @@
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.*: Assembler messages:
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.*: Warning: Swapping instruction order
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.*: Warning: Executing bset in IU may not work
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.*: Warning: Executing btst in IU may not work
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.*: Warning: Executing bclr in IU may not work
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.*: Warning: Executing bnot in IU may not work
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.*: Warning: Executing nop in reverse serial with btst may not work
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.*: Warning: Executing nop in IU in parallel with bclr may not work
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.*: Warning: Executing bset in IU may not work
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.*: Warning: Swapping instruction order
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GAS LISTING .*
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@@ -25,16 +23,14 @@ GAS LISTING .*
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11 00F00000
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12
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13 0010 00F00000 nop -> BSET R1, R2, R3
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.* Warning:Executing bset in IU may not work
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13 82201083
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14 0018 80F00000 nop <- BTST F1, R2, R3
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.* Warning:Executing btst in IU may not work
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.* Warning:Executing nop in reverse serial with btst may not work
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14 02001083
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15 0020 00F00000 nop || BCLR R1, R2, R3
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.* Warning:Executing bclr in IU may not work
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.* Warning:Executing nop in IU in parallel with bclr may not work
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15 02301083
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16 0028 00F00000 nop -> BNOT R1, R2, R3
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.* Warning:Executing bnot in IU may not work
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16 82101083
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17 0030 02101083 BNOT r1, r2, r3 -> nop
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17 80F00000
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@@ -52,5 +48,5 @@ GAS LISTING .*
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25 88C04146
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26
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27 joinll r4, r5, r6
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28 0050 82201083 bset r1, r2, r3
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28 08C04146
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28 0050 08C04146 bset r1, r2, r3
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28 82201083
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