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aarch64: Fix operand name MOPS_WB_Rd -> MOPS_WB_Rn

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This field was misnamed in aarch64_opcode_table.  It previously didn't
matter too much as the name field only appeared in dumps.  But it
doesn't match the enum in include/opcode/aarch64.h and we will shortly
start to rely on that.
This commit is contained in:
Richard Earnshaw
2025-07-15 17:32:20 +01:00
parent 9db671074c
commit 6a35f84ceb
2 changed files with 2 additions and 2 deletions
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2
opcodes/aarch64-opc-2.c
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@@ -355,7 +355,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SIMD_ELEMENT, "SM3_IMM2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SM3_imm2}, "an indexed SM3 vector immediate"},
{AARCH64_OPND_CLASS_INT_REG, "MOPS_ADDR_Rd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a register destination address with writeback"},
{AARCH64_OPND_CLASS_INT_REG, "MOPS_ADDR_Rs", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rs}, "a register source address with writeback"},
{AARCH64_OPND_CLASS_INT_REG, "MOPS_WB_Rd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer register with writeback"},
{AARCH64_OPND_CLASS_INT_REG, "MOPS_WB_Rn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer register with writeback"},
{AARCH64_OPND_CLASS_IMMEDIATE, "CSSC_SIMM8", OPD_F_SEXT | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CSSC_imm8}, "an 8-bit signed immediate"},
{AARCH64_OPND_CLASS_IMMEDIATE, "CSSC_UIMM8", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CSSC_imm8}, "an 8-bit unsigned immediate"},
{AARCH64_OPND_CLASS_ADDRESS, "RCPC3_ADDR_OPT_POSTIND", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_opc2}, "an address with post-incrementing by ammount of loaded bytes"},

2
opcodes/aarch64-tbl.h
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@@ -8199,7 +8199,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"a register destination address with writeback") \
Y(INT_REG, x0_to_x30, "MOPS_ADDR_Rs", 0, F(FLD_Rs), \
"a register source address with writeback") \
Y(INT_REG, x0_to_x30, "MOPS_WB_Rd", 0, F(FLD_Rn), \
Y(INT_REG, x0_to_x30, "MOPS_WB_Rn", 0, F(FLD_Rn), \
"an integer register with writeback") \
Y(IMMEDIATE, imm, "CSSC_SIMM8", OPD_F_SEXT, F(FLD_CSSC_imm8), \
"an 8-bit signed immediate") \