sim: mips: hoist "single" igen rules up to common builds

2022-12-25 02:48:36 -05:00
parent 07f60ed831
commit 3a31051b3a
5 changed files with 147 additions and 79 deletions
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -199,30 +199,34 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_59 = microblaze/run
@SIM_ENABLE_ARCH_mips_TRUE@am__append_60 = mips/run
@SIM_ENABLE_ARCH_mips_TRUE@am__append_61 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_62 = $(mips_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_62 = \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@	$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
+@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@	mips/stamp-gen-mode-single
+
@SIM_ENABLE_ARCH_mips_TRUE@am__append_63 = $(mips_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mips_TRUE@am__append_64 = mips/multi-include.h mips/multi-run.c
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_65 = mn10300/run
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_66 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_67 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_64 = $(mips_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mips_TRUE@am__append_65 = mips/multi-include.h mips/multi-run.c
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_66 = mn10300/run
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_67 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_68 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_moxie_TRUE@am__append_69 = moxie/run
-@SIM_ENABLE_ARCH_msp430_TRUE@am__append_70 = msp430/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_71 = or1k/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_72 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_69 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_moxie_TRUE@am__append_70 = moxie/run
+@SIM_ENABLE_ARCH_msp430_TRUE@am__append_71 = msp430/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_72 = or1k/run
@SIM_ENABLE_ARCH_or1k_TRUE@am__append_73 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ppc_TRUE@am__append_74 = ppc/run ppc/psim
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_75 = pru/run
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_76 = riscv/run
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_77 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_78 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_79 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_80 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_81 = sh/gencode
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_82 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_83 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_84 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_74 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ppc_TRUE@am__append_75 = ppc/run ppc/psim
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_76 = pru/run
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_77 = riscv/run
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_78 = rl78/run
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_79 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_80 = sh/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_81 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_82 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_83 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_84 = v850/run
@SIM_ENABLE_ARCH_v850_TRUE@am__append_85 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_86 = $(v850_BUILD_OUTPUTS)
 subdir = .
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -1201,22 +1205,22 @@ SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
 	$(am__append_3) $(am__append_12) $(am__append_21) \
 	$(am__append_42) $(am__append_50) $(am__append_54) \
-	$(am__append_61) $(am__append_66)
+	$(am__append_61) $(am__append_67)
 pkginclude_HEADERS = $(am__append_1)
 noinst_LIBRARIES = $(SIM_COMMON_LIB) $(am__append_5)
 CLEANFILES = common/version.c common/version.c-stamp \
 	testsuite/common/bits-gen testsuite/common/bits32m0.c \
 	testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
 	testsuite/common/bits64m63.c
-DISTCLEANFILES = $(am__append_64)
+DISTCLEANFILES = $(am__append_65)
 MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
 	%,%/stamp-hw,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
 	site-sim-config.exp testrun.log testrun.sum $(am__append_15) \
 	$(am__append_19) $(am__append_24) $(am__append_28) \
 	$(am__append_35) $(am__append_40) $(am__append_44) \
 	$(am__append_48) $(am__append_52) $(am__append_57) \
-	$(am__append_63) $(am__append_68) $(am__append_73) \
-	$(am__append_82) $(am__append_85)
+	$(am__append_64) $(am__append_69) $(am__append_74) \
+	$(am__append_83) $(am__append_86)
 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
 AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
 	$(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
@@ -1230,8 +1234,8 @@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
 	$(am__append_17) $(am__append_23) $(am__append_26) \
 	$(am__append_34) $(am__append_39) $(am__append_43) \
 	$(am__append_46) $(am__append_51) $(am__append_55) \
-	$(am__append_62) $(am__append_67) $(am__append_72) \
-	$(am__append_80) $(am__append_84)
+	$(am__append_63) $(am__append_68) $(am__append_73) \
+	$(am__append_81) $(am__append_85)
 SIM_INSTALL_DATA_LOCAL_DEPS = 
 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_30)
 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_31)
@@ -1591,10 +1595,25 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/itable.h \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/itable.c

-@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
-@SIM_ENABLE_ARCH_mips_TRUE@	$(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
-@SIM_ENABLE_ARCH_mips_TRUE@	mips/stamp-igen-itable
+@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/icache.h \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/icache.c \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/idecode.h \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/idecode.c \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/semantics.h \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/semantics.c \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/model.h \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/model.c \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/support.h \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/support.c \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/engine.h \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/engine.c \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/irun.c

+@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
+@SIM_ENABLE_ARCH_mips_TRUE@	$(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
+@SIM_ENABLE_ARCH_mips_TRUE@	mips/stamp-igen-itable \
+@SIM_ENABLE_ARCH_mips_TRUE@	$(am__append_62)
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
@@ -1612,6 +1631,7 @@ testsuite_common_CPPFLAGS = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/tx.igen \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/vr.igen

+@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES = 
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/nrun.o \
@@ -3537,6 +3557,7 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_GEN)$< -m6812 >$@

@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
+@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single

@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@@ -3554,6 +3575,35 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_mips_TRUE@		-n itable.c    -t  mips/itable.c
@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@

+@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
+@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
+@SIM_ENABLE_ARCH_mips_TRUE@		$(mips_IGEN_TRACE) \
+@SIM_ENABLE_ARCH_mips_TRUE@		-I $(srcdir)/mips \
+@SIM_ENABLE_ARCH_mips_TRUE@		-Werror \
+@SIM_ENABLE_ARCH_mips_TRUE@		-Wnodiscard \
+@SIM_ENABLE_ARCH_mips_TRUE@		$(SIM_MIPS_SINGLE_FLAGS) \
+@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-direct-access \
+@SIM_ENABLE_ARCH_mips_TRUE@		-G gen-zero-r0 \
+@SIM_ENABLE_ARCH_mips_TRUE@		-B 32 \
+@SIM_ENABLE_ARCH_mips_TRUE@		-H 31 \
+@SIM_ENABLE_ARCH_mips_TRUE@		-i $(mips_IGEN_INSN) \
+@SIM_ENABLE_ARCH_mips_TRUE@		-o $(mips_IGEN_DC) \
+@SIM_ENABLE_ARCH_mips_TRUE@		-x \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n icache.h    -hc mips/icache.h \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n icache.c    -c  mips/icache.c \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n semantics.h -hs mips/semantics.h \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n semantics.c -s  mips/semantics.c \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n idecode.h   -hd mips/idecode.h \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n idecode.c   -d  mips/idecode.c \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n model.h     -hm mips/model.h \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n model.c     -m  mips/model.c \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n support.h   -hf mips/support.h \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n support.c   -f  mips/support.c \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n engine.h    -he mips/engine.h \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n engine.c    -e  mips/engine.c \
+@SIM_ENABLE_ARCH_mips_TRUE@		-n irun.c      -r  mips/irun.c
+@SIM_ENABLE_ARCH_mips_TRUE@	$(AM_V_at)touch $@
+
@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
--- a/sim/configure
+++ b/sim/configure
@@ -641,6 +641,8 @@ LTLIBOBJS
 include_makefile
 SIM_RX_CYCLE_ACCURATE_FLAGS
 SIM_RISCV_BITSIZE
+SIM_MIPS_GEN_MODE_SINGLE_FALSE
+SIM_MIPS_GEN_MODE_SINGLE_TRUE
 SIM_MIPS_MULTI_OBJ
 SIM_MIPS_MULTI_SRC
 SIM_MIPS_MULTI_IGEN_CONFIGS
@@ -12444,7 +12446,7 @@ else
  lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
  lt_status=$lt_dlunknown
  cat > conftest.$ac_ext <<_LT_EOF
-#line 12447 "configure"
+#line 12449 "configure"
 #include "confdefs.h"

 #if HAVE_DLFCN_H
@@ -12550,7 +12552,7 @@ else
  lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
  lt_status=$lt_dlunknown
  cat > conftest.$ac_ext <<_LT_EOF
-#line 12553 "configure"
+#line 12555 "configure"
 #include "confdefs.h"

 #if HAVE_DLFCN_H
@@ -16616,6 +16618,14 @@ SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}"



+ if test "$SIM_MIPS_GEN" = "SINGLE"; then
+  SIM_MIPS_GEN_MODE_SINGLE_TRUE=
+  SIM_MIPS_GEN_MODE_SINGLE_FALSE='#'
+else
+  SIM_MIPS_GEN_MODE_SINGLE_TRUE='#'
+  SIM_MIPS_GEN_MODE_SINGLE_FALSE=
+fi
+

 { $as_echo "$as_me:${as_lineno-$LINENO}: checking riscv bitsize" >&5
 $as_echo_n "checking riscv bitsize... " >&6; }
@@ -16934,6 +16944,10 @@ if test -z "${SIM_ENABLE_HW_TRUE}" && test -z "${SIM_ENABLE_HW_FALSE}"; then
  as_fn_error $? "conditional \"SIM_ENABLE_HW\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
 fi
+if test -z "${SIM_MIPS_GEN_MODE_SINGLE_TRUE}" && test -z "${SIM_MIPS_GEN_MODE_SINGLE_FALSE}"; then
+  as_fn_error $? "conditional \"SIM_MIPS_GEN_MODE_SINGLE\" was never defined.
+Usually this means the macro was only invoked conditionally." "$LINENO" 5
+fi

 : "${CONFIG_STATUS=./config.status}"
 ac_write_fail=0
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -86,56 +86,10 @@ IGEN_INCLUDE=\
 	$(srcdir)/mips3264r2.igen \
 	$(srcdir)/mips3264r6.igen \

-SIM_SINGLE_ALL = tmp-single
+SIM_SINGLE_ALL =
 SIM_M16_ALL = tmp-m16
 SIM_MULTI_ALL = tmp-multi

-BUILT_SRC_FROM_SINGLE = \
-	icache.h \
-	icache.c \
-	idecode.h \
-	idecode.c \
-	semantics.h \
-	semantics.c \
-	model.h \
-	model.c \
-	support.h \
-	support.c \
-	engine.h \
-	engine.c \
-	irun.c \
-
-$(BUILT_SRC_FROM_SINGLE): tmp-single
-
-tmp-single: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-	$(ECHO_IGEN) $(IGEN_RUN) \
-		$(IGEN_TRACE) \
-		-I $(srcdir) \
-		-Werror \
-		-Wnodiscard \
-		$(SIM_MIPS_SINGLE_FLAGS) \
-		-G gen-direct-access \
-		-G gen-zero-r0 \
-		-B 32 \
-		-H 31 \
-		-i $(IGEN_INSN) \
-		-o $(IGEN_DC) \
-		-x \
-		-n icache.h    -hc icache.h \
-		-n icache.c    -c  icache.c \
-		-n semantics.h -hs semantics.h \
-		-n semantics.c -s  semantics.c \
-		-n idecode.h   -hd idecode.h \
-		-n idecode.c   -d  idecode.c \
-		-n model.h     -hm model.h \
-		-n model.c     -m  model.c \
-		-n support.h   -hf support.h \
-		-n support.c   -f  support.c \
-		-n engine.h    -he engine.h \
-		-n engine.c    -e  engine.c \
-		-n irun.c      -r  irun.c
-	$(SILENCE) touch $@
-
 BUILT_SRC_FROM_M16 = \
 	m16_icache.h \
 	m16_icache.c \
@@ -303,7 +257,6 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
 	$(SILENCE) touch $@

 clean-extra:
-	rm -f $(BUILT_SRC_FROM_SINGLE)
 	rm -f $(BUILT_SRC_FROM_M16)
 	rm -f $(BUILT_SRC_FROM_MULTI)
 	rm -f tmp-*
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -333,3 +333,4 @@ AC_SUBST(SIM_MIPS_IGEN_ITABLE_FLAGS)
 AC_SUBST(SIM_MIPS_MULTI_IGEN_CONFIGS)
 AC_SUBST(SIM_MIPS_MULTI_SRC)
 AC_SUBST(SIM_MIPS_MULTI_OBJ)
+AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])
--- a/sim/mips/local.mk
+++ b/sim/mips/local.mk
@@ -30,14 +30,34 @@ AM_MAKEFLAGS += %C%_SIM_EXTRA_HW_DEVICES="$(%C%_SIM_EXTRA_HW_DEVICES)"
 %C%_BUILT_SRC_FROM_IGEN_ITABLE = \
 	%D%/itable.h \
 	%D%/itable.c
+%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
+	%D%/icache.h \
+	%D%/icache.c \
+	%D%/idecode.h \
+	%D%/idecode.c \
+	%D%/semantics.h \
+	%D%/semantics.c \
+	%D%/model.h \
+	%D%/model.c \
+	%D%/support.h \
+	%D%/support.c \
+	%D%/engine.h \
+	%D%/engine.c \
+	%D%/irun.c
 %C%_BUILD_OUTPUTS = \
 	$(%C%_BUILT_SRC_FROM_IGEN_ITABLE) \
 	%D%/stamp-igen-itable
+if SIM_MIPS_GEN_MODE_SINGLE
+%C%_BUILD_OUTPUTS += \
+	$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
+	%D%/stamp-gen-mode-single
+endif

 ## This makes sure build tools are available before building the arch-subdirs.
 SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)

 $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
+$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single

 %C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
 %C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
@@ -55,6 +75,7 @@ $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
 	%D%/sb1.igen \
 	%D%/tx.igen \
 	%D%/vr.igen
+%C%_IGEN_DC = $(srcdir)/%D%/mips.dc

 ## NB:	Since these can be built by a number of generators, care
 ##	must be taken to ensure that they are only dependant on
@@ -75,6 +96,35 @@ $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
 		-n itable.c    -t  %D%/itable.c
 	$(AM_V_at)touch $@

+%D%/stamp-gen-mode-single: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(IGEN)
+	$(AM_V_GEN)$(IGEN_RUN) \
+		$(%C%_IGEN_TRACE) \
+		-I $(srcdir)/%D% \
+		-Werror \
+		-Wnodiscard \
+		$(SIM_MIPS_SINGLE_FLAGS) \
+		-G gen-direct-access \
+		-G gen-zero-r0 \
+		-B 32 \
+		-H 31 \
+		-i $(%C%_IGEN_INSN) \
+		-o $(%C%_IGEN_DC) \
+		-x \
+		-n icache.h    -hc %D%/icache.h \
+		-n icache.c    -c  %D%/icache.c \
+		-n semantics.h -hs %D%/semantics.h \
+		-n semantics.c -s  %D%/semantics.c \
+		-n idecode.h   -hd %D%/idecode.h \
+		-n idecode.c   -d  %D%/idecode.c \
+		-n model.h     -hm %D%/model.h \
+		-n model.c     -m  %D%/model.c \
+		-n support.h   -hf %D%/support.h \
+		-n support.c   -f  %D%/support.c \
+		-n engine.h    -he %D%/engine.h \
+		-n engine.c    -e  %D%/engine.c \
+		-n irun.c      -r  %D%/irun.c
+	$(AM_V_at)touch $@
+
 MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
 ## These are created by mips/acinclude.m4 during configure time.
 DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c